TW200417764A - Ceramic optical sub-assembly for opto-electronic module utilizing LTCC (low-temperature co-fired ceramic) technology - Google Patents

Abstract

A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.

Description

200417764 (1) 玖. Cross-references to related patents and applications for the description of the invention This application is entitled “Feasibility, Scalable, and Stackable Molded Package Structure”, which was put forward on May 9, 2000. "US Patent Application No. 09 / 568,558 (lawyer case number NSCIP156), and US Patent Application entitled" Optical Subassembly of Optoelectronic Module "filed on June 6, 2002 1 0/1 65,5 The subsequent part of No. 5 (Lawyer Case No. NSCIP212), which applied for the priority of US Provisional Application No. 6 0/3 3 1, 3 3 9 filed on August 3, 2001. For reference, this application is related to US Patent No. 6,364,542 entitled "Apparatus and Method for Providing Real Semiconductor Die to External Optical Fiber Cable Connection" on May 9, 2000, and was filed on November 14, 2000 US Patent Application No. 09/7 1 3,3 6 7 (Lawyer Case No. NSCIP180) entitled "Small Optoelectronic Receiver", filed August 3, 2001 entitled "Small Optoelectronic Device "Semiconductor Package" US Patent Application No. 0 9 / 922,3 5 8 (Lawyer Case No. NSCIP204), August 3, 2001 The US patent application entitled "Technology for Connecting Optoelectronic Modules to Semiconductor Packaging" No. 09/947, 2 10 (lawyer case number NSCIP205), and the title proposed on November 6, 2002 290,4. 8 1 US Patent application Layer of the electrical-optical device substrate "and 10 / (attorney docket No. NSCIP247), each incorporated by reference for such content. This application is also related to the US patent application No. 10 / ;! 65,71 i (lawyer case number NSCIP212X1) entitled "Ceramic Optical Subassembly of Photoelectric Module" filed on June 6, 2002. The subsequent parts of US Patent Application (2) (2) 200417764 1 0/1 6 5,5 5 3 are listed here for reference. [Technical Field to which the Invention belongs] The present invention generally relates to a technology for connecting components of optical and electrical devices. More specifically, the present invention relates to an LTCC (Low Temperature Cofired Ceramic) structure for use in an optical subassembly. [Previous Technology] Many computer and communication networks currently being built, including the Internet, use fiber optic cables instead of copper wires. With fiber optic cables, data is transmitted using optical signals rather than electrical signals. For example, logic 1 may be represented by a pulse of light of a particular duration and frequency, and logic 0 may be represented by the absence of a pulse of light of the same duration. Optical fiber has the advantage of a much larger frequency bandwidth than copper wire. Although fiber optic cables are very effective at transferring data, the use of optical signals to process data is very difficult. For example, there is currently no effective way to "store" the light signal representing the data. The network therefore uses fiber optics to send data between nodes and a silicon chip to process data within computer nodes. This is achieved by using an optical fiber transceiver, and the optical signal converted from the optical fiber cable is an electrical signal, and vice versa. Figure 1 shows a perspective view of an exemplary photovoltaic module 100, which can be used to form an optical transceiver. The optoelectronic module 100 includes a semiconductor wafer sub-assembly (CS A) 102 and an optical sub-assembly (OSA) 104a. The CSA 102 is a packaged semiconductor device. As shown in FIG. 1, C S A 1 0 2 is a square block of a molding material 10 6, which has electrical contact points 108 exposed through its bottom and side surfaces. In the die (3) (3) 200417764 plastic material 106 is a semiconductor die, which is electrically connected to the contact point 108. For example, a sticky wire can be used for this connection. Not see the other hand to link the CS A102 contact over the CS A 102 on the top surface. The contact point of the chain is also electrically connected to the semiconductor die of the package, and therefore provides electrical connection between the semiconductor die and the OS A 104 communication. CS A specific non-shown lead wires 102 of the front frame of a semiconductor package (LLP). However, it should be understood that CSA102 can be made into a variety of molded packages. A common OSA 104 includes a common support block 110, a circuit substrate 112, and a photonic device 114. Support block 110 having a front surface 116, photonic devices 112 and this support substrate 114 is electrically, connected to the circuit substrate such 112. A common support block 110 can be made of various materials, such as ceramic materials, polyvinyl ether ketone (PEEK), or liquid crystal polymer (LCP). Examples of ordinary OS A 104 and support block 104 are known to those skilled in the art. A common example of such a general support block is illustrated in, for example, US Patent Application No. 10 / 165,711 (Lawyer Case No. NSCIP212X1) entitled "Ceramic Optical Subassembly for Photoelectric Modules" filed on June 6, 2002. In a common implementation, the circuit substrate 1 12 is connected to the front surface 116 of the support block 110, surrounding the front corner of the bottom of the support block 110, and covering most of the bottom surface of the support block 110. The traces of the circuit substrate 1 1 2 extend from the photonic device 1 1 4 on the front surface to the bottom surface of the support block 1 1 0, where these contacts link contacts above CS A 102. In order to increase the number of possible electrical connections to the maximum extent, the size of the above devices is small. However, even if the size is small, the circuit substrate 1 1 2 is only constructed on the surface of the support block 1 1 0 (or some implementations, two layers deep), which limits the construction from photonic devices 1 1 4 to CSA 1 〇2 contact point (4) 200417764 The total number of electrical connections. Furthermore, 'this surface mount circuit substrate 112 can suffer from the small volume involved in the tumbecht' circuit substrate, and it can be arranged close to each other. Small size also has advantages, most of them are small. However, the close proximity of the stitches can cause "crosstalk" in frequency. Crosstalk is the electricity between two or more conductive elements, which can severely degrade the performance of photovoltaic devices. Fig. 2 shows the general support block 204 (upside-down display 201 and a front face 202. Photonic device 214 is generally on the front face of 204 and is electrically connected to the connector device on the bottom face 201 2 1 4 is electrically connected using surface metallization technology To the connector device 2 1 4 wire traces (or leads) are commonly used 2 1 6 pads 2 1 5 and the stitches are constructed on one of the attachment blocks 2 0 4. One problem with this implementation is that the wire traces 2 1 6 are easy Failures occur on the edge of the belt 204. In view of the above, an effective technique is needed to place the photonic device to the associated semiconductor wafer device at a high level. The connection exhibits high circuit density and low crosstalk. [Content of the Invention] object of the present invention is a high-performance and small circuit, an optical subassembly in one embodiment, a system configuration:. OSA), and applied to the optical fiber and the sub-group of interconnected wafer interconnection. OS A includes a ceramic block with a second surface M crosstalk ''. P is the circuit traces of the sub-volume means operation especially in high interference. This crosstalk indication) is displayed on the support block 2 1 5. Light touches 2 1 5. Optoelectronic connection to the contact Special contact strip Bent to the support block Constructed from the optical assembly density Electrical connection, the substrate and the support block optical subassembly (CSA) electrical and a second surface (5) (5) 200417764, ceramic block use low temperature co-fired ceramic (LTCC) and high temperature cofired. photonic device constructed on the first surface of the ceramic block, and electrical contacts constructed on ceramic (Η TCC) one of the techniques for producing the second surface of the ceramic block The electrical contacts are adapted to be in electrical communication with the wafer sub-assembly. Furthermore, an electrical connection is constructed so that a photon device on the first side of the ceramic block is electrically connected to the second side of the ceramic block through the inside of the ceramic block The electrical contact point. Another embodiment includes a ceramic block having a first surface and a second surface. The ceramic block is manufactured using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) technology. the first face of the ceramic block having a least-photonic devices constructed thereon. contact pads constructed on a second face of the ceramic block. also includes electrically connecting the ceramic block, are electrically connected to the photonic devices, and through the ceramic block Inside May be electrically connected photonic device to a wafer sub-assembly (CSA). Electrical connection may comprise signal connection and a ground connection. Also, embodiments may include internal shield. Configured ceramic block of may be designed to serve to reduce crosstalk 'exhibit low land Jump and electrical parasitics, and the best degree of impedance can be obtained. The circuit substrate can be used to construct the optical subassembly. In another embodiment, the ceramic block includes multiple ceramic layers, and low temperature co-fired ceramic (LTCC) and Manufactured by one of the high-temperature co-fired ceramics (HTCC) technology. The ceramic block includes a front surface and a bottom surface. The front surface of the ceramic block includes a plurality of contact pads in contact with a plurality of photonic devices. The bottom surface includes a plurality of solder pads. The block further includes an internal electrical contact plane with at least one electrical contact line constructed thereon, at least one electrical contact line passes through the interior of the ceramic block and is in electrical communication with the contact pads and associated solder pads. The contact pads have adhesive wiring. Used to electrically connect contact pads and photonic devices. The ceramic block also includes at least one internal ground plane (6) (6) 200417764 surface with at least one ground contact line constructed thereon, at least one The ground contact wire passes through the inside of the ceramic block and is electrically connected to the selected pad. The module also includes a semiconductor wafer subassembly (CSA) with a top surface, which exposes the link contacts. When the ceramic block is placed on the top surface of the CSA In the above, these are in electrical contact with the pads formed on the bottom surface of the ceramic block. In the following description of the present invention and the accompanying drawings, these and other features and advantages of the present invention are presented in more detail. The principle of the present invention is shown. It should be understood that the same reference numerals in the drawings refer to the same structural elements. It should be understood that the drawings do not need to be shown to scale. [Embodiment] Now, the preferred embodiment shown in the drawings will be described in detail. Invention. In the following description, numerous specific details are set forth in order to clarify the invention. However, it will be apparent to those skilled in the art that the invention may be practiced without some or all of these specific details. In other cases, familiar operations have not been described in detail, so as not to unnecessarily obscure the present invention. One of the limitations of the existing technology used in optical sub-assemblies is the need to construct all electrical interconnections between the substrate sub-assemblies (CSA) and the sub-assemblies (CSA) below, using metallization techniques. depth of layer interconnection structure. This results in limiting electrical contact density and causing many crosstalk issues between various electrical interconnections. Crosstalk in current technology can be as high as 75%. Moreover, as data transmission rates increase, the problem may increase.

The present invention pertains to a high-performance and small-scale OSA. The improved OSA of the present invention includes a ceramic block composed of several layers of low-temperature co-fired ceramics (LTCC -10- (7) (7) 200417764) or high-temperature co-fired ceramics (HTCC). Photonic devices' or more Photonic devices are constructed on one side of the ceramic block. The photonic device is electrically connected to a plurality of pads constructed on the other side of the ceramic block. Importantly, the electrical connection between the photonic device and the pads passes through the interior of the ceramic block. This structure can be constructed using LTCC and HTCC technology. Designed by the electrical interconnection structure inside the ceramic block to reduce crosstalk, show low ground jumps and parasitics, and obtain the best degree of impedance. The OSA with this ceramic block can be used to construct photovoltaic modules. In order to achieve the desired properties in a ceramic block constructed in accordance with the principles of the present invention, 'multi-layer ceramic (MLC) manufacturing technology is used. This technique is described in, for example, the Microelectronics Package Handbook, published by Van Nostrand Reinhold, New York, 1989 edition, pp. 45 5-5 22, which provides a thermally efficient, multi-component ceramic structure that supports three-dimensional interconnect circuits. Generally speaking, 'this ceramic structure is made of a high-temperature-resistant dielectric material, such as oxide particles and glass particles suspended in an organic binder, and is formed and dried into a so-called "green sheet". Individual thin strips are printed with metallization and other circuit strips stacked on top of each other, and are stacked together at a predetermined temperature and pressure, and then fired under a local temperature normal mode. Here, most of the adhesive material evaporates, the same day The remaining material is fused or tangled. Here, alumina glass is generally used as the insulating material, and tungsten, molybdenum, or molybdenum-manganese, or other appropriate materials are generally used as the sub-genus. The margin sheets are mapped and then stacked into a suitable configuration. The stack is then made at a temperature of about 1,600 degrees Celsius, lowered to the atmosphere, such as ammonia. This is called high temperature co-firing (HTCC) technology. In the ordinary HTCC method, a refractory refractory metal paste is used as a conductor. -11-(8) (8) 200417764 The method of laminating ceramics that does not require high processing temperature or hydrogen atmosphere is commonly referred to as low temperature co-fired ceramic (LTCC) technology. Low temperature ceramic tapes are commercially available from DuPont under the Green Belt brand of ceramic tapes, which are sintered at approximately 850 ° C and exhibit thermal expansion similar to alumina. Low temperature processing can use highly conductive noble metal thick film conductors such as gold, silver, or alloys thereof. The discussion of thickness technology and high / low temperature co-firing ceramic tape technology can be found in "Development of Low-temperature Co-firing Multi-Layer Ceramic Technology" by William Vitriol et al., ISHM Conference Records 1983, pages 593-598. Although HTCC and LTCC technologies can be used in accordance with the principles of the invention, LTCC is a more appropriate implementation. Ceramic components can be constructed using technologies such as HTCC and LTCC. For example, and may be constructed using a ceramic block, to connect the various electrical systems of the optoelectronic module. The advantages of this ceramic block are more fully demonstrated when connecting small electrical systems. For example, the ceramic block can be used to connect an optical device in a photovoltaic module to a semiconductor wafer device. Figure 3 will now be described to illustrate the use of this ceramic block. FIG. 3 includes a simple optical sub-assembly (0 S A) 300 and a wafer sub-assembly (C S A) 3 202 according to an embodiment of the present invention. 〇 S A 3 0 0 and CSA302 can be combined to form a photovoltaic module. OSA300 and CSA302 are connected to each other by contact pads (not shown) on the bottom surface of OSA300 that link contact 304 above the top surface of CSA302. These connections can utilize conductive materials including, but not limited to, solder paste and conductive epoxy. CS A3 02 is a packaged semiconductor device (roughly similar to CSA 1 0 2 described in the figure), in which a semiconductor die (not shown) is wrapped in -12- (9) (9) 200417764 molding material 1 0 0, and is electrically connected to the upper link contact 3 04. The winding contact point 3 04 provides a path, which is electrically connected between the semiconductor die and the photonic device 3 1 2 of OS A3 00. A-OS A300 includes a ceramic block 314 (also referred to herein as a ceramic body) having a front surface 318 and a bottom surface 320. A device connection area 332 is generally formed on the front surface 3 1 8. The device connection area 3 3 2 is also called a cathode pad. The photonic device 312 is connected to the device connection area 332 of the front surface 318 of the ceramic ceramic block 314. Moreover, the front surface 318 includes a contact pad 338 structured thereon. The adhesive wires 3 3 3 are in electrical contact with the photonic device 3 1 2 on the contact pads 3 3 8. Electrically connect the bonding pads 3 3 8 to the solder pads (not shown in the figure) through the signal connection wires 3 2 2 (indicated by the inner dashed line 槪) inside the ceramic block 3 1 4. In this way, the photonic device 3 12 can be connected to the wafer sub-assembly (CS A) 3 02 uplink contact point 3 04, and finally these can be connected to the semiconductor crystals in the CSA 3 02. In order to better show the structure and features of the ceramic block embodiment and its associated electrical connections, embodiments of the ceramic block are discussed with reference to FIGS. 3 and 4A-C. FIG. 3 shows a ceramic block embodiment 3 1 4 in a perspective view, FIG. 4 AC is a sectional side view, a front plan view on the front surface 318 of the ceramic block 314, and a bottom surface 3 2 0 on the bottom surface of the ceramic block 3 1 4 View shows ceramic block examples 3 1 4. 4A, 4B, and 4C, one implementation of a ceramic block OSA is shown. Fig. 4A is a sectional view, circle 4B is a plan view of the front surface, and Fig. 4C is a plan view of the bottom surface. Referring to FIG. 4A, the ceramic block 314 is composed of a plurality of ceramic layers 350. The front surface 318 of the ceramic block 314 shown includes a device connection region 332 having a photonic device 312 constructed thereon. Moreover, the illustrated embodiment (10) (10) 200417764 has a contact pad 3 3 8 configured on the front surface 3 1 8 and a contact pad 3 0 6 (here, this contact pad 3 06 and the front surface 3 The contact pads 3 3 8 of 18 are different from each other, and are called solder pads 3 06) are formed on the bottom surface 3 2 0. The contact pad 3 3 8 is electrically connected to the contact point of the photonic device 3 1 2. These connections commonly used to achieve connection wire 333, such as gold general system, but it may comprise any suitable conductive material. Below the contact pad 3 3 8 shown is a signal connection, which passes through the interior of the ceramic block 3 1 8. The signal connection structure facilitates the electrical connection between the photonic device and the link contacts 300 on the wafer sub-assembly (C S A). In the illustrated embodiment, the signal connection line includes a signal channel 3 51, a signal trace 3 5 2, a corresponding contact pad 3 38, and a corresponding solder pad 3 06. The signal channel 3 5 1 is formed by one of the holes in the metallized one or more ceramic layers 350. Furthermore, an associated signal trace 3 5 2 is formed on the ceramic layer 3 50. Signal channel 3 5 1 is electrically connected to the associated signal trace 3 5 2. The signal channel 3 5 1 is electrically connected to a corresponding contact pad 3 3 8, and the signal stitch 3 52 is electrically connected to a corresponding solder pad 3 06. The signal channel 3 5 1, the contact pad 3 3 8, the signal stitch 3 5 2, and the solder pad 3 0 6 are usually made of copper. However, many other conductive materials can also be used as a ground connection under the device connection area 332 and the photonic device 312 formed thereon, which passes through the inside of the ceramic block 3 1 8. The ground connection structure facilitates the electrical connection between the photonic device and the wafer contact assembly (CSA) over the link contacts 304. In the illustrated embodiment, the ground connection includes a ground channel 3 6 1 and a ground line 3 62. The ground connection is electrically connected to the device connection area 3 3 2 (and thus to the associated photonic device 3 1 2) and a corresponding solder pad 3 06. As such, a ground connection electrically connects a photonic device 3 1 2 to a wafer subassembly (CSA) link -14- (11) (11) 200417764 contact. The ground channel 3 6 1 is made of metallized holes in one or more ceramic layers 3 50, and the associated ground line 3 62 is constructed on a ceramic layer 3 50. As with the signal connection, the ground channel 3 6 1, the ground wire 3 6 2, and the solder pad 3 0 6 are usually made of copper. However, many other conductive materials can also be used. It should be noted that the ground wire 3 62 may include a single ground wire, to which all photonic devices 3 1 2 are electrically connected, and thus grounded. Alternatively, and preferably, the ground wire 3 6 2 may include multiple ground wires, and each photonic device 3 1 2 may be individually connected. This consistent implementation provides better interference prevention. Another embodiment of the present invention is shown in FIG. 5 A - 5 Β. This embodiment implements another contact pad structure. Fig. 5A is a sectional view of an embodiment of a ceramic block. Fig. 5B is a plan view of the front surface of the ceramic block embodiment shown in Fig. 5A. The cross-sectional view of Fig. 5A is taken along the line A-A 'of Fig. 5B. The publication previous Example, the ceramic of the ceramic block 514 shown can be used for the optical subassembly (OSA) as used in the optoelectronic module. The ceramic block 514 has a front surface 518 and a bottom surface 520. The illustrated embodiment includes a device connection area 5 3 2 (cathode pad) formed on the front surface 518. The photonic device 512 is constructed on the device connection area 532. Moreover, the contact pads are formed on the front surface 518 of the ceramic block 514. In the embodiment shown, the contact pads include a first set of contact pads 5 3 8 and a second set of contact pads 5 3 9. The first group of contact pads 5 3 8 and the second group of contact pads 5 3 9 are arranged alternately with each other. This is easier to see in Figure 5B, which shows that the first group of contact pads 5 3 8 and the first group of contact pads 5 3 9 offset the parent fault structure. This structure allows the photonic device 5 1 2 to be more separated from the contact line 5 3 3 of the contact pads 5 3 8 and 5 3 9. This increases the isolation to reduce crosstalk. This has featured in many photonic devices 5]? -15 > (12) embodiment (12) 200 417 764 of the embodiment is more advantageous. Generally speaking, the use of a [eta] of the photonic device, a first set of side η / 2 bond pad constructed in the photonic devices and a second group η / 2 bond pad constructed in the other photonic devices side. As in the previous embodiment, the front surface 5 1 8 includes contact pads 5 3 8 and 5 3 9 formed thereon. For the first group of bonding pads 5 3 8, the signal is connected through the inside of the ceramic block 5 1 4 to electrically connect the first group of contact pads 5 3 8 to the solder pads 306 formed on the bottom surface 520 of the ceramic block. In this way, the photonic device 512 can be connected to the link contacts on the wafer subassembly (c s a) and finally to the associated semiconductor die in the CSA. As mentioned above, the signal connection includes signal channels, signal traces, and corresponding contact pads and solder pads. Referring to FIG. 5A, a contact pad 5 3 8 includes a signal channel 5 5 1, which passes through one or more ceramic layers 550 of the ceramic block 514. The signal path 551 is electrically connected to one of the signal traces 5 5 2 formed on one of the ceramic layers 5 50. The signal trace 5 5 2 extends to the bottom surface 5 2 0 of the edge of the ceramic block 5 1 4, where a solder pad 5 06 is formed thereon. Similarly, for the first group of bonding pads 5 3 9, the signal is connected through the inside of the ceramic block 5 1 4 to electrically connect the second group of bonding pads 5 3 9 to the bottom surface of the ceramic block 5 2 0. Welding pad 3 0 6. The signal connection of the contact pad 5 3 9 includes a signal channel 5 6 1, which passes through one or more ceramic layers 550 of the ceramic block 5 1 4 and is electrically connected to a signal trace 5 formed on one of the ceramic layers 550. 62. The signal trace 5 62 extends to the bottom surface 5 2 0 of the ceramic block 514, where a pad 5 06 is formed thereon. In the illustrated embodiment, a single ground wire is used. Moreover, the ceramic block 5 1 4 includes a ground connection, and the channel ceramic block 5 1 4 is inside. As mentioned above, each ground connection is electrically connected to the device connection area 532 (and -16- (13) 200417764 to the associated photonic device 5 1 2) and a corresponding solder pad 5 0 6. In this way, the ground connection electrically connects a photonic device 5 1 2 to a wafer sub-assembly (C S A) uplink connection point. The ground channel 571 is formed in one or more ceramic layers 5 50, and an associated ground line 5 7 2 is formed on a ceramic layer 5 50. It should be noted that the illustrated ground wire 5 7 2 may include a single ground wire, and all the photonic devices 5 1 2 are electrically connected thereto, and thus grounded. Alternatively, and preferably, the ground wire 5 7 2 may include multiple ground wires, and each photonic device 5 1 2 may be individually connected.

Another embodiment of the present invention is shown in FIGS. 6A-6C. Fig. 6A is a sectional view of an embodiment of a ceramic block. Fig. 6B is a plan view of the front surface of the embodiment of the ceramic block shown in Fig. 6A. Fig. 6A is a sectional view taken along line 6a-6a 'of Fig. 6B. The publication on the previous Example, the ceramic block 614 shown in FIG optically sub-assembly (OSA) as used in the optoelectronic module.

A ceramic block 614 having a front surface 618 and a bottom surface 620. The illustrated embodiment includes a device connection region 632 (cathode pad) formed on the front surface 618, and a photonic device 612 formed thereon. The contact pads 638, 639 are constructed on the front surface 6 1 8 and are electrically connected to the photonic device 6 1 2 using a bonding wire 6 3 3. As shown in FIG. 6B, in this embodiment, the contact pads include a first group of contact pads 6 3 8 and a second group of contact pads 6 3 9 configured to be staggered from each other. In this implementation, the photon device 612 can be implemented as a first group of photon devices 6 1 2 ′ and a second group of photon devices 6 丨 2 ″, which are electrically connected to the first group of contact pads 63 8 and a second group, respectively. 9. this contact pad 63 may be configured so that the contact line of separation between the others 633, thereby reducing crosstalk. Similarly to the previous embodiment, the photonic device 612 is connected to signal pad 606 of the connection as described elsewhere in this patent constructed This signal connection passes through the inside of the ceramic block -17- (14) (14) 200417764 6 1 4 to electrically connect the photonic device 6 1 2 to the pad 606 formed on the bottom surface of the ceramic block. As mentioned above, the signal The connection includes a signal path 651, a signal stitch 6 5 2 and the corresponding contact pad 6 3 8 and a solder pad 606. Referring to FIG. 6A, one of the signal connections to the contact pad 6 3 8 includes a signal path 651, which is through a ceramic block 614. one or more ceramic layers 650. the signal path 651 is electrically connected to one of the ceramic layers 650 constructed by one of the signal trace of an edge of the bottom surface 620 of the ceramic block 52. 6 614 of signal trace 652 extends to Here, a solder pad 6 0 6 is constructed thereon. Similarly, for the second set of bonding pads 639, the letter Connected through the inside of the ceramic block 6 1 4 to electrically connect the second set of bonding pads 63 9 to the solder pads 606 formed on the bottom surface 62 0 of the ceramic blocks. The signal connection of the contact pads 63 9 includes a signal channel 681 ( (Represented by the dotted line), which passes through one or more ceramic layers 650 of the ceramic block 614 and is electrically connected to a signal trace 6 82 (by a dotted surface) constructed on one of the ceramic layers 650. The signal trace 682 extends To the bottom surface 620 of the ceramic block 614, where a pad 606 is constructed. The embodiment shown uses two ground connections. The two ground connections pass through the inside of the ceramic block 6 1 4. The ground connection electrically connects the photonic device 6 1 2 to the associated solder pad 606. In the illustrated embodiment, the first group of photonic devices 6 1 2 'associated with the first group of bonding pads 63 8 contacts the first ground wire 6 7 2. A first The ground channel 6 7 1 is electrically connected to the device connection area 632 of the first group of photonic devices 612 ′, and also to the first ground line 6 7 2. The first ground line 6 7 2 is electrically connected to the corresponding pad 6 0 6. thus, a first interconnection is electrically connected to photonic devices 612 to wafer sub-assembly (CSA) on the contact link. it is noted that the ground 672 may be shown Contains a single ground wire, where all the first photonic devices 6 1 2 ′ are electrically connected, and thus -18- (15) (15) 200417764 ground. In this implementation, a single ground wire 6 72 is constructed of ceramic Layer 6 5 0 to form a first ground plane 6 0 1. Or, and preferably, the first ground line 6 7 2 may include a plurality of individual ground lines, and each photonic device 6 1 2 ′ may be individually Ground. Moreover, the second ground is connected to the inside of the channel ceramic block 6 1 4. The second group of bonding pads 6 3 9 is associated with the second group of photonic devices 6 1 2 ”contacting the second ground wire 6 6 2. This place is electrically connected to the photonic device 612 ″ to the associated pad 6 06. A second ground channel 6 6 1 is electrically connected to a device connection area 6 3 2 of the second group of photonic devices 6 1 2, and to a second ground line 6 6 2. The second ground wire 6 6 2 is electrically connected to the corresponding solder pad 6 0 6. In this way, a second ground connects the electrical interconnection photonic device 6 1 2 ”to the link contact on the wafer subassembly (csa). It should be noted that the second ground line 6 62 shown may include a single ground line, all photonic devices 61 2 "is electrically connected here and is thus grounded. In this implementation, a single ground line 662 is formed on the ceramic layer 650 to form a second ground plane 602. As mentioned above, the second ground wire 662 may include multiple individual ground wires, and each photonic device 6 1 2 ″ may be individually grounded. Alternatively, a shielding plane 690 may be introduced in the first group of photonic devices 6 1 2 ′ and the first Two groups of photonic devices 6〗 2 ″ between the two groups of electrical connections. The shielding plane 6 9 0 includes a metallic material and a shielding layer 6 9 9, which is configured to reduce crosstalk between the first group of photonic devices 6 1 2 ′ and the second group of photonic devices 6 丨 2 ”. This shielding plane 690 includes holes So that the channel passes through the shielding plane 690. This can be shown in Figure 6C. Figure 6C shows an embodiment of the shielding layer 6 99 of the principles of the present invention. The shown shielding layer 699 includes holes 700, 701, which allows the channels and electrical connections to be accessible. Pass. For example, hole 7 0 0 allows the ground channel 6 61 to pass, and hole 7 0 1 -19- (16) 200417764 allows the signal channel 681 to pass. Moreover, each photon is connected separately and a separate signal is connected. In this case, this shield can be connected to signal and ground.

Referring to FIG. 7, the embodiment of the ceramic block includes implementation, wherein the interval pitch between the contact pads 702 of the pads is greater than the interval pitch between the individual photonic devices 703 of the associated one. In this way, the closing line 7 04 (such as a metal-glued wire) shows that when it extends away from the photonic device pad 70 2, it fan-outs. The isotropic contact pads 702 are separated from each other by a distance greater than that of each photonic device. This fan-shaped split configuration increases the capacity of each electrical connection line 704 because the distance between each connection line increases. Each of the contact may also have a greater distance to the contact point a large space and constructed of C S A touch. Specifically, a larger space is provided for mutual interaction. One of the specific implementations of the principles of the present invention is a simple implementation of a two-channel photoelectric receiver-transceiver. To be shown in FIG. 8, this system is made on an OSA800, and this includes a The ceramic block 810 is manufactured by the LTCC method. The ceramic block 810 includes a transmission channel, the transmitter photonic device 801 (e.g., a semiconductor laser device channel, which comprises a light receiving photonic devices 802. Photonic po 802) arranged in a standard format MPO, serve to standard Fiber Access . This embodiment may include shielding to additionally reduce crosstalk. 80 1, 8 02) is electrically connected to the contact pad 8 0 3. And, contact! The electrical connection 8 0 5 through the ceramic block 8 1 0 (set by a dotted line and including one structured in each pair, a group of contact groups are connected to the device electrical connection 7 0 3 to extend out of the contact, 俾 7 0 Transmitter for connecting solder balls on upper and lower shielded contact pads 702. This transceiver uses HTCC or contains a light) and a receiving device (80 1, ferrule device with photon) Device (塾 8 0 3 is shown by the general manager) -20-(17) 200417764 is electrically connected to the pad 8 0 4. In the embodiment shown, a two-level flat ground connection is used to electrically connect the ground 8 0 6 ( It is indicated by the dotted line ，, which also shows the inside of the ceramic block 8 1 0) The electrical connection ground to the pad 8 0 8. Shielding is also optional. CSA820 includes an electric winding connection 82], which can be electrically connected to the OSA pad 804, 808, to electrically connect the photonic device of OSA800, one of the semiconductor wafers (not shown) wrapped in 802 to CSA 8 2 0 The embodiment of the present invention has less crosstalk, lower parasitics, reduces jumps, and increases connection density , and easier to control the extent of the advantages of the impedance. in the embodiment, the channel modules 12 (12, or a transmitter or detector The combination can obtain about 2.5% of the total string on the data transmission rate of 3.125013] ^ By adjusting the interval between the contact pads, the width of the electrical connection, all the components are small and the interval can achieve a variety of electrical performance characteristics, such as by ceramic The small size is decided. The 0s A of the present invention can be made into various sizes and performance specifications, and is suitable for many different connectors and systems. For example, the OSA MPO connector is compatible, and this can be made by 2 optical fibers or 12 optical fiber ribbons ( And the familiar size and configuration) implementation. The circuit substrate of the present invention can be used in applications to connect two electrical systems. Moreover, the circuit substrate should be used on systems that are often small because of its small size, low cost, and electrical performance preferably Referring now to Figure 9A, a ceramic body is well known in the industry may be used microelectronic package of LTCC or HTCC manufacturing process step plurality of ceramic sheets, 920,930,940 '950' 960, 970 and the processing ~ 'onwards to the desired The ceramic body structure shown includes a shielding layer, a letter connection, and a ground connection. For example, the top layer 9 10 is the front surface of the ceramic body. The surface is shown to make the connection to 801 ground. Upset It is so large that it can be used with other kinds of defects. The Shanghai Institute 910 Formation No. Photon (18) 200417764 device and staggered contact pads are constructed on it. Then punch and punch a thin 9 1 0 to make a Pre-shaped, with channels, in which conductive materials such as metal awards or conductive materials reinforced, such as epoxy resins of silver, are used to form conductive channels 9 1, 9 2, 9 3, 9 4 on the sheet 9 1 0 in. The size and position of the equal zones are equivalent to the required circuit pattern. For example, the channel 91 is equivalent to an electrical interconnection structure, which is used for the letter connection of the first photonic device. Constructed a contact pad 91 on the metallic channel. Channels 92 and serve as ground connections, which pass deeper into the ceramic body. A device connection area may be formed on the channels 92 and 93. Channel 94 is used for another signal connection layer 920 containing other conductive channels, these are below channels 91, 93, and below. Further, a signal trace 95 constructed to extend throughout the sheet edge 92 billion. The signal trace 95 is below the channel 91 and is electrically connected thereto. 93 contains additional conductive channels, which are below the channels 93 and 94g. Furthermore, a ground wire 96 is constructed to extend all the way to the edge of the sheet 930. The ground 96 is below the channel 92 and is electrically connected thereto. Layer 940 contains a shield 97 'which contains holes, so that other connection channels can be constructed, which are below the channels and 94. The shielding layer 97 is made of a conductive material (for example, copper), and constitutes a conductive material that does not contact the channels 9 3 and 94 under it. Layer 95 billion contain other conductive channel in the channel 93 below this. Moreover, the signal line 98 is structured to extend to the edge of the sheet 95. The signal trace 98 is below the pass 94 and is electrically connected thereto. Layer 960 comprises a ground line 99, constructed to extend the entire edge 960 of the sheet. The ground wire 99 is under the channel 93 and is connected thereto. Finally, a bottom sheet 9 70 can be placed under the other sheets. Ordinary sheet of adhesive material, such as epoxy bonding together. It is better to choose the film, grease, and layer No. 93, 〇94, 〇Wire layer 93, and encapsulation of the track and extension. Each -22- (19) (19) 200417764 B platform type non-conductive material. In this way, sensitive electrical paths can pass through the ceramic body. Figure 9B shows the composition and the sintered ceramic body 900 of the side. The device connection pad 902 is formed on the front surface of the ceramic body 900, and the two-photon device 903,904 is formed on the device connection pad 902. The contact pad (only the nearest pad 905 is visible in the figure) is also formed on the front surface of the ceramic body 900. The edges of the conductive wires (9 5, 9, 6, 9 and 9 9) are exposed on the bottom surface of the ceramic body. The pads 9 0 1 are formed on the edges of the conductive wires (9 5, 9 6, 9 8, and 9 9). Thereafter the balls may be constructed to bonding pads 901, and these flows to the top of the weight of C S A link associated with the contact, in order to complete the optoelectronic module. Although the invention has been described in terms of several preferred embodiments, there are alterations, changes, and equivalents within the scope of the invention. It should also be noted that there are many other ways to implement the method and apparatus of the present invention. Therefore, the appended patent application should be interpreted to encompass all modifications, changes, and are equal within the spirit and scope of the present invention. [Brief Description of the drawings Referring to the following description and the accompanying drawings, the present invention can be best understood, and other advantages of 'In the drawings: Figure 1 is a simple perspective view showing an optical system configuration can be used ordinary Receiver - the optoelectronic module . Figure 2 is a simple perspective view of a conventional support block used in a common optical subassembly. Fig. 3 is a simple perspective view of the (20) (20) 200417764 embodiment of the photovoltaic module containing the 08 person of the present invention and the CSA. FIGS. 4A, 4B, and 4C, respectively a sectional view before a plan view of the surface before the ceramic block, the ceramic block and a bottom plan view of the bottom surface of the ceramic block display of Example. 5A-5B include cross-sectional and plan views of an embodiment of a ceramic block. An embodiment feature of another contact pad structure according to an embodiment of the present invention is shown. FIG 6A, 6B, and 6C show a simple yet another embodiment of the ceramic block, comprising a cross-sectional view, a plan view of the surface of the ceramic block prior to before, and the bottom surface of the bottom plan view of the ceramic block. Fig. 7 simply shows another embodiment of a ceramic block constructed, showing that, in accordance with the principles of the present invention, the electrical connections are fanned out when extending away from the photonic device. Fig. 8 is a simple perspective view of a two-channel photoelectric transceiver constructed in accordance with the principles of the present invention. Fig. 9A is a simple display of a ceramic laminated component used to construct a simple ceramic block embodiment according to the principles of the present invention. Fig. 9B is a simple plan view of the assembled and sintered ceramic laminated component shown in Fig. 9A. Component comparison table 3 00: Optical subassembly 3 02: Wafer subassembly 3 04: Uplink contact 3 0 6: Solder pad 24- (21) 200417764

3 0 8: Molding material 3 1 2: Photonic device 3 1 4: Ceramic block 3 1 8: Front surface 3 2 0: Bottom surface 3 3 2: Device connection area 3 3 3: Adhesive wiring 3 3 8: Contact pad 3 5 0: Ceramic layer 3 5 1: Signal channel 3 5 2: Signal trace 3 6 1: Ground channel 3 6 2: Ground line 9 1 0: Ceramic sheet

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Claims (1)

200417764 Π) pick, patented scope An optical subassembly may be interconnected with the optical fiber and the optical subassembly electrically interconnected wafer, the optical subassembly comprising: a ceramic block having a first surface and a second surface The ceramic block is made of one of a low-temperature co-fired ceramic and a high-temperature co-fired ceramic; at least one photon device is constructed on the first side of the ceramic block; at least one connection is made through the interior of the ceramic block, and each signal The connection is adapted to electrically connect a photonic device to a wafer sub-assembly; at least one ground; and at least one ground connection. The interior of the ceramic block is fired by low temperature light, and the photonic device is electrically connected to the associated ground of the at least one ground. 2 · The optical sub-assembly according to item 1 of the patent application scope, wherein at least one ground is electrically connected to the wafer sub-assembly. 3. If the application of the optical subassembly patentable scope of item 2, wherein at least one of the ceramic block by the inside. 4. The optical sub-assembly according to item 3 of the scope of patent application, wherein at least one photonic device includes a plurality of photonic devices; wherein at least one of the photonic devices includes a plurality of grounds; and wherein at least one of the photonic devices is connected through at least one of the grounds inside the ceramic block comprising a plurality of connected, each configured to serve a connector electrically connected to an associated photonic devices 〇5 place. If the application of the optical subassembly patentable scope of item 4, wherein each of the plurality of ground A metal shield is isolated from other grounds. 6. The optical subassembly according to item 1 of the scope of patent application, wherein -26-(2) (2) 200417764 at least one includes a single ground plane. 7. The optical subassembly of clause 6 of the patent application range 'wherein at least two comprise a ground plane. 8. The optical subassembly according to item 7 of the scope of patent application, wherein the two ground planes are separated from each other by a shielding plane. 9. The optical sub-assembly according to item 1 of the scope of patent application, wherein at least one photonic device includes a plurality of photonic devices; wherein a plurality of adhesive pads are constructed on the first surface of the ceramic block; wherein each The first end of one of the signal connections is electrically connected to one of the plurality of bonding pads, and each bonding pad line is bonded to an associated one of the plurality of photonic devices, thereby establishing an electrical connection to the photonic device; wherein, the plurality of contact pads Constructed on a second surface of a ceramic block; and a second end of each signal connection is electrically connected to one of the plurality of contacts 塾 This signal connection passes through the inside of the ceramic block to establish a photonic device and a plurality of contact pads Electrical connection. 10. The optical sub-assembly according to item 9 of the scope of the patent application, wherein a plurality of bonding pads are configured into two groups, a first group of bonding pads is configured on one side of a photonic device, and a second group of bonding pads is configured. The pads are constructed on the other side of the photonic device. Each group of adhesive pads is arranged so that the first group of adhesive pads and the second group of adhesive pads are staggered, and the bonding wires of each adhesive pad are staggered accordingly. 1 1. The optical sub-assembly according to item 9 of the scope of the patent application, further comprising: a semiconductor wafer sub-assembly having a top surface having exposed upper link contacts; and -27- (3) (3) 200417764 Among them, the optical subassembly including the ceramic block is placed on the top surface of the wafer subassembly, the 俾 contact pad is placed in electrical communication with the link contacts on the wafer subassembly, and at least one place is placed on the chain with the wafer subassembly. The contact points are in electrical communication. 1 and 2. The optical subassembly as the application of a first range of patents, wherein the wafer before the subassembly is a leadless leadframe package. 1 3. A photovoltaic module comprising: a ceramic block having a front surface and a bottom surface, the ceramic block is manufactured using one of a low-temperature co-fired ceramic and a high-temperature co-fired ceramic, the ceramic block includes, a device connection area , constructed on the front surface; photonic devices, devices constructed in the connection region; pad, constructed on the bottom surface of the ceramic block; electrical contact wire, through the interior of these ceramic block, the line comprises electrical contacts, the contact The pad is constructed on the front surface of the ceramic block; the signal connection passes through the inside of the ceramic block to electrically connect the contact pad to the associated solder pad; the adhesive wire is used to electrically connect the contact pad to the photonic device; the ground, this electrical connection To the selected pad; ground connection, which passes through the inside of the ceramic block, to connect the area g to the ground with an electrical connection device; and the semiconductor wafer subassembly, which has a top surface, which has exposed upper link contacts, of which the ceramic block The pads are placed on the top surface of the wafer subassembly, and the pads formed on the bottom surface of the ceramic block are placed in electrical communication with the link contacts on the wafer subassembly. 14. The photovoltaic module according to item 13 of the scope of patent application, wherein -28- (4) (4) 200417764 The module includes an optical transceiver, wherein the photonic device includes a light transmitter and A light receiver. i 5. The photovoltaic module according to item 13 of the scope of patent application, wherein the module includes 12 photonic devices. 16 · Application optoelectronic module as the first three patents of the range, wherein the ceramic block constructed prior to the contact pad structure is made of two sets of contact pads on the surface, a first set of contact pads serve to photonic devices constructed The first side and the second set of contact pads are formed on the second side of the photonic device. 17. The photovoltaic module according to item 16 of the scope of patent application, wherein each contact pad structure of the first group of contact pads is staggered with each contact pad of the second group of contact pads. . Optoelectronic module 18 if the application of the first six patents range, wherein the photonic device constructed in the connection region of the apparatus comprises a photonic devices [eta], where [eta] of integer of 2 or greater comprising; and wherein, The first group of contact pads includes an n / 2 contact pad, and wherein the second group of contact pads includes an n / 2 contact pad. . Optoelectronic module 19 if the application of the first seven patents range, wherein the photonic device constructed in the connection region of the apparatus comprises a photonic devices [eta], where [eta] of integer of 2 or greater comprising; and wherein, The first group of contact pads includes an n / 2 contact pad, and wherein the second group of contact pads includes an n / 2 contact pad. 20. The photovoltaic module according to item 16 of the scope of patent application, wherein the signal connection associated with the first group of contact pads is isolated from the signal connection associated with the second group of contact pads. -29- (5) 200417764 2 1. If the scope of patent application _ the distance between the bonding pads is greater than the related 2 2. — A photovoltaic module, a ceramic block with a previous ceramic layer, the ceramic block uses low technology One is manufactured, the ceramic block has a front surface, has a device photon device, is constructed on the bottom surface, has a pad structure, at least one internal electrical contact is flat on it, and at least one electrical contact line is electrically connected to the contact pad and related Adhesive wiring for electrically connecting at least one internal ground plane; at least one ground contact wire is connected to a selected pad; and a semiconductor wafer subassembly contact, wherein the ceramic block is placed on the bottom surface of the ceramic block Welding link contacts. 2 3. According to the scope of the patent application, which is structured before the ceramic block, the first group of contact pads is structured on the contact pads and structured on the photonic device; the photovoltaic module according to item 3, wherein Lianzhi Photon The distance between the devices. Including: the surface and the bottom surface, the ceramic block includes multi-temperature co-fired ceramics and high-temperature co-fired ceramics: a connection area and a contact pad are structured on the connection area; the connection area is formed on the connection area; At least one electrical contact line is constructed in the ceramic block through at least one electrical contact; the contact pad is in the photonic device; at least one ground contact line is constructed in the ceramic block thereon, and at least one ground contact line is provided with A top surface, which is exposed on the top surface of the linked wafer sub-assembly, and the structured pad is placed on top of the wafer sub-assembly; the photovoltaic module according to item 22, wherein the contact pad on the surface is made of Two groups of contact pads are on the first side of the photonic device and the second group is connected on two sides; -30- (6) (6) 200417764 wherein at least one internal electrical contact plane includes two internal electrical contact planes and one first internal electrical contact Plane and a second internal electrical contact plane; wherein the first group of contact pads are electrically connected to at least one electrical contact line formed on the first internal electrical contact plane, and among them, are formed on the first internal electrical contact plane At least Electrical contacts in electrical communication line associated with the pad; and wherein the first plane and the second internal electrical contacts inside electrical contact planes isolated from each other. 4. The optoelectronic module 2 of the application of paragraph 23 patentable scope, wherein at least one internal ground plane comprises a single ground plane having at least a line of contact, the at least one contact to the communication line is electrically connected to die pads And the selected pad 025. The photovoltaic module according to item 24 of the patent application scope, wherein the single ground plane includes a single ground contact line electrically connected to the device connection area and a selected pad . 26 · optoelectronic module as the application of the second range of three patents, wherein at least one internal ground plane comprises two ground plane, a first ground plane and a second ground plane, each having at least a line of contact, At least one ground contact line is electrically connected to the device connection area and the selected pad. 27 as the range of the second patent 6 of the optoelectronic module, wherein the first ground plane is electrically connected to the photonic devices associated with the first set of contact pads, and wherein the second ground plane is electrically connected to the first Two groups of contact pads are associated with photonic devices. 28. The photovoltaic module according to item 27 in the scope of the patent application, wherein the ground plane of the table and the first group of contact pads are isolated from the second ground plane and the second group of contact pads (7) (7) 200417764. The 29-second application of the optoelectronic module 23 patents range, wherein the photonic devices using wire bonding staggered configuration of contact pads electrically connected, serve the photonic device is electrically connected to each of the odd first set of contact pads of a contact pad the contact pad and the photonic device is electrically connected to an even number of the second set of contact pads. 3 〇. An optical sub-assembly, which can be adapted to be interconnected with the optical fiber and electrically connected to the wafer sub-assembly. The meta-sub-assembly includes: a ceramic block having a first surface and a second surface, the ceramic block low temperature co-fired ceramic and a high temperature co-fired ceramic manufacturing one; least one photonic device, constructed one on the first surface of the ceramic block; a plurality of electrical contact points' in electrical communication with the sub-assembly is adapted to a wafer, multiple electrical contact points constructed on the second surface of the ceramic block; and a plurality of electrically connected, through the interior of these ceramic block, to serve in a first surface of the photonic device is electrically connected to the ceramic block of the second face of the ceramic block a plurality of electrical contacts. 31 · The application of the optical subassembly 30 of the patent range, wherein the plurality of electrical contacts comprising signal and coupled connection, configured so that each photonic device is electrically connected to at least one electrical connector and connected to at least one . 32 · If the application of the optical subassembly 30 of patent range, wherein each electrical contact comprises a contact pad constructed on the first surface of the ceramic block, each contact pad in electrical communication with an association of photonic devices, and wherein each electrical contact comprises a pad constructed on the second surface of the ceramic block, each pad is adapted to be electrically connected to the sub-assembly on an associated one of the links contact the wafer. 3 3. The optical sub-assembly according to item 32 of the scope of patent application, wherein -32- (8) (8) 200417764, at least one photonic device is electrically connected to the contact pad using a contact wire; and among them, the structure of the contact pad Form two groups of contact pads, and arrange the first group of contact pads on one side of at least one photonic device, and the second group of contact pads on the other side of at least one photonic device, thereby increasing the distance between the contact lines. And thus reduce crosstalk. 3 4. The optical subassembly described in item 30 of the scope of patent application, wherein the ceramic block includes an internal shield and is configured to reduce crosstalk of the optical subassembly. -33-