SU1723671A1 - Data transmission device - Google Patents

Abstract

The invention relates to telecommunications and can be used in the development of equipment for the transmission of discrete messages over frequency-limited channels with intersymbol interference. The purpose of the invention is to improve noise immunity while simplifying the device. The device contains on the transmitting side an input matching unit 1, a signal coder 2, a first buffer memory unit 3, a fast forward Fourier transform computer 4, a second buffer memory unit 5, a multiplication unit 6, a permanent memory unit 7, a calculator 8, a fast Fourier transform transmitter 9, a digital-to-analog converter 10, a low-pass filter 11, an output matching block, and on the receiving side an input matching block 13, an analog-to-digital converter 14, an adaptive equalizer 15 consisting of the first block and 16 buffer memory, the first calculator 17 of the fast forward Fourier transform, the calculator 18, the corrections

Description

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unit 19, addition unit 20, second buffer memory unit 21, second fast forward Fourier transform calculator 25 and third buffer memory unit 26, signal decoder 23 and output matching unit 24. The goal is achieved by improving the convergence properties of the adaptive equalizer, application

The invention relates to telecommunications and can be used in the development of equipment for the transmission of discrete messages over frequency-limited channels with intersymbol interference.

The purpose of the invention is to improve noise immunity while simplifying the device.

The drawing shows a structural electrical circuit of the transmitting and receiving parts of the device.

The device contains on the transmitting side an input matching unit 1, a signal coder 2, a first buffer memory unit 3, a fast forward Fourier transform computer 4, a second buffer memory unit 5, a multiplication unit 6, a permanent memory unit 7, a calculator 8, fast Fourier transform calculator 9, digital-to-analog converter 10, low-pass filter 11, output matching block 12, and on the receiving side - input matching block 13, analog-to-digital converter 14, adaptive equalizer 15, first block 16 of the buffer memory and, the first calculator 17 of the fast forward Fourier transform, the calculator 18, the correction block 1.9, the addition block 20, the second block 21 of the buffer memory, the calculator 22 of the fast inverse Fourier transform, the signal decoder 23, the output matching block 24, the second calculator 25 of the fast pr Fourier transform, third buffer memory block 26.

The data device operates as follows.

The binary data sequence is fed from the input of the matching unit 1 to the input of the signal coder 2, which encodes into a 1 / PM tag of a group of no L bits into code words of length LL and then into signals with in-phase Ex and quadrature and components. The output of the signal encoder 2 receives the complex signals (a Ex +) to the input of the block 3 of the buffer memory. In block 3 of the buffer memory, it is formed in the presence of noise-tolerant coding, the implementation of the Hilbert transform in the frequency domain, and also due to the transfer of modulation-demodulation operations, the Hilbert transform, an increase in the reduction of the sampling rate, and the restriction of the gradient in the adaptive equalizer to the frequency domain. 1 il.

With the previous data sequence, the input data sequence of length 2N, which is fed to the input of the Fast Fast Fourier Transform (FFT) transmitter 4. After calculating the FFT of length 2N, the data sequence is fed to the input of the buffer memory block 5, which modulates the input data by cyclic shift of the spectrum

by 2N-FH / FM and doubles the sampling rate by cyclic permutation of the spectrum. In block 6 multiplication, a complex multiplication of the length N of the input data sequence is realized.

to the first half of the set of transmitting band-pass filter coefficients, which is the spectral characteristic of this filter sampled at a Fo 4FM frequency and output from the block

7 permanent memory. The calculator 8 serves to form the input spectrum of the calculator 9 of the fast inverse Fourier transform (OBPF) in accordance with the real OBPF algorithm. After

An OBPF of length 4N of a sequence of valid signals of length 4N is fed through a digital-to-analog converter 10, a low-pass filter 11 and an output matching unit 12 to the communication channel.

At the receiving side, the analog signal coming from the communication channel is fed through the matching unit 13 to the input of the analog-digital converter 14. From the output of the analog-digital converter 14, a sequence of valid data is fed to the input of the adaptive equalizer 15. In the adaptive equalizer, the receiving signal goes to the unit 16 buffer memory, where from the valid

The signals are generated first by a sequence of complex signals of length 2N. then this sequence is combined with the previous one into the group of N complex data and is fed to the input

fast forward Fourier transform calculator 17. From the output of the evaluator 17, the FFT data sequence is fed

to the input of the calculator 18, which performs the necessary transformations of the input spectrum in accordance with the algorithm of the real FFT. In addition, it performs the Hilbert transform in the frequency domain and reduces the sampling rate by half. The correction unit 19 serves to correct the linear distortions and performs the function of adaptively updating the coefficients of the corrector. In addition block 20, the summation of the two data sets from the outputs of the corrective block 19 occurs, which is equivalent to reducing the sampling rate to FM. In block 21 of the buffer memory, demodulation occurs by cyclically shifting the spectrum by -2N FH / FM. After the calculator 22 OBPF complex data is fed to the input of the signal decoder 23, in which the calculation of the adaptation error and decoding according to the maximum likelihood rule by the Viterbi algorithm takes place. From the first output of the signal decoder 23, the binary sequence is fed through the output matching unit 24 to the output of the device. From the second output of the signal decoder 23, adaptation errors are fed to the input of the evaluator 25 of the fast forward Fourier transform. From the output of the calculator 25 FFT, the adaptation errors are fed to the input of block 26 of the buffer, where the modulation and sampling rate is doubled by cyclically shifting the data by 2N FH / FM and then to the second input of the corrective block 19.

Claims (1)

Formula of data transmission device, containing on the transmitting side serially connected input matching unit and signal coder, fast fast Fourier transform computer, serially connected fixed memory unit and multiplying unit and successively connected fast Fourier transform computer, digital-analog converter , a low-pass filter and an output matching unit, the output of which is the output of the transmitting part of the device, and the input input matching the block is the input of the transmitting part of the device, and on the receiving side are the serially connected input matching unit and the analog-digital converter, the first calculator of the fast forward Fourier converter, the correction unit and the serially connected calculator of the fast inverse Fourier transform, the signal decoder and the output matching unit, the output of which is the output of the receiving part of the device, and the input of the input matching unit is the input of the receiving part of the device, characterized by then, in order to improve noise immunity while simplifying the device, it has been entered into it. on the transmitting side, the first and second blocks of the buffer memory and the calculator, the output of which is connected to the input of the calculator of the fast inverse Fourier transform, the output of the signal coder is connected to the input of the first block of the buffer memory, the output of which is connected to the input of the calculator of the fast direct Fourier transform, the output of the calculator the fast forward Fourier converter is connected to the input of the second block of buffer memory, the output of which is connected to the second input of the multiplication unit and the output of the multiplication unit is connected to the input of the calculator, and on the receiving side, the first buffer memory block, the calculator, the successively connected addition block and the second buffer memory block, the output of which is connected to the input of the fast inverse Fourier transform calculator, and the second fast fast Fourier transform calculator and the third block of buffer memory ti, the output of which is connected to the first input of the correction block, the output of the analog-digital converter is connected to the input of the first block of the buffer memory, the output of which is connected to the input the first calculator of the fast forward Fourier transform, the output of the first calculator of the fast direct Fourier transform is connected to the input of the calculator, the output of which is connected to the second input of the correction block, both outputs of which are connected to the corresponding inputs of the addition block, and the second output of the signal decoder is connected to the input of the second calculator fast forward Fourier transform.