SU1647923A1 - Frame sync pulse selector - Google Patents

Abstract

The invention relates to television technology and can be used in receiving and measuring television devices. The purpose of the invention is to improve the accuracy of selection. The HR sync selector contains an analog shift register 1, a threshold block 2, a digital shift register 3, an OR 4 item, a NOT 5 element, an analog switch 6. In this selector, the synchro mixture is fed to the register 1 input and through the threshold block 2 to register 3. At the output of register 3, using the element OR 4 and the element NOT 5, a frame sync pulse is generated with a logic level that controls key 6. At the output of key 6, a frame sync pulse is formed without shape distortion. This makes it possible to increase the accuracy of selection and to obtain information about signal distortions arising in the transmission line. 2 Il.

Description

1

The invention relates to television technology and can be used in receiving television technology and in measuring devices.

The purpose of the invention is to improve the accuracy of selection.

Figure 1 shows the block diagram of the selector sync pulses; 2 shows timing diagrams for his work.

The frame sync pulse selector contains an analog shift register 1, a threshold unit 2, a digital shift register 3, the element OR 4, the element NOT 5 and the analog key 6.

The selector works as follows.

From the clock bus, the registers are simultaneously clocked with pulses with a duration of period T, and information from their input simultaneously appears at the output (Fig. 1). The number of bits of the analog and digital registers is the same.

The input signal of the sync mixture enters the register 1 from the input of the device, and the register of the 3rd output of the threshold unit 2, which converts the input signal to the level of the logical potential. This signal, inverted by element 5, through element A permits the operation of register 3. The input signal is conducted by pulses of pulses at register 3 and appears at the output of register 3 (Fig. 2) simultaneously with analog information from the output of register 1. The signal from output Register 3 is a frame sync signal with a logic level and is fed to the corresponding receiver input Pr (shown in dashed lines) at the same time as the real information signal.

During the cycle before the occurrence of the selected sync pulse at the output of the shift register 3, the potential of the logical unit opens the key .6 and passes the real sync pulse with the amplitude and shape (i.e., distortions introduced by echoes) to the device output, which appears in the next beat at the output of the register 1. The delay per clock provides protection against distortions of the transient process in key 6. With the arrival of interference or a horizontal sync pulse, they pass to the output of the register 3, but this is ensured by choosing the number of N-bits of the registers provided by ivayuschih delay duration equal to NT ICG + tBp, where ICG - the duration of the horizontal sync pulse; tvr - the duration of the signal frame. In this case, the signal at the input of the register

3 ends earlier than it appears at the exit, i.e. the digital signal does not advance to the last register cell, and the corresponding zero potential at the input

through elements 4 and 5 resets the register 3 to the initial state.

A frame clock exceeding the duration of NT until the end of the input of register 3 appears on its first

output and through the second input of element 4 and element 5 does not allow the reset of register 3 at the time of the appearance of the sidebars (with a corresponding interruption of the frame sync pulse at the input). Thereby

frame selection is provided with and without tie-ins.

Thus, in the selector, a simultaneous appearance at the receiver input of the informational dedicated

personnel sync pulse, which increases the accuracy of selection and, accordingly, the accuracy of synchronization of television receivers.

In addition, the selection of a frame sync signal from the input signal without shape distortions allows one to increase the selection informational content of the device, i.e. select the signal without loss of quality information about its parameters.

Claims (1)

Invention Formula HR sync pulse selector containing a threshold unit, analog a key whose control input is connected to the first output of the digital shift register; an analog shift register, the input of which is a device input, characterized in that, in order to increase accuracy of selection, introduced the element OR, the output of which is connected to the input of the entered element NOT, the output of which is connected to the reset input of the digital shift register data, the input of the threshold unit is connected with the input of the analog shift register, the output of which is connected to the input of the analog key and is the first output of the device, the output of the threshold unit is connected to the data input of the digital register and the first input of the OR element, the second output of the digital shift register is connected to the second input of the OR element and is the second output of the device, the output of the analog key is the third output of the device, the clock inputs of the analog and digital shift registers are combined and are the input of clock pulses devices. 6 Ik be d HI Byyh A 6 ": GLFig. 2