SU1509824A1 - Device for instant assessment of daily run of mechanical eatch - Google Patents

Abstract

The invention relates to a measurement technique and can be used to measure the accuracy of a clock in production and repair shops. The goal is to increase the speed of the device and expand its functionality by measuring the accuracy of the clock with any standard period of balance oscillations. The device contains a sensor 1 time intervals, a driver 2 service impulses, a generator 3 of the reference frequency, a switch 4, a divider 5 with a variable division factor, an error detection unit 6, a control trigger 7, a mode switch 8, random access memory / RAM / 9, a converter 10 binary-decimal code, block 11 digital indicators. Introducing a forming 2 service impulses, a divider 5 with a variable division ratio, a control trigger 7, a switch of 8 modes and a RAM 9, changing the device connections will allow to measure the instantaneous daily run of the clock with any standard balance oscillation period, thus reducing by 3.5 times time of each measurement. 5 il.

Description

The invention relates to a measurement technique and is intended to determine the accuracy of a mechanical watch,

The aim of the invention is to increase the speed of the device and expand its functionality by providing measurement of the accuracy of the clock with any standard period of balance oscillations.

Figure 1 shows a diagram of a device for determining the instantaneous daily variation of a mechanical watch; FIG. 2 is a diagram of a reference frequency generator; 3-5, timing diagrams, based on the operation of the device for determining the daily running of the mechanical clock MrHOBejiHoro.

The device for determining the instantaneous daily run of the mechanical chixes (Fig. 1) includes a time-interval sensor 1, a driver 2 service pulses, a reference frequency generator 3, a switch 4, a divider 5 with a variable division factor, an error determination unit 6, a control trigger 7 , switch 8 of the mode, RAM 9, converter 10 of the binary-decimal code 11 digital indicators.

The output of the sensor 1 time intervals connected to the first input of the imaging unit 2 service pulses, to the second input of which is connected to the second output of the generator 3 of the reference frequency. The first output of the driver 2 service pulses connected to the first input. RAM 9, the second output of the driver 2 of the service pulses is connected to the input of the reference frequency generator 3, the second divider 5 with a variable division factor, the second input of the error detection unit 6, the second input of the control trigger 7, the first output of the reference frequency generator 3 is connected with the first input of the switch 4, the third output of the generator 3 of the reference frequency is connected to the third input of the switch 4, the output of the switch 4 is connected to the first input of the divider 5 with a variable division factor, the third input of which is connected to stroke switch 8 mode. The output of the divider 5 with a variable division factor is connected to the first input of the block 6 for determining the error

: STI, the first output of which is connected to the first input of the control trigger 7. The first output of the trigger 7 control is connected to the second input of the switch 4. The second output of the error detection unit 6 is connected to the second input of the RAM 9, the output of which is connected to the first input of the binary-decimal converter 10, the output of the binary-decimal converter is connected with an input block of 11 digital indicators. The second output of the trigger 7 is connected to the second home of the converter 10 of the binary-decimal code,

In the device for determining the daily daily run of a mechanical clock (Fig. 1), the generator 3 of the support-20 and ° C frequency (Fig. 2) contains the master oscillator 12, the counter 13, the buffer stage 14, the divider 15, and the output of the master oscillator 12 serves

the second output of the reference frequency generator 3 and connected to the first input of the counter 13; The output of the counter 13 is connected to the input of the buffer stage 14, the output of which is connected to the first input of the divider 1 and is the first

30 output generator-. 3 reference frequency. The output of divider 15 is the third output of the reference frequency generator 3. The input of the generator 3-reference frequency is connected to the second input

25 counter 13 and the second input divider 15.

A device for determining the instantaneous daily variation of a mechanical clock works as follows.

40 For clarification of work, use is made from diagram 16-27 of FIG. 3 (

25

- T

this l

45

50

55

). At the output of sensor 1 of time intervals, pulses are formed with a repetition period equal to the period of balance oscillations (curve 19) of the investigated hours. These pulses arrive at the first input of the driver 2 of the service pulses, where the formation of two service signals: Entry and Reset (curves 20 and 21, respectively). These signals are generated using high-frequency clock pulses from the reference frequency generator 3 (curve 16), which are fed to the second input of the driver 2 service pulses.

Signal Recording is rewritten in RAM 9 (curve

20, tt,) the contents of the counter of the error determination unit 6, the field of which is the initial setting (with a reset signal, curve 21) of the counter 13 and the divider 15 of the reference frequency generator 3, the error detection unit 6, the variable divider 5, the control trigger 7 ( (). The voltage O from the first output of the control trigger 7 (curve 22, tt Id) is fed to the second input of the switch 4, rearranging it so that its output receives pulses from its third input (cree 98246

In this device for determining the instantaneous daily movement of a mechanical clock, the capacity of the counter in block 6 for determining the error is chosen to be 3,600 units of counting. When choosing a general device structure, the expression for N is transformed as follows:

ten

N

3600-23 + 3600,

15

on the other hand

 ,

N

gap

WA 18, tp, t ":

t). These pulses through a divider 5 with a variable division factor are fed to the first input of the error determination unit 6. Divider 5 with a variable division factor is only intended to ensure the operation of the device for determining the daily variation of a mechanical watch with different balance oscillation periods. Therefore, to simplify the consideration of the operation of the device, it is possible to temporarily adopt the division factor of the divider 5 with a variable division factor that is equal to one. Then we can assume that

the pulses from the switch 4 output go directly to the first input of the determination unit 6

sti (curve 18, t td).

To determine the course of the clock with an accuracy of ± 1 s / day, it is necessary to measure the period of balance oscillations with an accuracy of 1 / N, where N is the number of seconds in a day, i.e. N 60-60-2A 3600 to X 24 86400.

Therefore, it is necessary to have a counter with a capacity of 86400 units of counting, choose its filling frequency (other). So, with a reference period of balance fluctuations (Tgg T-, g for a time equal to T, this counter is completely filled. From the expression for N it can be seen that can build compound

SchBO + SchBO + Sch24.

If it is accepted that the maximum, determined by the device error of the clock is equal to 3600 s / day, then the general structure of the counter can be represented as

Scr + Sc24.

Where.

T zsp

sssch

20 25 30

 gap

 3600-231, p +

from Tgg NT - 3600 T. „.

From this expression it is clear that it is possible to divide the cycle of operation of the device into two stages, and in the first stage to fill the counter (with a capacity of 3600 units of counting) with pulses, the repetition period of which is 23 times longer than the period selected for a given period of oscillation of the filling frequency ( T 23 Tldp), and in the second stage 35

40

gag

fill the counter with pulses with the period of the selected frequency (T T, g). The second stage of the device operation is called the measuring interval. To determine the beginning of the measurement interval, the counter overflow time (with a capacity of 3600) of the error detection unit 6 is used when filling it with pulses with a period T .. At this moment, the first output of the error detection unit 6 results in a signal- 5 incoming at the first input

trigger 7 C, transfer it to state 1 (curve 22, t td). The voltage 1 from the first output of the control trigger 7 goes to the second input of the switch 4, rearranging it so that its output receives pulses from its first input (curve 18, t d. T 10).

Thus, from the output of the switch 4, the first input of the divider 5 with a variable division factor in the first period of operation of the device (t "i t) receives impulses, .for50

55

Mined at the output of the divider 15 generator 3 reference frequency, and in the second period (t) the pulses from the input of the divider 15 generator 3 reference frequency. The division ratio of the divider 15 of the reference frequency generator 3 is 23.

Figures 3-5 (curve 18) show the signal at the output of switch 4. To illustrate, the time diagrams show the work of the four lower-order bits of the error determination unit 6 (curves 23, 24, 25, 26, respectively) and the overflow trigger ( curve 27), determined by the sign of the measurement result.

The pulse (20 tt curve), the state of the counter, the error determination block 6 and the overflow trigger is transferred to RAM 9. This is the code from the output of RAM 9 enters the nod converter 10 of the binary-decimal code, from the output of which information about the magnitude and sign The clock movement errors are input to the block of 11 digital indicators. The operator reads the zero value of the accuracy of the clock.

Figure 4 shows the time diagrams for explaining the operation of the device for determining the instantaneous daily running of a mechanical clock for the case when the clock is in a hurry (TBS, A T ,, "ft), and figure 5 is for the case when the clock is lagging ( ) The first stage of operation (tt d) of the device in this case is no different from the operation of the device for the case of Tc ((reference

In momedt t tp, the counter of the error determination unit 6 is reset (curves 23-26) and set to 1 overflow trigger

(curve 27).

During the time from t td to t t-j, the counter of the error determination unit 6 is filled. For the case TRDD 1 T, d (the time T begins before the counter 6 is filled in determining the error and the overflow trigger state changes (Fig. 4, curves 20, 23-27, t t.,). Pulse Jamming (curve 20, t tj) The state of the counter of the error determination unit 6 and the overflow trigger is transferred to the RAM 9. The value of the error of the course of the clock is entered in the return code.

five

0

five

0

five

0

five

0

Tgg (l counter of the error determination block 6 has time to completely fill and reset (curves 23-26, t), the overflow trigger is also set to the state O (curve 27, t). Until t tj, the counter of the error definition block 6 continues count the pulses arriving at the input of the error determination unit 6. At the moment of arrival of the second pulse of the balance of the clock, an impulse is generated Entering (tt), which the counter state of the error determination unit 6 is transferred to RAM 9. Since at this point (t ti.j) overflow trigger is in state G, the RAM 9 in the sign bit zanosits O error value of the clock in the forward zanosits code ..

From the output of RAM 9, the code of the error of the clock moves to the decoder 10, from the output of which information. The magnitude and sign of the error is fed to the input of a block of 11 digital indicators. The operator reads the value of the maturity (s / day) with the sign -. g.

The time t is the beginning of a new cycle of operation of the device.

To simplify the operation of the device for determining the instantaneous daily course of a mechanical clock, it was considered on the assumption that the division factor of divider 5 with a variable division factor was one. During actual operation of the device, this coefficient is different from unity, and it is equal to a specific value for each value used by the clock mechanism.

The basis for constructing a divider 5 with a variable division factor is the K155IE8 chip, the operation of which is described by the expression

f M fM out 64

where M F 2 + E 2 + D 2 +

55

+ C 2 + B 2 +

A2

Symbols A, B, C, D, E, F - the symbol of the inputs for controlling the operation of the microcircuits, to which the control signals O or 1 are received.

The task is to calculate the value of M for each value of the standard period, oscillations of the balance of hours and determine the frequency of the master oscillator 12 of the generator 3 of the reference frequency, at which N 6060-24 86400.

The calculation results show that the frequency of the master oscillator 12 must be 1228800 Hz, then the frequency of the pulses at the first output of the generator 3 of the reference frequency is equal to 307200 Hz.

For standard values of periods of balance fluctuations of 0.2; 0.33; 0.36; 0.4; 0.5; 0.6 with M coefficients must be 90; 54; 50; 45; 36; 30 respectively.

Claims (1)

Invention Formula A device for determining the instantaneous daily running of a mechanical clock, comprising a time interval sensor, a switch, an error detection unit, a frequency reference generator, a binary-decimal code converter, and a block of digital indicators, the first output of the reference frequency generator being connected to the first input of the switch, and the output of the converter of the binary-decimal code - with the input of the block of digital indicators, which is, in order to improve speed and functionality by providing measurement of the accuracy of the clock with any standard period of balance oscillation; a service driver, a mode switch, a divider with a variable division factor, a control trigger, an operative memory, and a time sensor output are connected to the first the input of the driver service pulses, the first output of which is connected to 5 | The first input of the operational storage (the switching device, the switch switch is connected to the first input of the divider, the output of which is connected to the first input of the error detection unit, the first output of the error detection unit is connected to the first input of the trigger, the first output of which is connected to the second input switch, the second generator output 5 of the reference frequency is connected to the second input of the driver service pulse, the second output of which is connected to the input of the reference frequency generator and to the second inputs of the divider, 0 of the unit for determining the error and the trigger, the second output of which is connected to the second input of the converter of the binary-decimal code, the second output of the unit for determining the error is connected to the second input of the operational  I remember (its devices, the output of which is connected to the first input of the converter of a binary-decimal code, the third output of the reference frequency generator is connected to the third input of the switch, and the output of the mode switch to the third input of the divider. 0 l2 4- J "0" -J- j4J4J- "04- - j40" with A 40-, "j- j- -j - -" - a- - - - J t "o 51 § w Uh s "M fo If" o t ;;:; MS CM CM