SU1580507A1 - Digital device for controlling thyristor converter - Google Patents

Abstract

The invention relates to a converter technique and can be used for pulse-phase control of a three-phase bridge thyristor rectifier. The aim of the invention is to simplify the device and eliminate the asymmetry of the output voltage. Essence: the device is equipped with a trigger, the first input of which is connected to the output of the comparison unit, an annular counter with the number of corrective outputs K = 60 / a, where a is the price of the lower bit of the binary code, electra / discharge, and six elements AND the trigger output is connected to the permissive input of the ring counter, the counting input of the ring counter is connected to the reference frequency generator, the first counter output is connected to the pulse distributor, each output of the pulse distributor is connected to the first input of the corresponding element I, the output of each element And is connected to the corresponding amplifier-shaper, the output of the last amplifier-shaper is connected to the second trigger input and the installation inputs of the ring counter and pulse distributor, and the second input of each element And is connected to the corrective output of the ring counter. 1 il.

Description

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WITH

with

WITH

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6 comparisons, block 5 specifying the displacement, adder 4, pulse distributor 9, elements AND 10-15. At the moment of equality of the codes at the outputs of the counter 3 and the adder 4, the block 6 sets the trigger 7 to one state and the counting is enabled by a ring lock 8. Depending on the required / head

The invention relates to a converter technique and can be used But for pulse-phase control of a three-phase bridge thyristor rectifier.

The purpose of the invention is to eliminate the asymmetry of the output voltage and simplify the device.

The drawing shows a block diagram of the device.

The digital device for controlling the thyristor converter contains a generator 1 of the reference frequency, a driver of 2 sync pulses synchronized with the mains, a counter 3, an adder 4, an offset setting unit 5, a comparison block b, a trigger 7, a ring counter 8, a distributor 9 pulses, and 10 elements -15 and amps-shapers 16-21.

The device works as follows.

The generator 1 generates a sequence of pulses of stable frequency. Shaper 2 generates pulses at the time of transition of the network phase voltage through zero. These pulses are used to reset the initial zero state of the counter 3. In block 5, the number corresponding to the required offset is written, at which the rectified voltage is zero with a control code equal to zero. The adder subtracts from the reference code the offset of the control code.

The adder 4 together with the block 5 provides the control of the phase of the control pulses. At the moment of equality of the codes at the outputs of the counter 3 and the adder 4, the block 6 sets the trigger 7 to one state, thereby fixing the phase shift in relation to the moments of natural switching on.

After the trigger transition to one state, the pulse counting by the ring counter 8 is resolved. The appearance of a pulse at the first output of the ring counter 8 puts the distributor 9 into a state, at one of the outputs of which a trim is installed, the second input of one of the elements 10-15 is connected to the corresponding input of the counter 8. When pulses appear from both inputs of the element And, the output of the corresponding amplifier-shaper produces a thyristor unlocking pulse. 1 il.

unit, which arrives at the first input of one of the elements And 10-15. Depending on the required trim angle, the second input of one of the elements 10–15 is connected to the corresponding output of the ring counter. When pulses appear in not both of the inputs of the element I, the latter opens and an output pulse of the thyristor is generated at the output of the corresponding amplifier 16-21.

When the input element And is shifted to the first output of the ring counter, the thyristor tyranny angle θ decreases, and increases with removal. This eliminates the asymmetry of the output voltage in the presence of asymmetry of the input three-phase voltage. Appearance at the output of the last amplifier maker. 21 pulses sets the distributor 9 pulses, the ring counter 8 and the trigger 7 to the initial state.

The size of the ring counter 8 is determined by the formula

TO

60

2 minutes

where “min is the price of the younger bit of the binary code, email. g happy / razd.

Claims (1)

The device can be used to control several converters simultaneously, the angles of unlocking the thyristors to highs differ from ns 0 - 50 zl.grad. A digital device for controlling a thyristor converter, comprising a reference frequency generator, the output of which is connected to the input of the first counter, the installation input of which is connected to the output of the clock generator, and the output - with the first input of the comparator unit, the adder, the first input of which is connected to the output of the setting unit bias, the second input is designed to connect to the source control code, the output of the adder is connected to the second input of the comparator unit, the pulse distributor and the whether the formers by the number of thyristors, from the microwave frequency, the first output of the counter characterized by the fact that, in order to eliminate it, it is connected to the pulse distributor, no output voltage asymmetry and each output of the pulse distributor simplifying the circuit of the device, it is supplied-connected to the first input by a trigger; the first input is a co-5 element And, the output of each element dinene with the output of the comparison unit, the ring-I is connected to the corresponding amplifying counter with the number of corrective -former, the output of the last secondary output is K 60 / d, where a is the price of the junior-former is connected to the second binary code bit, zl.grad / bit, and trigger input and setup inputs six elements And, moreover, the output of the trigger-10 ring counter and imiger distributor is connected to the enabling input of the pulses, and the second input of each element And ring counter, counting input ring-connected to the corrective output The first counter is connected to an eta-ring counter generator.