SU1417213A2 - Remotely controlled quasi-electronic crossing switch of communication channels - Google Patents

Abstract

The invention relates to telecommunication and m. used in communication networks for switching telephone, telegraph and data transmission channels. The purpose of the invention is to provide an indication of channel conditions. The device contains a register of 1 commands, a register of 2 command codes, a block of 3 decoders, a program sensor 4, a marker 5, a switching field 6, a block of encoders 7, a control panel 8, a drive 13 containing a shift register 14, keys 15, memory elements 16. Counter 9 of the array of channel numbers, register 10 of the higher number, block 11 of comparison, r-r 12 clock pulses are entered into the device. The switch's operation in mapping free channels continues until the channel number coming from the output of counter 9 in block 11 coincides with the channel number recorded from the output of register 10, i.e. until the entire specified channel range is monitored. At the same time, the output of block 11 is a signal that will stop Mr. 12 and set shift register 14, memory elements 16 of drive 13, elements of the console display 8, counter 9, and register 10 to the initial zero state. I il. cl

Description

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The invention relates to communication technology and can be used in networks, communication for switching telephone, telegraph channels and data transmission channels and is an improvement of the device according to the main author. St. No. 462312.

The purpose of the invention is to provide an indication of channel conditions.

The drawing shows a functional electrical circuit of a cross-connect quasi-electronic switch of communication channels.

The cross-country quasi-electronic switch contains a register of 1 commands, a register of 2 command codes, a block of 3 decoders, a sensor of 4 programs, a marker 5, a switching field

ten

enters marker 5 and in the next memory element 16-2. In addition, with this clock pulse, the register 14 is shifted by one and prepares a key 15-2 for writing information from the memory element 16-2 to the console 8.

The switch's operation in mapping free channels continues until such time as the channel number, coming from the output of counter 9 to block 11 of the comparison, does not coincide with the channel number recorded from the output of register 10, i.e. until the entire specified channel range is monitored. At the same time, at the output of block 11, Vits Sig6, block 7 encoders, control panel 8, 15, which will stop the generator 12 and set the counter 9 of the channel number array, register the shift register 14, memory elements

16-1, ..., 16-p accumulator 13, indication elements-console 8, counter 9 and register 10 V

10 higher numbers, a comparison unit 11, a clock pulse generator 12 and a drive 13, which contains a shift register 14, keys 15, memory elements 16.

A cross-linked quasi-electronic switch of communication channels with remote control works in the following manner.

From the control panel 8, through the block 7 encoders, the young 20 are sequentially entered.

initial "zero state.

Claims (2)

Invention Formula A cross-quasi-electronic switch of communication channels with a remotely controlled number (N) of the controlled range of 25 auth. St. No. 462312, which is different in counter 9 of the array of channel numbers and is old in that, in order to provide indication of the channel status, a counter of the channel number array is inserted that connects the number (M) in series to the higher number register 10, and the generator 12 is started. impulse generator 12 information the higher-order number register, the comparative-lower block from counter 9 is entered, Qi and the clock, the second parallel to marker 5 and to the first memory element 16-1 of the accumulator 13. Moreover, this information is written off to the control unit 8 in the event that this memory temperature 16-1 receives a receipt of an unused the input of which is connected to an additional m output of the control panel, while the output of the clock pulse generator is connected to the first inputs of the accumulator and the counter of the channel number array, the first and the channel through the public key 15-1 accumulates the second additional outputs of the block 13 from the additional output of the token 5. the encoders are connected to the first input and the switch 15-1 opens when two signals arrive - “1 from the output of register 14 the high number master and the second input of the array of channel numbers, respectively, the output of the comparison unit is connected to the second input of the accumulator, the first additional receipt from the additional output of the marker 5. the high number master and the second input of the array of channel numbers, respectively, the output of the comparator unit is connected to the second input of the accumulator, the first additionally monitored channel is occupied (by the control panel input, connected to another channel number), then qi-. the tantsi from the additional exit of the marker 5 does not arrive, thus the key 15-1 does not open and accordingly does not charge the main input of the high-order register and the third input of the counter of the channel number array, the output of which is connected to the second input of the comparison unit, is an additional information about the junior number from the dz element of the marker input and the third input to the accumulator 16-1 on the display element of the control panel 8 of the control. The next clock pulse generator 12 adds in the counter 9 "unit, i.e. forms the number +1, which since its release the bodies, the accumulator outputs are connected to the second and third additional inputs of the control panel, respectively, and the auxiliary output of the marker is connected to the fourth input of the accumulator. enters marker 5 and in the next memory element 16- 2. In addition, with this clock pulse, the register 14 is shifted by one and prepares a key 15-2 for writing information from the memory element 16-2 to the console 8. The switch's operation in mapping free channels continues until such time as the channel number, coming from the output of counter 9 to block 11 of the comparison, does not coincide with the channel number recorded from the output of register 10, i.e. until the entire specified channel range is monitored. At the same time, at the output of block 11, the Vits sighed zero state is displayed. Invention Formula the higher number register, the block of which is compared with the additional m output of the control panel, while the output of the clock generator is connected to the first inputs of the accumulator and the counter of the array of channel numbers, the first and the high number master and the second input of the array of channel numbers, respectively, the output of the comparison unit is connected to the second input of the accumulator, the first additional input of the control panel, the second input of the upper number register and the third input of the array of channel numbers, the output of which is connected to the second input of the comparison unit, additional the bodies, the accumulator outputs are connected to the second and third additional inputs of the control panel, respectively, and the auxiliary output of the marker is connected to the fourth input of the accumulator.