SU1444750A1 - Device for computing modulo of complex number - Google Patents

Description

The invention relates to computing and can be used in specialized computers autonomously or as a functional expander as part of large computers.

The purpose of the invention is to reduce hardware costs by generating control signals without using control bits of arguments.

The drawing shows a functional diagram of the proposed device.

The device contains the first 1, the second 2 and the third 3 adders, the first 4 and the second 5 switches, the first modular convolution block three, the modulo-two adders block 7, the second modular convolution block 8, the adder 9 modulo three, 10 comparison block , input 11 of the first argument, input 12 of the second argument, output 13 of the module of the complex number, control output 14, and output 15 of the control bits.

The device works as follows.

Through the input 11 of the first argument, the input of the first component of the first adder 1 and the input of the first component of the third adder 3 receives the n-bit of the mantissa of the "direct code of the real part of the complex number (n - 1) of the higher bits and the lowest bit of the mantissa w comes also, respectively, to the input of the second term of the second adder 2 with a shift of one bit to the right and to the first information input of the second switch 5.

Through the input 12 of the second argument, the inverse input of the second operand of the first adder 1 and the input of the first term of the second adder 2 receive the n-bit of the mantissa b, the direct code of the imaginary part of the complex number, (n - 1) most significant bits and the younger of the mantissa b arrives respectively at the input of the second term of the third adder 3 with a shift of one bit to the right and at the second information input of the second switch 5. At the same time, the first adder 1 calculates the difference between the codes a.- b, the sign (GD) from the output of the first adder 1 on y The control inputs of the first 4 and second 5 switches. - The second adder 2 determines the sum of the Ml mantissa b with the mantissa a shifted one digit to the right: M2 b + y a.

The third adder 3 calculates the sum of the M2 mantissa and with the mantissa b shifted by one bit to the right; M2

 a + y b.

Codes Ml and M2 from the outputs of the second 2 and third 3 adders arrive at the first and second information inputs of the first switch 4, which transmits the Ml code at 3N 1 and the M2 code at 3N to output 13 of the device.

The second switch 5 transmits to the output the least significant bit of the mantissa at 3N 1 or the mantissa b at.

For the numbers of control gaps, the Dov in the CM module of the complex number M is noted that

M1 mod 3 (b + - a) mod 3- (b - a) mod 3;

thirty

M2 mod 3 (a + -J b) mod 3 (a - b) mod 3 -M mod 3

Thus, the control bits of a CM can be obtained by analyzing the difference between the codes a - b. For this, the difference between the codes a - b from the output of the first adder 1 is fed to the input of the second convolution unit 8 modulo three.

Here: at the output of the second convolution unit 8 modulo three, the test code KM1 of the code difference a - b is overloaded. Code KM2 enters the second input of block 7. At the first input of block 7 from the output of the first adder 1 receives the sign ZN. At the same time, the code SH2 is transmitted to the output of block 7 at ZN. About and the code is equal to KM 2, with MN 1.

Modulo three receives the inputs of the adder 9 with a code from the output of block 7 and a lost least significant bit o or b from the output of the second switch 5. Three control bits of the KM module of the complex number M obtained at the output of the adder 9 modulo 3 are fed to output 15 of the control bits device, as well as one of the inputs of the unit 10 comparison. To the other input of block 10, comparison arrivals

a number of M.

Comparison unit 10 compares the check bits of the complex module.

Bami, and produces a control signal, indicating the correct functioning of the device.

Claims (1)

DEVICE FOR CALCULATING THE COMPLEX NUMBER MODULE, containing three adders, two switches, the first convolution block modulo three, the adder block modulo two, the adder modulo three, and the input of the first argument of the device is connected to the input of the first term of the first adder, the inverse input of the second term of which connected to the input of the second argument of the device, the inputs of the second and first arguments of the device are connected to the inputs of the first terms of the second and third adders, respectively, directly and with a shift of one a discharge toward the lower digits with the inputs of the second terms of the third and second adders, respectively, the outputs of the second and third adders are connected to the first and second information inputs of the first switch, respectively, the control input of which is connected to the output of the sign bit of the first adder and to the control input of the second switch, the first and the second information inputs of which are connected to the least significant bits of the inputs of the first and second arguments of the device, respectively, the output of the first switch is connected to The first convolution block modulo three is the output of the module of the complex number of the device, the sign output of the first adder is connected to the first input of the adder block modulo two, characterized in that, in order to reduce hardware costs by generating control signals without the use of control bits arguments, the device contains a second convolution unit modulo three and a comparison unit, and the information output of the first adder is connected to the input of the second convolution unit modulo three, the output of which is single with the second input of the adder block modulo two, the output of which is connected to the first input of the adder modulo three, the second input of which is connected to the output of the second switch, the output of the adder modulo three is the output of the control bits of the device and connected to the first information input of the comparison unit, the second the information input of which is connected to the output of the first convolution unit modulo three, the output of the sign of equality of the comparison unit is the control output of the device. SU „1444750