SU1317660A1 - Voltage-to-number converter - Google Patents

Abstract

The invention relates to electrical measurements in the ranges of infra-low and sound frequencies and allows voltage coding by sweeping balancing in two contiguous clock time intervals followed by hardware calculation of the instantaneous voltage value using linear interpolation. The invention makes it possible to reduce the dynamic error of the transformation due to the voltage variation during the encoding process and to eliminate the uncertainty of the point in time to which the obtained code follows. For this purpose, a standard pulse voltage converter is a code — reversible pulse counters are introduced to store the initial information and logic elements, which, together with the indicated counters, form an interpolating digital computing device. 3 il. § (P p O9 vl O5 O)

Description

113

The invention relates to devices for electrical measurements in the range of infra-low and sound frequencies and can be used in the experimental determination of amplitude-phase frequency and transient characteristics of quadrupoles, in acoustic measurements, studies in the field of automatic control and regulation, in geophysics, biophysics, acoustics, oceanology, etc., in particular for encoding instantaneous values of a slowly varying voltage by means of a sweep balance (time l meat conversion).

. The purpose of the invention is to reduce the dynamic error of the converter.

FIG. 1 shows a block diagram of the device} in FIG. 2 - diagrams explaining the operation of the device j on f. C - graphs illustrating the metrological characteristics of the converter.

The device contains input 1 of the converter, input 2 Start, comparing device 3, generator 4 sawtooth voltage, block 5 up-1), first 6, third 7 and second 8 outputs, control input 9 of block 5, short-circuit trigger 10, key 11, the reference frequency generator -12, the first reversible counter 13 pulses, the counting input 14, the control input 15, the installation input 16 of the first reversing counter, the first 17 and the second 18 elements And, the first element OR 19, the second reversing counter 20, the installation input 21 , control input 22 of the second reversible counter, transmission unit 23 code a, fourth Element OR 24, counter 25 pulses second 26 and third 27 elements OR, third reversible counter 28, counting input 29, installation input 30, output 31, sign output 32 of the third reversing counter, third element 33, information output 34 of the converter , output 35 Ready and control input 36 of the third reversible counter.

The device works as follows.

Slowly varying voltage U (t) is fed to the input 1 of the converter (plot 37, figure 2). When the input 2 devices from. external source is served short start02

impulse (plot 39, figure 2). This pulse sets all three reversible counters 13, 20, and 28 into O, transmitted by control unit 5 to its first output 6 (plot 40, Fig. 2), and starts generator 4, which forms two periods of sawtooth voltage U (t) (plot 37, figure 2).

Simultaneously with the start-generator, the signal from the first output 6 of block 5 sets the O-RS flip-flop 10 (at times and). The voltages U (t) and U "(t) are compared using the device 3, which generates short pulses with equal voltages U (t) and U (t) at the instants of time and. These pulses RS-trigger 10 on the S-input

transferred to the unit state, so that at the output of this flip-flop a potential appears (plot 38, fig. 2).

The durations of the first (t,) and second (t, -T) output pulses of the RS flip-flop 10 are proportional to the instantaneous values of the signal being converted at time points, respectively, and, moreover, ti () U (t,)

and t2-2 (c / U) U (t2), where and „is the amplitude of the saw of generator 4 (plot 37, Fig. 2). Key 11 is open if its control potential (EP 38, FIG. 2) is level 1. In this case, it passes to its output the packets from N

ent (f5t) and N ,, entCf о (tg- t) pulses of the reference frequency generator 12, where fj, is the frequency of the generator 12. The operation mode of all three reversing

counters (summation or subtraction) are determined by the potentials of the second 7 and third B outputs of block 5 (plots 41 and 42, Fig. 2), so that when the control inputs of the reversible counters arrive, the potential is zero and the subtraction mode is set. During the specified time interval through the element OR 2 to the counting input of the reversible counter 28 receives a pack of N pulses, so that at the moment the contents of this counter reaches the value - N. Plot 43 of FIG. 2 illustrates the change in time of the contents of the reversible counter 28. Elements And 17 and 18 at this time are closed by the potentials of the second 7 and third 8 outputs of the block 5, respectively, therefore the reversal counter codes 13 and 20 (plot

313

45, Fig. 2) in the range of CO, Sz does not change and remains equal to zero.

 The potentials of outputs 7 and 8 of block 5 (egoors 41 and 42, Fig. 2) are such that potential 1 is set at the control inputs of all three reversible counters and the counters are transferred to the summation mode. In this time interval, the signal of the second output 7 of block 5 unlocks the element AND 17, so that by the moment of time the codes Nj and, (plots 45 and 43, Fig.2) are fixed in the reverse meters 20 and 28, and signuN sign information of N is outputted on the output 32 of the reversing counter 28.

When the element And 17 is closed, and And 18 is opened by the potential of the plot 42 in FIG. 2. The pulse sequence of the generator 12 through the element and 18 passes to the counting inputs of the reversible counters 13 and 25. The overflow pulses of the reversible counter 13 through the OR element 19 arrive at the counting input of the second reversible counter 20. The modes of operation of all three reversible counters in this operation cycle of the converter are determined by the potential sign output 32 counters 28. This potential has a level of O when and a level of 1 with dN-sG. Taking into account the output signal levels of block 5 (diagrams 41 and 42, Fig. 2), we find that with lN70 all reversible counters operate in the subtraction mode, and in the summation mode.

When the third output of the block 5 occurs, a positive voltage drop occurs (plot 42, Fig 2). This differential through the fourth element OR 24 opens for some time the block of transmission of code 23 and the code N stored in the reversing counter 20 is recorded in counter 25. This counter is made subtractive, therefore at t72T its content is reduced to zero The zeroing pulse appearing at the output of counter 25 through the OR element 24 acts on block 23 and performs the next rewriting of the code of the reversible counter 20 into the counter 25. The zeroing pulse of the counter 25 through the element OR 26 is also fed to the counting input 29 of the counter 28 and reduces him

04

content by one if, or the content increases, if AN 0.

In the future, the contents of the counter

25 under the influence of the output pulses of the element And 18 is again reduced to zero, the next recording of the current code of the reversible counter 20 into the counter 25 is made, the change

per unit of content of the reversible counter 28, etc. This process continues until zeroing at the time point (plot 43, figure 2) of the reversible counter 28, after which the potential from output 31 (plot 44, figure 2) counter 28 closes the element And 18. The indicated potential is also output to the output 35 of the converter in quality signal readiness of information to be read by an external consumer. The required information number N the magnitude of the instantaneous value of the coded voltage is removed. From the outputs 34 of the reversing counter 20 (plot 45,

2).

The process of converting the N- and AN codes, performed in the device under consideration with., Is described by the algorithm:

Idml

N Nj -entU sign N ENj-sign / iNent j,

where N is the result of the conversion; D - capacities of reversive counters 13, 20 and 25.

Taking into account that when the expression to be subtracted in square brackets of this formula is much less than the value of N, N d-iN / D are obtained.

To find out which characteristic of the voltage to be converted corresponds to the obtained code N, an estimate is made of the derivative of the signal being processed:

dU (t) U (tt) -U (tO Nt-N,

dt, d, + d

where Find the estimate U (f) of the magnitude of the signal U (t) at

u (t) u (t,) - (t, -)

dt

UmNt ,, LK.

D

five,

Therefore: Nc (D / U) U (). Thus, the code N is proportional to the estimate OCf) of the instantaneous value of the voltage being generated at a fixed and known in advance moment of time t t. The encoding result argument does not change when the intermediate conversion results are changed arbitrarily — the values of N and Nj.

In Fig. 3, solid lines show the relative error (1) / U (1) for encoding the instantaneous value of the voltage U (t / ir) li / 4095) a + b (t /) + c (t / t) 3, which changes in time, according to the parabolic law, of the value of the coefficient b for a given set of values of the coefficient c, put into the cipher of the curves with and. The broken lines in FIG. 3 are the dependences of the relative error .e / jj -1 + NjU / DU (1) of the known prototype device for similar coding conditions. The graphs of FIG. 3 show that the proposed device has a significantly lower dynamic error than the prototype Tach at and c 0j18% versus, 78% for the prototype. If and, then with / "0,022%, whereas the error of the prototype device under these conditions; etc.

SU; 1.49% and

Claims (1)

Claim 35 Voltage converter - a code that contains a pulse counter and a control unit connected in series, a sawtooth generator, a comparator, a CK-trigger and a key whose second input is connected to a reference frequency generator, the second input of the comparator is an input bus that is different By the fact that, in order to reduce the dynamic error of the converter, the first, second and third elements AND, first J are entered into it, the second, third and fourth elements OR, three reversible pulse counters and bl transmission code, whose entry entry is co5 O five 0 five 0 five five 0 Dinen with OUTPUT of the fourth element OR, the first input of which is connected to the code of the pulse counter, input: the settings of which are connected respectively to the outputs of the code transmission block, the information inputs of which are connected respectively to the information outputs of the second reversible pulse counter, the counting input of which is connected to the output of the first element OR , the first and second inputs of which are respectively connected to the outputs of the first reversible pulse counter and the first element And, the counting input of the first reversing pulse maker is combined with a counting input of a pulse counter and connected to the output of the second element I, the first, second and third inputs of which are connected respectively to the output of the reference frequency generator, the second output of the control unit and the output of the third reversible pulse counter whose counting input is connected to the output of the second element OR, the first and second inputs of which are connected respectively to the output of the pulse counter and the output of the key that is connected to the first 0 input of the first element AND, the second the input of which is combined with the first input of the third OR element and connected to the third output of the control unit, the second input of the third OR element is connected to the output of the third AND element, the first and second inputs of which are connected respectively to the sign output of the third reversible pulse counter and the second output of the control unit, the output of the third OR element is connected to the control inputs of the reversible pulse counters, whose installation inputs are combined with the control input of the control unit and are the Start bus, the secondary outputs th and the third reverse pulse counters are respectively first and second output lines, while, the second input RS- flip-flop is connected to the first output of the control unit 5 and the second input chet-- VERT I.PI element connected to the second output of the control unit. ii ft2 2T Jl1 four 45 phi52 / S / .s, ten Editor L. Pchelinska Order 2435/55 Circulation 901 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, Projecto st., 4 Compiled by V.Solodova Tehred L.Oliynyk Proofreader I. Muska