SU1256181A1 - Pulse repetition frequency multiplier - Google Patents

Abstract

The invention relates to computing and measuring technology and can be used in discrete information processing systems. The purpose of the invention is to improve the accuracy of the multiplier. The multiplier includes a reference frequency generator 1, counters 2 and 3 pulses, an input driver 6 pulses, a code converter 7, a code comparison element 8, storing blocks 9 and 15, and a driver 13 write pulses. The introduction of the AND 10 element, the delay element 11, the OR element 12, and the proposed implementation of the write pulse generator 13 makes it possible to achieve the goal. 1 h. apt. 2 Il. five . / “Ts :) SP O5 00 FIG. one

Description

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The invention relates to computing and measuring technology and can be used in discrete information processing systems.

The purpose of the invention is to improve accuracy.

FIG. 1 shows an electrical functional diagram of a pulse frequency multiplier; in fig. 2 - electrical functional diagram of the write pulse former.

The pulse frequency multiplier contains a reference frequency generator 1, the output of which is connected to the counting inputs of the first 2 and second 3 pulse counters, the reset inputs of which are connected to the first outputs respectively of the input pulse shaper 4, the input of which is connected to the input bus 5, and the output shaper 6, and the outputs with the first inputs, respectively, of the code converter 7 and the code comparison element 8, the outputs of which are connected respectively to the input of the first storage unit 9 and to the input of the output form rotator 6 pulses. The control input of the converter 7 codes is connected to the second output of the input driver 4 pulses. The output of the reference frequency generator 1 is also connected to the first input of the AND 10 element, the output of which is connected via the delay element 11 to the first input of the OR element 12, the output of which is connected to the recording input of the first storage unit 9, the second input to the second input of the AND 10 element, the third output of the input shaper 4 pulses and with the first input of the shaper 13 write pulses, the second input of which is connected to the second output of the output shaper 6 pulses and with the output bus 14, the output from the write input of the second storage unit 15, output which are connected to the second comparing element 8 inputs codes, inputs - outputs from the first storage unit 9.

The writing pulse generator 13 contains the first 16 and second 17 elements OR, the first 18 and second 19 elements AND, the delay element 20 and the trigger 21, the installation input in “1 of which is connected to the first input of the generator 13 recording pulses and to the first input of the first element AND 18 The second input of which is connected to the first input of the second element AND 19, to the second input of the driver 13 write pulses and to the first input of the second element OR 17, the output of which is connected to the input of the installation in “On the trigger 21, the output of which is connected to the second output of the second element And 19, the output of which is connected to the first input of the first element OR 16, the output of which is connected to the bb1 input of the imaging unit 13 recording pulses, the second input - to the second input of the second element OR 17

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and through the element 20 delay with the release of the first element And 18.

The device works as follows.

When the input sequence pulse arrives on the bus 5 and on the input of the imaging device 4, the output code of the converter 7 is recorded, i.e., the period frequency code of the input frequency, in block 9, the converter 7 is set to the initial state, the generator 13 is set to the ready state and installed in "About counter 2. Counters 2 and 3 produce counting pulses from generator 1, converter 7 continuously converts output code of counter 2 into the code of the input frequency period, element 8 compares the code at the output of block 15 with the code at the output of counter and 3, when they coincide, generates a signal on which the output sequence impulse is generated at the second output of the imaging unit 6, is set to <0 counter 3, the imaging unit 13 generates a writing pulse in block 15 and then returns to the initial state. When this occurs, the code stored in block 9 is recorded in block 15. After that, counters 2 and 3 continue counting pulses from generator 4, and element 8 compares the code at the output of block 15 with the code at the output of counter 3 and if they coincide produces a signal which, at the output of the multiplier of the pulse frequency on the busbar 14, generates a pulse of the output sequence.

When the next input pulse arrives, the operation is repeated.

The multiplication factor of the device is determined by the transform coefficient of the converter 7.

When the input sequence receives a pulse, it is possible that the information recorded in block 9 coincides in time (by the signal from the third output of the driver 4) and the code (at an increase of "1) at the output of the converter 7 (the signal from the output of the generator 1 changes the code in the counter 2 and, therefore, at the output of the converter 7). In this case, in block 9, a code can be written corresponding to the intermediate state of the converter 7 when transients occur in the latter. In the proposed device, an error is corrected: the signal that appeared at the output of the element And 10 (at the time of coincidence of signals at its inputs) is delayed (and if necessary can be additionally formed by an additional driver) by element 11 at the time Tzap and flows through the element OR 12 to the record input of block 9. At the same time, block 9 records the true code of the period of the input signal.

A similar failure may occur if the moments of recording information in blocks 9 and 15 coincide in time (according to a signal from the output of the imaging unit 6). In this case, an erroneous code can also be written in block 15. Elimination of this kind of error is achieved due to the specific implementation of the imaging unit 13, which is designed in such a way that in this situation it generates two recording signals spaced apart from each other by time Tzap.

The shaper 13 has two inputs to which pulse sequences arrive. If the signal on the first input arrives first in time, then the trigger 21 is set to "1, no output signal appears. If after this a signal arrives at the second input, then a signal also appears at the output (through the open element AND 19 and the element OR 16). In addition, the trigger 21. The same signal.m (via the element OR 17) is translated into "O, element 19 is closed. If the pulses on the first and second inputs overlap in time, a signal appears at the output of element 18 and (which can be additionally formed by an additional driver), which appears at the output of element 16 after time Tzap (delay time of element 20).

Claims (2)

Invention Formula Multiply. The pulse frequency contains a reference frequency generator, the output of which is connected to the counting inputs of the first and second pulse counters, the reset inputs of which are connected to the first outputs of the input pulse generator, respectively, the input of which is connected to the input bus, and the output pulse former, and the outputs, respectively, with the inputs of the code converter and the first group of inputs of the comparison element, the outputs of which are connected respectively with the inputs of the first memory, its block and with Weekend Shaper House ° s 0 g 0 pulses, the control input of the code converter is connected to the second output of the input pulse shaper, the third output of which is connected to the first input of the write pulse shaper, the second input of which is connected to the second output of the output pulse shaper and the output bus, and the output to the write input of the second storage unit the inputs of which are connected to the outputs of the first storage unit, and the outputs to the second group of inputs of the comparison code element, characterized in that, in order to increase the operation accuracy of the multiplier , a delay element, an OR element and an AND element are entered into it, the first input of which is connected to the output of the reference frequency generator, the output through a delay element to the first input of the OR element, the output of which is connected to the recording input of the first storage unit, the second input to the second input element And with the third output of the input pulse shaper. 2. A multiplier according to claim 1, characterized in that the recording pulse shaper comprises the first and second elements AND, the delay element, the trigger, the first element OR and the second element OR, the output of which is connected to the installation input in "About the trigger, installation input" 1 which is connected to the first input of the write pulse former and to the first input of the first element AND, the output of which is connected to the input of the delay element, and the second input to the input of the driver of the recording pulse, to the first input of the second OR element and to the first input of the second element AND, second second input of which is connected to the output of the trigger unit, and the output - to the first input of the first OR gate whose output is connected to the output of the write pulse, and a second input connected to the second input of the second OR gate and to the output of the delay element. Compiler Sokolov Editor V. PetrashTekhred I. VeresKorrektor M. Demchik Order 4835/56 Circulation 816 Subscription VNIIPI State Committee of the USSR for inventions and discoveries 113035, .Ioskva, Zh-35, Raushsk nab., 4/5 Branch PPP "Patent, Uzhgorod, st. Project, 4