SU1003050A2 - Switch-type voltage stabilizer - Google Patents

Description

 (54) KEY VOLTAGE STABILIZER

The invention relates to electrical engineering and can be used in the power circuits of various radio equipment.

According to the main author. St. No. 505014,; A key voltage regulator is known, which contains a series-connected switching element with a filter and a feedback circuit consisting of a comparison and reference elements of a DC amplifier, a threshold element, for example, a CIidt trigger, a control unit, and a modulating signal input unit, one of two whose transistors are connected to the output of a DC amplifier, the differentiating circuit resistor is connected parallel to the output of the bridge rectifying circuit of the input of the modulating signal, one of the two transients tors which is connected to the output of the DC resistor differentiating circuit connected in parallel with the output of the bridge circuit straightening assembly as set forth baseband signal between the bases of said transistors, common emitter resistor which is connected to the input of a threshold elementaTs.

The disadvantage of the stabilizer is its low efficiency due to losses in the feedback circuits, which are powered by an internal low-voltage stabilizer. In addition, an external modulating voltage generator is required for the stabilizer to operate.

The aim of the invention is to increase efficiency by reducing losses in the feedback circuits of the stabilizer and the external modulating voltage generator.

The goal is achieved by the fact that an inverter is inputted into the device, the input is connected to the input terminals, the first output is connected via the input rectifier and filter to the feedback power supply, and the second output is connected to the input unit of the modulating signal.

The drawing shows a schematic of a key voltage regulator.

Claims (1)

The stabilizer contains a comparison device on transistors 1 and 2, connected to the input of the input unit of the modulating signal, consisting of transistors 3 and 4, resistors 5 and b, rectifier bridge circuit 7, a threshold element on transistors 8 and 9 connected to the emitter resistor 6 transistors 3 n 4, an amplifier on transistors 10-12, connected to the output of transistor 9 of the threshold element. The output of the amplifier at the transistors 10-12 is connected to the input of the switching element 13 connected in series with the bus 14 and the ETSC filter 15, the output of which, being simultaneously the output of the stabilizer, is connected to the base of the transistor 1 of the comparing device. The base of the transistor 2 is connected to one of the outputs of the parametric stabilizer on a stabilizer not 1 6 and the transistor 17, which supplies the feedback circuit. Inverter 18 is connected to bus 14 by transistors 19 and 20 and transformer 21. Secondary winding 22 of transformer 21 through a second rectifier bridge 2, capacitive filter 24 is connected to the collector of transistor 17, and the other secondary winding 25 is connected through a capacitor 26 to the input of the first bridge Scheme 7 rectification. The stabilizer works as follows. The error signal from the collector of transistor 2 is fed to the base of transistors 3. The resistor 5 through the bridge circuit 7 is supplied with the modulating voltage from the secondary winding 25 of the transformer 21 through a capacitor 26, which forms a differentiating circuit with the resistor 5. Thus, from the rectangular voltage of the inverter 18, a ramping voltage is obtained which is necessary for the pulse-width adjustment. The difference signal between the error signal and the modulating voltage is selected at the resistor 6 and switches the transistors 8 and 9 of the threshold element, which forms positive pulses with a duration inversely proportional to the output voltage of the stabilizer. These pulses are amplified by transistors 10-12 and control the state of the switching element. Item 13. As a result, the output voltage of the stabilizer is kept constant. The feedback circuit is powered by a parametric stabilizer on the transistor 17, the efficiency of which is determined by the voltage of the stabilization voltage (UCT) and the power supply (Tsz), and the power consumed by the feedback circuit with a parametric stabilizer current consumed by the circuit. With a large difference between U and U.i, additional power losses occur on the transistor 17, which causes the known stabilizer to reduce the overall efficiency and overheat the feedback circuit, which is especially dangerous when the latter is executed in the form of an integrated circuit. In this stabilizer, Up is reduced to the limits sufficient for normal operation of the parametric stabilizer. At the same time, P decreases by K times. where and is the supply voltage for not 14; and is the voltage across the collector of the transistor 17; 1Inv is the efficiency of the inverter 18. Thus, the introduction of the inverter into the known stabilizer allows reducing the power consumed by the feedback circuit. In addition, to synchronize the stabilizer operation, an external generator is not needed, which, besides increasing the efficiency of the Stabilizer by reducing losses, increases its noise immunity, the voltage ripple current of the feedback feed circuit coincides with the short front of the sawtooth modulating voltage and does not knock the pulse-width pulse signal. Claims of the invention Key voltage regulator according to the aut. St. 505014, characterized in that, in order to increase efficiency, an inverter is introduced into it, the input of which is connected to the input terminals, the first output is connected through the input rectifier and filter to the feedback busbars, and the second output to the input of the modulating input unit signal. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 505014, cl. G 05 F 1 / 5b, 1973.