SE9800709L - Ledare - Google Patents
LedareInfo
- Publication number
- SE9800709L SE9800709L SE9800709A SE9800709A SE9800709L SE 9800709 L SE9800709 L SE 9800709L SE 9800709 A SE9800709 A SE 9800709A SE 9800709 A SE9800709 A SE 9800709A SE 9800709 L SE9800709 L SE 9800709L
- Authority
- SE
- Sweden
- Prior art keywords
- carrier
- leader
- conductor
- flanges
- chip
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/0242—Structural details of individual signal conductors, e.g. related to the skin effect
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/528—Geometry or layout of the interconnection structure
- H01L23/5283—Cross-sectional geometry
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
- H05K1/0203—Cooling of mounted components
- H05K1/0209—External configuration of printed circuit board adapted for heat dissipation, e.g. lay-out of conductors, coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0263—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board
- H05K1/0265—High current adaptations, e.g. printed high current conductors or using auxiliary non-printed means; Fine and coarse circuit patterns on one circuit board characterized by the lay-out of or details of the printed conductors, e.g. reinforced conductors, redundant conductors, conductors having different cross-sections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/3011—Impedance
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0364—Conductor shape
- H05K2201/0373—Conductors having a fine structure, e.g. providing a plurality of contact points with a structured tool
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09236—Parallel layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09254—Branched layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09663—Divided layout, i.e. conductors divided in two or more parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09681—Mesh conductors, e.g. as a ground plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09781—Dummy conductors, i.e. not used for normal transport of current; Dummy electrodes of components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Geometry (AREA)
- Materials Engineering (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Structure Of Printed Boards (AREA)
- Weting (AREA)
- Waveguide Aerials (AREA)
- Storage Of Web-Like Or Filamentary Materials (AREA)
- Magnetic Heads (AREA)
Priority Applications (8)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9800709A SE514520C2 (sv) | 1998-03-05 | 1998-03-05 | Mönsterkort, substrat eller halvledarbricka med en ledare med etsad ytstruktur |
PCT/SE1999/000326 WO1999045752A1 (sv) | 1998-03-05 | 1999-03-05 | Electronics device |
EP99910902A EP1060645B1 (en) | 1998-03-05 | 1999-03-05 | Electric conductor with a surface structure in the form of flanges and etched grooves |
DE69936189T DE69936189T2 (de) | 1998-03-05 | 1999-03-05 | Elektrischer leiter mit als flanschen und geätzte rillen geformter oberflächenstruktur |
AT99910902T ATE363820T1 (de) | 1998-03-05 | 1999-03-05 | Elektrischer leiter mit als flanschen und geätzte rillen geformter oberflächenstruktur |
AU29663/99A AU2966399A (en) | 1998-03-05 | 1999-03-05 | Electric conductor with a surface structure in the form of flanges and etched grooves |
JP2000535185A JP2002506292A (ja) | 1998-03-05 | 1999-03-05 | フランジおよびエッチング溝形状の表面構造を有する電気導体 |
US09/653,941 US6407340B1 (en) | 1998-03-05 | 2000-09-01 | Electric conductor with a surface structure in the form of flanges and etched grooves |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9800709A SE514520C2 (sv) | 1998-03-05 | 1998-03-05 | Mönsterkort, substrat eller halvledarbricka med en ledare med etsad ytstruktur |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9800709D0 SE9800709D0 (sv) | 1998-03-05 |
SE9800709L true SE9800709L (sv) | 1999-09-06 |
SE514520C2 SE514520C2 (sv) | 2001-03-05 |
Family
ID=20410425
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9800709A SE514520C2 (sv) | 1998-03-05 | 1998-03-05 | Mönsterkort, substrat eller halvledarbricka med en ledare med etsad ytstruktur |
Country Status (8)
Country | Link |
---|---|
US (1) | US6407340B1 (sv) |
EP (1) | EP1060645B1 (sv) |
JP (1) | JP2002506292A (sv) |
AT (1) | ATE363820T1 (sv) |
AU (1) | AU2966399A (sv) |
DE (1) | DE69936189T2 (sv) |
SE (1) | SE514520C2 (sv) |
WO (1) | WO1999045752A1 (sv) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP2264522A3 (en) * | 2000-07-16 | 2011-12-14 | The Board of Regents of The University of Texas System | Method of forming a pattern on a substrate |
AUPR864501A0 (en) * | 2001-11-05 | 2001-11-29 | Cochlear Limited | Thin flexible conductors |
US6932934B2 (en) * | 2002-07-11 | 2005-08-23 | Molecular Imprints, Inc. | Formation of discontinuous films during an imprint lithography process |
US6916584B2 (en) * | 2002-08-01 | 2005-07-12 | Molecular Imprints, Inc. | Alignment methods for imprint lithography |
US6867132B2 (en) * | 2002-09-17 | 2005-03-15 | Hewlett-Packard Development Company, L.P. | Large line conductive pads for interconnection of stackable circuitry |
US8349241B2 (en) | 2002-10-04 | 2013-01-08 | Molecular Imprints, Inc. | Method to arrange features on a substrate to replicate features having minimal dimensional variability |
US7906180B2 (en) | 2004-02-27 | 2011-03-15 | Molecular Imprints, Inc. | Composition for an etching mask comprising a silicon-containing material |
US20110036617A1 (en) * | 2007-08-03 | 2011-02-17 | Leonid Kokurin | Compensating Conductive Circuit |
JP5415858B2 (ja) * | 2009-07-23 | 2014-02-12 | 古河電気工業株式会社 | 厚導体基板及びその製造方法 |
SE537793C2 (sv) * | 2012-08-29 | 2015-10-20 | Jan Berglund Med Inco Innovation F | Kraftledare monterad på ett mönsterkort |
ITTO20121051A1 (it) | 2012-12-06 | 2014-06-07 | Alenia Aermacchi Spa | Circuito elettronico ridondante. |
KR102059610B1 (ko) * | 2015-12-18 | 2019-12-26 | 주식회사 엘지화학 | 고전도성 방열 패드를 이용한 인쇄회로기판의 방열 시스템 |
US9741651B1 (en) * | 2016-02-24 | 2017-08-22 | Intel IP Corportaion | Redistribution layer lines |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BE788117A (fr) * | 1971-08-30 | 1973-02-28 | Perstorp Ab | Procede de production d'elements pour circuits imprimes |
US3806841A (en) * | 1973-01-29 | 1974-04-23 | Allis Chalmers | Frequency-sensitive resistor and electrical transmission system embodying such resistor |
US4786545A (en) * | 1986-02-28 | 1988-11-22 | Seiko Epson Corporation | Circuit substrate and method for forming bumps on the circuit substrate |
US5268064A (en) * | 1992-02-04 | 1993-12-07 | Trimble Navigation Limited | Copper clad epoxy printed circuit board suitable for microwave frequencies encountered in GPS receivers |
US5326428A (en) * | 1993-09-03 | 1994-07-05 | Micron Semiconductor, Inc. | Method for testing semiconductor circuitry for operability and method of forming apparatus for testing semiconductor circuitry for operability |
US5426266A (en) * | 1993-11-08 | 1995-06-20 | Planar Systems, Inc. | Die bonding connector and method |
DE19519582A1 (de) * | 1995-05-29 | 1996-12-12 | Daetwyler Ag | Ader für einen sich ändernden elektrischen Strom, sowie Verfahren zu deren Herstellung |
US6002172A (en) * | 1997-03-12 | 1999-12-14 | International Business Machines Corporation | Substrate structure and method for improving attachment reliability of semiconductor chips and modules |
US5929521A (en) * | 1997-03-26 | 1999-07-27 | Micron Technology, Inc. | Projected contact structure for bumped semiconductor device and resulting articles and assemblies |
US6087732A (en) * | 1998-09-28 | 2000-07-11 | Lucent Technologies, Inc. | Bond pad for a flip-chip package |
US6246587B1 (en) * | 1998-12-03 | 2001-06-12 | Intermedics Inc. | Surface mounted device with grooves on a termination lead and methods of assembly |
-
1998
- 1998-03-05 SE SE9800709A patent/SE514520C2/sv not_active IP Right Cessation
-
1999
- 1999-03-05 DE DE69936189T patent/DE69936189T2/de not_active Expired - Lifetime
- 1999-03-05 AU AU29663/99A patent/AU2966399A/en not_active Abandoned
- 1999-03-05 WO PCT/SE1999/000326 patent/WO1999045752A1/sv active IP Right Grant
- 1999-03-05 EP EP99910902A patent/EP1060645B1/en not_active Expired - Lifetime
- 1999-03-05 JP JP2000535185A patent/JP2002506292A/ja active Pending
- 1999-03-05 AT AT99910902T patent/ATE363820T1/de not_active IP Right Cessation
-
2000
- 2000-09-01 US US09/653,941 patent/US6407340B1/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
SE9800709D0 (sv) | 1998-03-05 |
SE514520C2 (sv) | 2001-03-05 |
ATE363820T1 (de) | 2007-06-15 |
WO1999045752A1 (sv) | 1999-09-10 |
US6407340B1 (en) | 2002-06-18 |
EP1060645B1 (en) | 2007-05-30 |
DE69936189D1 (de) | 2007-07-12 |
AU2966399A (en) | 1999-09-20 |
EP1060645A1 (en) | 2000-12-20 |
DE69936189T2 (de) | 2008-01-24 |
JP2002506292A (ja) | 2002-02-26 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |