RU2712534C2 - Method of forming thin ordered semiconductor filamentary nanocrystals without participation of external catalyst on silicon substrates - Google Patents

Abstract

FIELD: chemistry.

SUBSTANCE: invention relates to production of semiconductor nanomaterials. Method of forming thin ordered semiconductor filamentary nanocrystals (FNC) of gallium arsenide on silicon is characterized by the fact that on silicon substrate with crystallographic orientation of surface (111) or (100) forming an inhibitory layer of silicon oxide (SiO₂) with thickness of 80–120 nm by thermal acidification in nitrogen/water vapour medium at temperature T = 850–950 °C at pressure close to atmospheric pressure, after which an electron resist layer is formed, in which windows are formed by electronic lithography by exposure to an electron beam with subsequent manifestation, wherein development process is stopped by washing in solvent and subsequent drying, then performing reactive ion-plasma etching in plasma-forming mixture of gases SF₆ and Ar with formation of windows in silicon oxide inhibitor layer, in which molecular-beam epitaxy using Ga and As sources is used to grow filamentary nanocrystals of gallium arsenide according to a catalytic method or an autocatalytic method using Ga as a catalyst sputtered on a substrate with formed windows in an inhibitor layer. Resist can be represented by polymethyl methacrylate, the developer being methyl isobutyl ketone-isopropanol and isopropanol as the solvent. Height of ordered FNC is 1.3 mcm, diameter 41 ± 3 nm. Distance between nanocrystals remains equal to pitch between windows in SiO₂ layer and is 3 mcm.

EFFECT: invention enables to obtain thin semiconductor FNC evenly distributed on the surface of the substrate and having a controlled surface density.

1 cl, 2 ex

Description

The invention relates to a technology for producing semiconductor nanomaterials. The method includes preparing a silicon wafer by forming an SiO ₂ inhibitory layer on its surface and creating nanoscale windows for growth in it, followed by placement in a growth chamber, heating and growth using molecular beam epitaxy using non-catalytic and self-catalytic methods.

Currently, several methods are known for creating regularly ordered systems of nanoscale whiskers, which are based on the principle of setting the same particle size of the metal catalyst. In [1], during the pyrolysis of monosilane (SiH4 + 10% He) with a small scatter in diameters, silicon nanocrystals were grown using colloidal gold particles on the surface of Si-SiO2. For this, gold “nanoparticles” with a diameter of 8.4 ± 0.9 nm were deposited from a solution of colloidal gold on a smooth Si-SiO2 substrate. After that, a substrate with deposited gold particles was placed in a furnace. The transverse dimensions of the nanocrystals were: 6.4 ± 1.2 nm; 12.3 ± 2.5 nm; 20.0 ± 2.3 nm and 31.1 ± 2.7 nm. The disadvantages of the method [1] are the large dispersion in diameter of the grown crystals (5-30%), the uneven distribution of crystals on the surface of the substrate and the inability to ensure the identical size of the droplets of colloidal gold.

Known methods for growing regular NW systems described in patent No. 2117081 [2] comprise the technology of creating regular NW systems in which the surface of a smooth silicon wafer is masked using photolithography and imprint lithography and a thin layer of photoresist, and a metal catalyst is applied by electrochemical deposition of islands from an electrolyte solution, after which there is a synthesis of whisker nanocrystals by the catalytic method. The disadvantages of such methods are the uncontrolled doping of whisker nanocrystals with the catalyst material, which makes such methods unsuitable for a range of applications; moreover, with an increase in temperature in the furnace, droplets of the metal catalyst can migrate along the substrate until they are removed from the surface, NW branching, uncontrolled growth in different directions [3]. The processes of creating insulating layers, planarizing the surface, forming contacts in this case have significant limitations, in particular, when applying insulating layers to the NWC, a “cap” can form that prevents further manipulations [4].

The present invention is directed to the controlled manufacture of surface structures of thin whisker nanocrystals of semiconductor materials grown without the participation of a catalyst droplet of a third-party material.

The invention provides the ability to obtain thin semiconductor whisker nanocrystals with a diameter of less than 40 nm, uniformly distributed over the surface of the substrate and having a controlled surface density.

A method of growing thin whisker nanocrystals of semiconductor materials having a diameter of about 40 nanometers or less is as follows. The surface of the silicon wafer with a crystallographic orientation of (111) or (100) is subjected to thermal oxidation to form an inhibitor layer of SiO ₂ with a thickness of 50-100 nanometers. A thin layer of an electron resist is applied to the surface of the sample with a layer of silicon oxide — a polymer substance that is sensitive to the action of a high-energy electron beam (1-30 keV), the optimum thickness of which is 50-90 nanometers.

The next step is the exposure of the substrate by an electron beam and its subsequent development in a solution of methyl isobutyl ketone-isopropanol (MIBK-IPA) 1: 3 for 45 seconds. Then the sample is dropped into isopropanol for 15 seconds to stop the development process. After development, the sample was dried with dry air. The minimum reproducible diameter of lithographic windows in an electronic resist is 25 nanometers.

A preliminary check showed that etching in a HF: H2O: 1: 10 solution leads to the rapid destruction of the polymer mask. Therefore, reactive ion-plasma etching is used to open the growth windows in the inhibitory layer. The etching process is realized due to atomization of the sample atoms during ion bombardment and the formation of compounds of the sample components and the medium. The theory of ion sputtering processes and reactive ion-plasma etching is presented in books [5, 6]. The experiments showed that the optimal mode of reactive ion-plasma etching provides a high factor of verticality of the mesa wall (window). The etching time is selected so as to ensure complete etching of SiO ₂ in the lithographic windows and is approximately 1-10 minutes. After etching, the resist remaining on the surface of the substrate is removed in acetone. The minimum reproducible diameter of the windows in the inhibitory layer is 25-40 nanometers.

Molecular-beam epitaxy growth of whisker nanocrystals in a regular array of growth windows obtained by lithography and etching with an ion beam and / or reactive ion plasma is the best way to obtain ordered structures with non-catalytic and autocatalytic NWs, as it provides greater flexibility from the point of view size and location of individual nanocrystals.

Using the proposed method can significantly facilitate the solution of the problem of creating optoelectronic and nanoelectronic devices based on thin whisker nanocrystals (solar cells, photovoltaic structures, multichannel field-effect transistors with a shell gate, random access memory devices of computers with high information density, etc.).

Examples of the method

Example 1

The initial silicon wafers of KDB and KEF of different conductivity levels and surface orientations of (111) and (100) were placed in a nitrogen / water vapor medium at a temperature of T = 850-950 ° C at a pressure close to atmospheric. Under these conditions, the chemical reaction of Si _solid proceeds _. + 2H ₂ O = SiO ₂ + 2H ₂ . The resulting silicon oxide film has a homogeneous quasi-amorphous structure. The film thickness is controlled by the time and reaction rate, which is from 1 to 10 minutes at thicknesses from 50 to 200 nm and the specified conditions. The main control parameters are Density 2.2 g / cm ³ , Refractive index 1.46, Etching rate in buffer solution HF ~ 100 nm / min, electrical breakdown intensity of films E = 10-13 MV / cm.

The PMMA resist was applied over the inhibitory layer; a centrifuge was used for uniform application. The thickness of the PMMA layer is 50-100 nm with a uniformity of no worse than 10%. In accordance with the technological requirements, after application, the resist was dried at a temperature of 90 ° C for 90 min. in the heating cabinet. Exposure was carried out using a SUPRA 25 Zeiss scanning electron microscope at an accelerating voltage of 20 kV. The beam current, measured using a Faraday cylinder, ranged from 50 to 140 nA. The spread of the beam current during lithography is not more than 10%. An estimate of the beam diameter gave a value of no more than 15 nm. Arrays of windows in the resist had the same size (30 × 30 μm) and a step of 3 μm between them. The radiation dose was 70 μC / cm ² . The manifestation was carried out in a special methylisobutylketone-isopropanol (MIBK-IPA) 1: 3 solution for 45 seconds. Then, the sample was washed in isopropanol for 15 seconds to stop the development process. After development, the sample was dried with dry air. Ar + ion beam etching was carried out at Rokappa and VUP-5 installations with a specialized source of duoplasmatron-type ions under the conditions: ion energy — 0.5 KeV, beam diameter ~ 50 mm, ion flux density j ~ 10 ¹⁴ ion / cm ² at a residual vacuum of 10 ^-6 Torr, working vacuum (5 ÷ 20) * 10 ^-5 Torr. The control of the beam current density was carried out using a diaphragmed Faraday cup before and after the etching process. Reactive ion-plasma etching was carried out using an Edwards Auto 500 BOC unit in a plasma-forming gas mixture SF ₆ -Ar. The etching conditions (time, discharge voltage, power density) were chosen so as to ensure complete etching of SiO ₂ in lithographic windows with an aspect ratio of at least 7 and amounted to about 5-10 minutes. The diameter of the etched windows in the inhibitory layer was 40 ± 2 nm.

At the next stage, the prepared substrates with windows in the SiO ₂ layer were placed in an EP1203 molecular-beam epitaxy unit equipped with Ga and As effusion sources. The growth of GaAs NWs was carried out by the non-catalysis mechanism. In the growth chamber, the substrate was heated to 610 ° C, and Ga and As sources opened for 20 minutes. Then the process stopped: the sources were closed and the sample was cooled to room temperature. The obtained samples were studied by electron microscopy and luminescence. The height of ordered GaAs NWs was 1.3 μm, and the diameter was 41 ± 3 nm. The distance between the nanocrystals remained equal to the step between the windows in the SiO ₂ layer and amounted to 3 μm.

Example 2

The growth of fine ordered whisker nanocrystals was carried out analogously to example 1, but the growth occurred by the autocatalytic mechanism. For this, in the growth chamber, a thin ~ 2 nm gallium layer was deposited on the fabricated substrate with windows in the inhibitor layer at a temperature of 550 ° C, which, upon further exposure, was collected in drops both in the growth windows and on the inhibitor layer, on which growth does not occur . After that, the temperature of the substrate increased by another 30 degrees, and Ga and As sources opened. Growth time was 20 minutes. The grown ordered NWs had a diameter of 41 ± 4 nm and a length of ~ 1.7 μm. The distance between the nanocrystals remained equal to the step between the windows in the SiO ₂ layer and amounted to 3 μm.

1. Gudiksen M.S., Lieber CM. Diameter-selective synthesis of semiconductor nanowires // J. Am. Chem. Soc; (Communication); 2000; 122 (36); pp. 8801-8802.

2. RF patent No. 2117081, IPC ⁶ C30B 029/62, 025/02 / A.A. Schetinin, V.A. Nebolsin, A.I. Dunaev, E.E. Popova, P.Yu. Boldyrev.

3. Roest A.L., Verheijen M.A., Wunnicke O., Serafin S., Wondergem H. and Bakkers E. P.A.M. Position-controlled epitaxial UI-V nanowires on silicon // Nanotechnology; 2006; 17 (11); pp. 271-275.

4. Soshnikov I.P., Afanasyev D.E., Tsyrlin G.E., Petrov V.A., Tanklevskaya E.M., Samsonenko Yu.B., Buravlev A.D., Khrebtov A.I., Ustinov V.M. Formation of ordered GaAs whisker nanocrystals using electron lithography // FTP; 2011; 45 (6); from. 840-846.

5. Ed. Berisha R.M. Spraying solids by ion bombardment // Mir; 1984; t. 1.

6. Ed. Berisha R.M. Spraying solids by ion bombardment // Mir; 1986; T. 2.

Claims (2)

1. The method of forming thin ordered semiconductor whisker nanocrystals of gallium arsenide on silicon, characterized in that an silicon oxide layer with a thickness of 80-120 nm is formed on a silicon substrate with a crystallographic orientation of the surface (111) or (100) by thermal oxidation in a nitrogen / vapor medium water at a temperature of T = 850-950 ° C at a pressure close to atmospheric, after which a layer of electronic resist is applied, in which windows are formed by electronic lithography by exposure to an electron beam com with subsequent development, while the development process is stopped by washing in a solvent and subsequent drying, then reactive ion-plasma etching is carried out in a plasma-forming mixture of SF ₆ and Ar gases with the formation of windows in the inhibitor layer of silicon oxide, in which molecular beam epitaxy using sources Ga and As grow gallium arsenide whisker nanocrystals according to the catalytic-free method or the autocatalytic method using Ga sprayed on a substrate as a catalyst formed windows in the inhibitory layer. 2. The method according to p. 1, characterized in that polymethyl methacrylate is used as a resist, methyl isobutyl ketone-isopropanol is used as a developer, and isopropanol is used as a solvent.