RU2676017C1 - Device and method for adaptive linearization of analog radio path through dual-digital corrector - Google Patents

Abstract

FIELD: means of communication.SUBSTANCE: invention relates to the field of signal processing systems in communications. Adaptive linearization device of the analog radio path contains a two-block digital equalizer, a digital-to-analog converter (D/A converter), a frequency rise conversion path, power amplifier, down-conversion circuit, an analog-to-digital converter (ADC), an identification algorithm block, while a two-block digital equalizer contains a block of nonlinear inertial predistortion. Additionally, a second two-block digital equalizer, identical to the first one, and an adder, are introduced, and a block of inertial predistortion is introduced into the two-block digital correctors.EFFECT: technical result is to reduce the number of optimization parameters of the adaptive algorithm without losing the quality of the digital linearization system.2 cl, 6 dwg, 1 tbl

Description

The group of inventions relates to the field of signal processing systems in communications, in particular, to devices and methods for increasing the linearity of an analog transmission path and can be used in microwave communication systems.

One of the most pressing problems in the development of modern communication systems is to solve the problem of leveling signal distortions in the analogue part of a data transmission channel. The sources of signal distortion are primarily a power amplifier, which exhibits non-linear inertial properties, and a conversion path (filtering, frequency conversion), exhibiting linear inertial properties.

At present, digital methods for increasing the linearity of the analog radio path, implemented in the form of a system consisting of a corrector and an adaptive controller for updating predistortion parameters, are quite widespread. At the same time, the corrector enters nonlinear-dynamic predistortions that are inverse in characteristics to the characteristics of the radio path, and the controller adaptively adjusts the changing channel characteristics.

A device and method for linearizing an analogue radio path are proposed in the patent US 13 / 932,099 (publication number - US 20140161207 A1; application number - US 13 / 932,099; publication date - 12.06.2014; claimed - 1.07.2013; other numbers - US 9014299) where an adaptive way of updating the predistortion parameters is applied. The continuity of updating the corrector coefficients is achieved thanks to the return channel introduced into the device. This allows you to track the difference between the signals before and after the passage of the radio path, which is necessary for the iterative algorithm of multi-parameter optimization. The disadvantage of this device and method is that for the linearization of the radio path, consisting of a filter circuit and a power amplifier, there is a one-block digital corrector that operates with a single set of pre-emphasis parameters, which generalizes the physical properties of the power amplifier (inertia, non-linearity) and the filter circuit (inertia). Such a generalization leads to the fact that when constructing a model of a digital corrector, the inertia of the power amplifier and the filter circuit are summed up, and the nonlinearity of the amplifier is attributed to the entire radio path as a whole. Thus, the quality of the model description of the linearizable system is reduced, which entails a deterioration in the quality of digital correction.

A device and method for linearizing an analog radio path are proposed in the patent US 10/744,087 (publication number US 20040179629 A1; application number US 10/744,087; publication date 16.09.2004; claimed 24.12.2003; other numbers US 7333559) where a two-block version of the digital corrector is used. Partitioning the corrector into parts becomes possible due to the differentiated structure of the data transmission channel: a conversion path exhibiting inertial properties and a power amplifier, which is a source of non-linear and, to a lesser extent, inertial distortions. The disadvantage of this device and method is that the adaptive adjustment of the characteristics of the two-block corrector is carried out using two independent calculators, which complicates the hardware implementation of such a device and makes the method of multi-parameter optimization unstable.

The closest analogue in technical essence to the proposed device is a digital channel linearization device in which predistortions are inputted in stages using a two-block corrector architecture (patent US 14 / 537,843 (publication number - 14537843, 537843, US 9172334 B2; application number - US 14 / 537.843; publication date - 10/27/2015; claimed - 11/10/2014; other numbers - US 20150061774).

In FIG. 1 shows a structural diagram of a prototype device, where it is indicated:

1 - two-block digital corrector;

2 - digital-to-analog converter (DAC);

3 - conversion path with increasing frequency;

4 - power amplifier;

5 - conversion path with decreasing frequency;

6 - analog-to-digital Converter (ADC);

7 - block identification algorithm;

9 - block nonlinear inertial pre-emphasis;

10 - block non-linear inertialess pre-emphasis;

11 - block selection.

The prototype device contains a series-connected two-block digital corrector 1, DAC 2, the converter path with increasing frequency 3, a power amplifier 4, the output of which is connected through a series-connected converter path with decreasing frequency 5 and the ADC 6 to the first input of the identification algorithm block 7, the output of which connected to the first input of the two-block digital corrector 1, and the second input to the first output of the two-block digital corrector.

A two-block digital corrector 1 consists of a block of non-linear inertial pre-emphasis 9 and a block of non-linear inertia pre-emphasis 10 and a selection block 11, the first and second inputs of the block of non-linear inertial pre-emphasis 9 being the inputs of the two-block digital corrector 1, and the first input also the input of the device; the first output is the first output of the two-block digital corrector, and the second output is connected to the input of the selection block 11 and the first input of the non-linear block of pre-emphasis 10, the second input of which is connected to the output of the block of 11 and the output of the non-linear block of pre-emphasis 10 is the second output of the two-block digital corrector one.

The prototype device operates as follows.

The squares of the signal are fed to the input of the digital block of nonlinear inertial pre-emphasis 9, where the process of non-linear signal conversion (non-linearity of small order) takes into account the total dynamics of the channel. Then, the signal pre-distorted in block 9 undergoes the second stage of digital correction — input of predefined non-linear (high-order non-linearity) inertia pre-emphasis in block 10. At the same time, the output of the block of non-linear inertial pre-emphasis 9 receives information on the average signal power at the input of block 11, which determines selection of a tabular non-linear function applied to a signal in a block of non-linear inertialess pre-emphasis 10. It is known that most of the channel distortions are caused by the non-linearity of the amplifier power 4, therefore, the separation of the stages of introducing pre-emphasis in this case is due to the fact that the stationary input unit of non-linear inertial pre-emphasis 10 provides a rough alignment of the characteristics of the radio path using predefined high-order non-linearity pre-emphasis parameters, and in block 9 using non-linear inertial pre-emphasis parameters with In a small order of nonlinearity, the linearity of the channel characteristics is adjusted. Further, the signals with the introduced predistortions enter the digital-to-analog converter 2, where they acquire the analog form, and then into the converter path with increasing frequency 3 to switch to the operating frequency. Then, the converted signals to increase power are supplied to a power amplifier 4.

The nonlinearity of the transmission channel varies according to the operating conditions. The parameters of the two-block digital corrector 1 are required to be adaptively updated. To do this, in the nonlinear inertial predistortion block 9, pre-emphasis calculated in the identification algorithm block 7 is additionally introduced into the signal. Some of the signals supplied to the output of amplifier 4 passes back to the input of the identification algorithm block 7 of the predistortion parameters through ADC 6 and the converter path 5. The feedback signal communications are processed in digital form using an identification algorithm 7, in which the signals from the output of the block of nonlinear inertial pre-emphasis 9 and from the output of the ADC 6 are used in a multi-parameter process optimization, due to which it is possible to update the predistortion parameters of block 9 and, therefore, adaptively maintain the linear characteristics of the entire data transmission channel.

The disadvantage of the prototype device is that it does not allow for adaptive updating of the predistortion parameters of the second block of digital corrector 1, since when the external temperature is in the range from -40 to +50 degrees, the deviation of the gain value reaches large values (up to 10 dB) therefore, fixed pre-emphasis parameters predetermined under ideal conditions in selection block 11 under strong changes in environmental conditions only worsen the channel response.

The objective of the invention is to improve the characteristics of the channel by implementing a device containing a two-block digital correction system with simultaneous adaptive updating of the predistortion parameters of the first and second blocks of the corrector and designed to reduce the number of optimization parameters.

The technical result achieved is to reduce the number of optimization parameters of the adaptive algorithm without losing the quality of the digital linearization system.

To solve this problem, an adaptive linearization device for an analog radio path containing a two-block digital corrector connected in series, a digital-to-analog converter (DAC), a frequency increasing converter channel, a power amplifier, the output of which is connected through a series decreasing frequency converter and an ADC to the first block input identification algorithm, the second output of which is connected to the second input of the two-block digital corrector, while the two-block digital the background corrector contains a nonlinear inertial predistortion block, the first and second inputs of which are the corresponding inputs of a two-block digital corrector, and the first input is also an input of the device according to the invention, a second two-block digital corrector identical to the first and an adder is introduced, and the output of the first two-block digital corrector is connected to the first input the adder, and the second input of the adder is connected to the output of the second two-block digital corrector, and the output to the second input of the identification algorithm block the first output of which is connected to the third input of the second two-block digital corrector, and the second output is to the third and second inputs of the first and second two-block digital corrector, respectively, and the first input of the second digital corrector is connected to the output of the ADC; moreover, a linear inertial predistortion block is introduced into the two-block digital corrector, the first input of which is connected to the output of the nonlinear inertial predistortion block, and the second is the third input of the two-block digital corrector, and the output is the output of the two-block digital corrector.

In FIG. 2 shows a structural diagram of the proposed device, where it is indicated:

1.1, 1.2 - the first and second two-block digital corrector;

2 - DAC;

3 - conversion path with increasing frequency;

4 - power amplifier;

5 - conversion path with decreasing frequency;

6 - analog-to-digital Converter;

7 - block identification algorithm;

8 - adder.

In FIG. 3 shows a structural diagram of a two-block corrector, where it is indicated:

9 - block nonlinear inertial pre-emphasis;

12 - block linear inertial predistortion.

The proposed device contains a series-connected first two-block corrector 1.1, DAC 2, a conversion path with increasing frequency 3, a power amplifier 4, the output of which is connected through a series-connected converter path with decreasing frequency 5 and ADC 6 to the first input of the second two-block digital corrector 1.2 and to the first the input of identification algorithm block 7, the second output of which is connected to the third and second inputs of the first and second two-block correctors 1.1 and 1.2, respectively, and the first output is connected to oromu and third inputs of the first and second correctors diblock 1.1 and 1.2 respectively. In addition, the proposed device contains an adder 8, presented in the form of four series-connected circuits of type K155 IM6, the first and second inputs of which are connected to the outputs of the first and second two-block correctors 1.1 and 1.2, respectively, and the output of the adder 8 is connected to the second input of the adaptive algorithm block 7 .

A two-block digital corrector 1.1, identical to 1.2, is made of a nonlinear inertial predistortion block 9, the first and second inputs of which are the first and second inputs of the two-block digital corrector 1.1, and the output is connected to the first input of the linear inertial predistortion block 12, the second input of which is the third the input of a two-block digital corrector 1.1, and the output is the output of a two-block digital corrector 1.1.

Two-block correctors 1.1 and 1.2 are implemented on the basis of the Virtex 6 FPGA from Xilinx, DAC 2 - on a chip similar to DAC8412 by Analog Devices, a conversion path with an increase in frequency 3 - on a chip similar to Hittite's HMC525LC4, a converter path with a decrease in frequency 5 - on a chip similar Hittite HMC525LC4, ADC 6 - on Analog Devices AD9626, identification algorithm block 7 - based on Texas Instrument TMS320C54 signal processor.

The proposed device operates as follows.

The squares of the signal x (n) are fed to the first input of the first two-block corrector 1.1, in which the first stage of the input of predistortions is carried out in block 9, the output signal of which is described by a polynomial model with memory and has the form:

where b _to - pre-emphasis parameters stored in the memory of block 9; P is the degree of nonlinearity, Met is the delay value. Then the predistorted signal at the first stage of digital correction is fed to the input of the linear inertial predistortion block 12. The output signal of block 12 has the form:

where a _to - pre-emphasis parameters stored in the memory of block 12; Q is the amount of delay. It is known that the power amplifier 4, being a source of nonlinear distortion, also exhibits some inertial properties when wideband signals pass through it. Therefore, block 9 is responsible for linearizing the power amplifier 4 (in the general case, with the Met memory), and block 12 is responsible for equalizing the linear distortions introduced by the converter path with increasing frequency 3. Thus, it is possible to separate the inertial properties of the converter path 3 and the power amplifier 4 This allows us to reduce the total number of parameters of the two-block corrector 1.1, 1.2 to the value N ₂ = P⋅Мет + Q. The signals with sequentially introduced predistortions are then fed to a digital-to-analog converter 2, and then to the conversion path with increasing frequency 3. The converted signals are amplified using a power amplifier 4.

The non-linear dynamic characteristic of the analog radio path changes in accordance with the operating conditions and environmental parameters. As with the prototype device, it is required that the parameters of the digital corrector 1.1 and 1.2 are adaptively updated. Some of the signals supplied to the output of amplifier 4 passes back to the input of the identification algorithm block 7 through a converter with decreasing frequency 5 and ADC 6. In this case, another input parameter of block 7 is an error signal from the output of adder 8. A signal is received at the inputs of adder 8 from the output of the first two-block corrector 1.1 and the inverted signal from the output of the second two-block corrector 1.2, in which the digitized ADC 6 signal of the return channel is converted in the same way as it was converted in the first corrector 1.1. The error signal in this case has the form:

where u (n) is the signal of the return channel from the output of the ADC 6. Thus, the reverse learning scheme is implemented. Block 7, using the feedback signal u (n) from the output of the ADC 6 and the error signal e from the output of the adder 8, carries out a multi-parameter optimization process, as a result of which the update of the predistortion parameters of the two-block corrector 1.1 and 1.2 is calculated.

The closest in technical essence to the proposed one is a method for optimizing the pre-emphasis parameters, based on iterative updating of the coefficients of the digital corrector, presented as a polynomial model with a memory effect, based on the stochastic gradient method (F. Zhang, Y. Wang, B. Ai “Variable Step -size MLMS Algorithm for Digital Predistortion in Wideband OFDM Systems ", IEEE Trans. On Consumer Electronics, 2015, Vol. 61. No. 1, pp. 10-15).

The stochastic gradient method updates the predistortion coefficients of the first and second correctors as follows:

,

,

where h _to - the parameters of the pre-emphasis; p is the degree of nonlinearity (1 ... P); q - system memory depth (1 ... K); μ is the step of the stochastic gradient method; e is the error determined by the difference of the signals at the outputs of the first and second corrector; u (n) is the signal on the linearized device.

The disadvantage of this optimization method is that the linearization of the channel response is achieved by using a single vector of predistortion factors h _k , which generalizes the linear inertial properties of the converter path and the power amplifier, and also ascribes the non-linearity of the amplifier to the entire radio path as a whole. The number of pre-emphasis parameters for a one-block corrector is determined by the expression K = P⋅ (Q + Met), where Q is the depth of the converter path memory (inertia); Met is the depth of memory of the power amplifier, and P is the degree of its nonlinearity. The effectiveness of this approach drops sharply in systems using wideband multiposition signals. This is due to the fact that the processing of broadband signals implies a significant delay in the Q conversion path. In addition, such signals contribute more to the manifestation of the inertial properties of the Met power amplifier. Thus, the number of pre-emphasis parameters K greatly increases, which complicates the implementation of their adaptive updating.

The objective of the invention is to improve the characteristics of the channel by implementing an adaptive multi-parameter optimization method that allows parallel calculation of the predistortion parameters of the first and second blocks of a two-block corrector.

To solve the problem in the adaptive linearization method of the analog radio path, based on the use of the digital predistortion input method, the stochastic gradient method is used as the optimization algorithm; carried out in stages using a two-block structure of a digital corrector, in which at the first stage there is a nonlinear-dynamic conversion of the input signal, according to the invention, at the second stage of the input of predistortions, the linear-dynamic conversion of the signal is performed, while the stochastic gradient method is modified for simultaneous calculation and updating the coefficients of the first and second blocks of the two-block corrector.

The technical result achieved is to reduce the number of optimization parameters of the adaptive algorithm without losing the quality of the digital linearization system.

As you know, the basis of the method of multi-parameter optimization is the idea of minimizing an objective function of the form (2):

where e is the error signal described by expression (3).

The coefficients of a two-block corrector are updated by minimizing the objective function (4):

Therefore, after calculating the values of the gradients in system (5) using expressions (1) and (2), we obtain the law of iterative updating of the desired pre-emphasis parameters {a _k , b _k }:

where μ _a , μ _b are constant parameters of the stochastic gradient method.

Thus, the identification algorithm block simultaneously updates the coefficients of the two-block correction system, separating inertial predistortions aimed at equalizing the characteristics of the converter path and nonlinear inertial predistortions aimed at linearizing the power amplifier. As mentioned above, such a separation, firstly, reduces the number of optimization parameters, and secondly, details the structure of the analyzed radio path. In addition, depending on the choice of the initial values of the pre-emphasis parameters, the proposed method allows both calculating the coefficients of the two-block corrector “from scratch” (for a _to (0) = 1, b _to (0) = 1) and adaptive correction of previously calculated parameters predistortions. It is worth noting that the use of the second corrector does not affect the computational load of the solver in which the adaptive controller is implemented, since the number of parameters affected in the process of multi-parameter optimization does not double. The reverse learning scheme is used only to conduct a more accurate assessment of the error of the optimization algorithm.

Table 1 shows a quantitative assessment of the three possible hardware implementations of the digital corrector analogue radio path through which the signal passes with QAM-16 modulation and a 5 MHz band. The EVM parameters characterizing the degree of deformation of the signal constellation and ACPR describing the level of out-of-band radiation in the frequency domain were used as criteria for evaluating the quality of linearization (L3 and R3 mean out-of-band radiation in the adjacent left and right channels, and L5 and R5 - out-of-band radiation in the left and right additional channels). In this case, the optimal (minimization of the EVM criterion) number of parameters of a one-block corrector is defined as N = Р⋅ (Q + Met) at (Р = 5, Q = 10, Met = 2); diblock corrector according to the prior art device - N = P ₁ ⋅ (Q + Met) + P ₂ at (P ₁ = 3, Q = 10, Mw = 2, P ₂ = 5); two-block corrector according to the proposed method and device - N = P⋅Met + Q at (P = 5, Q = 10, Met = 2).

An example of linearization of the characteristics of the radio path, implemented according to the proposed device, is presented in FIG. 4 (amplitude characteristic), FIG. 5 (amplitude-phase characteristic) and FIG. 6 (signal spectra) before (1) and after (2) digital correction.

Thus, the proposed device and method allows a smaller number of pre-emphasis parameters to provide better quality indicators of linearization of the radio path, as well as to increase the speed of the entire linearization system, which is critical in the case of adaptive adjustment of the coefficients.

Claims (2)

1. The adaptive linearization device of the analog radio path, containing a series-connected two-block digital corrector, a digital-to-analog converter (DAC), a conversion path with increasing frequency, a power amplifier, the output of which is connected through a series-connected converter path with decreasing frequency and the ADC to the first input of the identification algorithm block, the second output of which is connected to the second input of the two-block digital corrector, while the two-block digital corrector contains a block linear inertial predistortions, the first and second inputs of which are the corresponding inputs of the two-block digital corrector, and the first input of the first two-block digital corrector is the input of the device, characterized in that a second two-block digital corrector identical to the first is introduced, and an adder, the output of the first two-block digital corrector is connected with the first input of the adder, and the second input of the adder is connected to the output of the second two-block digital corrector, and the output is connected to the second input of the algorithm block Identification module, the first output of which is connected to the third input of the second two-block digital corrector, and the second output - to the third and second inputs of the first and second two-block digital correctors, respectively, and the first input of the second digital corrector is connected to the ADC output; moreover, a linear inertial predistortion block is introduced into each two-block digital corrector, the first input of which is connected to the output of the non-linear inertial predistortion block, and the second is the third input of the two-block digital corrector, and the output is the output of the two-block digital corrector. 2. A method for adaptive linearization of an analog radio path based on the use of the digital predistortion input method, the stochastic gradient method is used as the optimization algorithm, which is carried out in stages using the two-block structure of the digital corrector, in which the nonlinear dynamic conversion of the input signal occurs at the first stage, characterized in that at the second stage of the input of predistortions, a linear-dynamic signal conversion is performed, while the stochastic method radienta is modified for simultaneous calculation and updating coefficients of the first b _'k and the second a' _to blocks of the diblock corrector.

Images