RU2382375C1 - Digital ferroprobe magnetometre - Google Patents

Abstract

FIELD: measuring equipment.

SUBSTANCE: proposed equipment is related to ferroprobe navigation magnetometers. Objective of the present invention is improved accuracy of digital ferroprobe magnetometre conversion. Objective defined is achieved by application of digital ferroprobe magnetometer, which differs by the fact that it comprises compensation circuit, which consists of six registers, three summators and three output registers.

EFFECT: increased accuracy of magnetic field inductance vector component measurement.

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Description

The invention relates to fluxgate navigation magnetometers and can be used to measure the three orthogonal components of the Earth's magnetic field induction vector and to provide signals proportional to the measured components in the form of a digital code.

A device is known for measuring magnetic field strength in accordance with RU 2155968 C2 of 09/10/2000, MKI: G01R 33/02, containing a rectangular pulse generator, a flux gate with a core made of permalloy with a hysteresis loop with a square ratio close to unity, to the output winding which is connected to the integrator. The output of the integrator is connected to the input of the amplifier, the output of which is connected to the input of the threshold block. The first AND gate is connected in series with the first reversible pulse counter, a digital-to-analog converter controlled by a current source, a key, and an excitation coil of a flux gate. The second input of the first reversible pulse counter and the first input of the first logic element AND are connected to the output of the threshold block, the second logic element And and the second reversible pulse counter. The output of the generator is connected to the first inputs of the second logic element And and the second reversible pulse counter, the output of the second logic element And is connected to the second inputs of the first logic element And, the second reverse pulse counter and key, the third input of the second reverse pulse counter is connected to the output of the first reversible pulse counter , and the output is to the second input of the second logic element.

The disadvantage of this device is, despite the additional element And and a reversible counter, a complex conversion circuit and the inability to adjust zero to measure the absolute value of the components of the magnetic field induction vector.

The closest in technical essence to the proposed one is a flux-gate magnetometer according to RU 2316781 C1, 02/10/2008, IPC: G01R 33/02, which includes a master oscillator, the output of which is connected to the input of the logic unit, the first output of which is connected to the input of the sine wave shaper, the output which is connected to the inputs of three flux gates, the outputs of which are connected to the inputs of three sampling-storage devices, the outputs of which are connected to the inputs of three analog-to-digital converters. This fluxgate magnetometer is selected as a prototype.

The disadvantage of this magnetometer is the measurement error of the components of the magnetic field induction vector, due to the bias voltage of the measurement circuit.

An object of the present invention is to increase the conversion accuracy of a digital flux-gate magnetometer using a compensation circuit.

To achieve this goal, a digital fluxgate magnetometer containing a master oscillator, the output of which is connected to the input of the logic unit, the first output of which is connected to the input of the sine wave shaper, the output of which is connected to the first inputs of three flux gates, the outputs of which are connected to the inputs of three selective amplifiers, the outputs of which connected to the first inputs of three sampling-storage devices, the first outputs of which are connected to the second inputs of three flux gates, and the second outputs are connected to the first inputs of ex analog-to-digital converters, six registers are introduced, three adders and three output registers, the first input of the first register and the first input of the second register are connected to the output of the first analog-to-digital converter, the first input of the third register and the first input of the fourth register are connected to the output of the second analog a digital converter, the first input of the fifth register and the first input of the sixth register are connected to the output of the third analog-to-digital converter, and the output of the first register is connected to the first input of the first sum torus, the output of the second register is connected to the second input of the first adder, the output of the third register is connected to the first input of the second adder, the output of the fourth register is connected to the second input of the second adder, the output of the fifth register is connected to the first input of the third adder, the output of the sixth register is connected to the second input of the third the adder, and the outputs of the adders are connected respectively to the first inputs of the three output registers, the second inputs of which are connected to the third output of the control unit, the second output of which is connected to orymi inputs of sample and hold device, the fourth output coupled to the third inputs of the adders, a fifth output is connected to second inputs of the first, third and fifth registers, a sixth output is connected to second inputs of the second, fourth and sixth registers.

The essence of the invention is illustrated by drawings, where Fig. 1 shows a block diagram of a digital flux-gate magnetometer, Fig. 2 - voltage diagrams of a circuit of one channel of a digital flux-gate magnetometer.

A digital fluxgate magnetometer consists of a sinusoid driver 1, fluxoprobes 2, 3, 4, selective amplifiers 5, 6, 7, sample-storage devices 8, 9, 10, analog-to-digital converters 11, 12, 13, registers 16, 17, 18 , 19, 20, 21, adders 22, 23, 24, output registers 25, 26, 27, logic block 14 and master oscillator 15. Shaper 1 sine waves, logic block 14 and master oscillator 15 are common to all three measuring channels.

The device operates as follows.

The measurement of the three components of the magnetic field induction vector is carried out by three independent channels X, Y and Z. All channels are made according to identical schemes. Consider the operation of one channel. The frequency from the master oscillator 15 is fed to a logical unit 14, in which frequency grids are formed, which are supplied to the sinusoid shaper 1 and to control the storage sampling device 8. A signal for controlling the analog-to-digital converter 11, registers 16, 17, is also generated in the logical block 14 output register 25 and adder 22. In the driver 1, a sinusoidal voltage Uv is generated digitally with a frequency fv = 10 kHz, which is applied to the excitation winding of the flux-gate 2. The flux-gate converts the external signal (the projection of the magnetic field induction vector onto its longitudinal axis) in an alternating current emf containing even harmonics of the frequency of the excitation signal. The amplitude of this emf is proportional to the value of the magnetic field induction, and the phase changes by π radian when the direction of the field induction vector changes by 180 °. There is also interference in the output emf of the fluxgate, which has odd harmonics in the spectrum.

The selective amplifier 5 is designed to isolate from the general spectrum of the signal coming from the measuring winding of the flux-gate 2, the voltage of the second harmonic and amplify it to the desired value. The gain at the resonant frequency (fp = 20 kHz) is Kr = 5000. The passband is 2Δf = 1800 Hz. The transmission coefficient at the frequencies of the first and third harmonics of the excitation frequency of the flux gate 2 is not more than 30 and 10, respectively.

Thus, the second harmonic 2 2fv = 20 kHz, which is amplified to the value of Uf and then fed to the sampling-storage device 8, is extracted by selective amplifier 5 from the output emf of the flux-gate.

Using the logical unit 14 in the sampling-storage device 8 two times during the period, a certain value of Uf is stored in proportion to the corresponding projection of the magnetic field induction vector. Figure 2 shows that the measurement occurs for the first time on the negative half-wave of the measured voltage - U _op at the time Δt and the second time on the positive - U _pp at the time Δt + T / 2, where T is the period of the measured voltage. The bias voltage Ucm is included in the measured voltage values U _op and U _pp with different signs. The measured voltages Uvh _pp = Unom-Ucm and Uavh _op = Unom + Ucm at the times Δt and Δt + T / 2 are input to the analog-to-digital converter 11, where they are converted into digital codes Npp = Nnom-Ncm and Nop = Nnom + Ncm proportional to the corresponding component of the magnetic field induction vector. The Npp number is recorded in register 16, and the Nop number is written in register 17. Then these numbers are fed to the input of adder 22. In adder 22 they are added up and the resulting amount divided by 2 by discarding the least significant bit is written into output register 25. At the output of the register 25, the number N _x appears, which is proportional to the corresponding component of the magnetic field induction vector. Then the registers 16, 17 and 25 are reset to zero and the next numerical value N _{x is} calculated in the next measurement cycle. As a result of these calculations, the number Ncm is excluded, i.e. measurement errors caused by bias voltage Ucm, because Ncm numbers are included in the formula with different signs and mutually destroyed:

,

,

where N is the number at the output of the device, proportional to the corresponding component of the magnetic field induction vector;

Npp is the number corresponding to the measured voltage at the positive half-wave;

Nop is the number corresponding to the measured voltage at the negative half-wave;

Nnom is the number corresponding to the measured voltage without error caused by the voltage offset;

Ncm is the number corresponding to the bias voltage.

The processes of forming the supply voltage, sample-storage, analog-to-digital conversion, writing to registers and summing are synchronized by the frequency of the master oscillator 15.

The elimination of the measurement error using the compensation scheme made it possible to significantly increase the accuracy of measuring voltages proportional to the components of the magnetic field induction vector.

Of the patent information materials known to the applicant, no signs were found that are similar to the totality of the features of the claimed object.

This device has been tested on a prototype. The test results indicate the achievement of the task. ISS OJSC intends to use this technical solution on standard products.

Claims (1)

A digital fluxgate magnetometer containing a master oscillator, the output of which is connected to the input of a logic block, the first output of which is connected to the input of a sine wave shaper, the output of which is connected to the first inputs of three flux gates, the outputs of which are connected to the inputs of three selective amplifiers, the outputs of which are connected to the first inputs of three sampling-storage devices, the first outputs of which are connected to the second inputs of three flux gates, and the second outputs are connected to the first inputs of three analog-to-digital converters characterized in that six registers, three adders and three output registers are introduced into it, the first input of the first register and the first input of the second register are connected to the output of the first analog-to-digital converter, the first input of the third register and the first input of the fourth register are connected to the output of the second analog -digital converter, the first input of the fifth register and the first input of the sixth register are connected to the output of the third analog-to-digital converter, and the output of the first register is connected to the first input of the first adder, output q of the second register is connected to the second input of the first adder, the output of the third register is connected to the first input of the second adder, the output of the fourth register is connected to the second input of the second adder, the output of the fifth register is connected to the first input of the third adder, the output of the sixth register is connected to the second input of the third adder, and the outputs of the adders are connected respectively to the first inputs of the three output registers, the second inputs of which are connected to the third output of the logic block, the second output of which is connected to the second odes sample and hold device, the fourth output coupled to the third inputs of the adders, a fifth output is connected to second inputs of the first, third and fifth registers, a sixth output is connected to second inputs of the second, fourth and sixth registers.

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