RU186109U1 - Subscriber network device with virtualized network functions - Google Patents

Abstract

1. A subscriber network device with virtualized network functions, comprising a first microcontroller, read-only memory, random-access memory, an address and data bus connected to the first microcontroller, a first power supply unit, characterized in that a high-speed packet data processing module with non-blocking is additionally introduced into it FPGA-based high-speed switching matrix, the first input / output of which is connected to the first microcontroller by bus, Ether transceiver modules net (PHY), the first inputs / outputs of which are connected by bus to the second inputs / outputs of the high-speed packet data processing module with a non-blocking high-speed FPGA-based switching matrix; information input / output ports, the first inputs of which are connected to the second inputs / outputs of the Ethernet transceiver modules (PHY), and the second inputs / outputs are the inputs / outputs of the device; a power system comprising a second microcontroller, an indication unit, an information input unit, an information output unit, a read-only memory (ROM), random access memory (RAM), combined by an address and data bus with a second microcontroller; a remote monitoring and control unit, the first input of which is connected to the second output of the information output unit, the first output - with the third input of the information input unit, the second output - with the third input of the information input / output ports; a load measuring unit, the first output of which is connected to the second input of the remote monitoring and control unit, and the second output is connected to the second input of the information input unit; a power control unit, the first input of which is connected to the first output of the information output unit; an uninterruptible power supply, the first output of which is connected to the second input of the power control unit, the second output to the first input of the information input unit, and the input to the third output of the information output unit; the first controlled relay, the input of which is connected to the third output of the remote monitoring and control unit; a block of switched power supplies as part of the first and second power supplies, the first input of which is connected to the output of the power control unit, the second input to the output of the first controlled relay, and the output to the input of the load measuring unit; a second controlled relay, the input of which is connected to the fourth output of the remote monitoring and control unit; a capacitor block, the input of which is connected to the output of the second controlled relay, the closed contact of which is connected to the first output of the uninterruptible power supply, and the open contact is connected to the third input of the control and control unit.

2. The device according to p. 1, characterized in that the power system contains a battery, providing its uninterrupted power.

3. The device according to claim 1, characterized in that the power system additionally contains a block of high-capacity capacitors that provide short-term power supply while the current information is saved in flash to detail the causes of the failure to send SNMP Trap Dying Gasp messages.

4. The device according to p. 1, characterized in that all its elements are made using digital technology.

Description

The utility model relates to data transmission systems, in particular to systems using subscriber network device virtualization (vCPE).

Telecommunications operators are looking for new ways to generate revenue streams, more flexible organization of service delivery, reducing infrastructure maintenance costs and management automation. The answer to these needs is the concept of NFV (Network Function Virtualization) - virtualization of network functions. Solution developers are trying to offer operators new business cases that would make the use of technology cost-effective. Among the potentially attractive cases vCPE stands out (virtual Customer Premises Equipment or “virtualization of subscriber network devices”).

One of the main approaches to implementing vCPE is the Edge model, where all virtual functions are located on the client side on an inexpensive device (micro-server with a sufficient number of Ethernet ports), which is a local NFV infrastructure (NFVI) for a specific customer. When using the approach with creating a small virtual infrastructure on client devices, you do not need a huge pool of resources and costs appear only at the moment when the client orders the service.

The closest technical solution that meets the requirements of virtualization of subscriber network devices is the device described in the article "Evaluation of the effectiveness of network processor architectures" (Grishchenko V.I., Ladyzhensky Yu.V., Yunis M. The main directions of development of modern network processors / D. D. Morgailov, Yu.V. Ladyzhensky, M. Yunis // Haykovi praci DonNTU. - Donetsk, 2011. - (Series "Informatics, cybernetics and obucenuvlyaet technics"). - No. 14 (188). - pp. 123-127 .) is a prototype.

This device contains a microcontroller, read-only memory, random access memory, connected by an address and data bus to the microcontroller, a first power supply.

The purpose of the utility model is to create a highly reliable power supply system for critical applications, when along with redundant power supplies and uninterruptible power supply, additional high-capacity capacitors are installed to provide short-term power supply while the current configuration is saved and memory dump in flash to detail the causes of the failure.

This goal is achieved in that in a device containing a first microcontroller, read-only memory, random-access memory, connected to the address and data bus with the first microcontroller, the first power supply, characterized in that it also includes a module for high-speed processing of packet data with non-blocking high-speed FPGA-based switching matrix, the first input / output of which is connected by a bus to the first microcontroller, Ethernet transceiver modules (PHY), first inputs / output s are connected to the second bus I / O module processing speed packet data with a high-speed, non-blocking switching matrix FPGA (FPGA); information input / output ports, the first inputs of which are connected to the second inputs / outputs of the Ethernet transceiver modules (PHY), and the second inputs / outputs are the inputs / outputs of the device; a power system comprising a second microcontroller, an indication unit, an information input unit, an information output unit, a read-only memory (ROM), random access memory (RAM), combined by an address and data bus with a second microcontroller; a remote monitoring and control unit, the first input of which is connected to the second output of the information output unit, the first output - with the third input of the information input unit, the second output - with the third input of the information input / output ports; a load measuring unit, the first output of which is connected to the second input of the remote monitoring and control unit, and the second output is connected to the second input of the information input unit; a power control unit, the first input of which is connected to the first output of the information output unit; an uninterruptible power supply, the first output of which is connected to the second input of the power control unit, the second output to the first input of the information input unit, and the input to the third output of the information output unit; the first controlled relay, the input of which is connected to the third output of the remote monitoring and control unit; a block of switched power supplies as part of the first and second power supplies, the first input of which is connected to the output of the power control unit, the second input to the output of the first controlled relay, and the output to the input of the load measuring unit; a second controlled relay, the input of which is connected to the fourth output of the remote monitoring and control unit; a capacitor block, the input of which is connected to the output of the second controlled relay, the closed contact of which is connected to the first output of the uninterruptible power supply, and the open contact is connected to the third input of the control and control unit.

Comparison with the prototype shows that the inventive device is characterized by the presence of new units and their connections between them. Thus, the claimed system meets the criterion of "novelty."

Comparison of the proposed solution with other technical solutions shows that the listed elements used in the blocks are known, however, their introduction in this connection with the other elements leads to the creation of a highly reliable power system for critical applications, when along with redundant power supplies and uninterruptible power supply are installed additional high-capacity capacitors that provide short-term power supply while the current configuration is saved and dump memory in flash for part The reasons for the failure. This confirms the conformity of the technical solution to the criterion of "significant differences".

In FIG. 1 shows the general structure of the problem, in FIG. 2 shows the selected prototype of the device consisting of: microcontroller (CPU) 1, high-speed packet data processing module with non-blocking high-speed FPGA-based switching matrix 2, random access memory (RAM) 4, read-only memory (ROM) 3, Ethernet transmitting modules (PHY) 5, information input / output ports 6.

In FIG. 3 shows a power supply system 2, consisting of a microcontroller 2-1, read-only memory (ROM) 2-2, random access memory (RAM) 2-3, an information input unit 2-4, an information output unit 2-5, an indication unit 2 -15, interconnected by address and data bus 2-16; remote control and control unit 2-9, load measurement unit 2-8, power control unit 2-7, uninterruptible power supply 2-6, first controlled relay 2-11, second controlled relay 2-12, switched power supply unit 2- 10 and a block of capacitors 2-14.

The proposed device operates as follows.

To connect remote offices, departments, etc., having their own local area network, using point-to-point, point-to-multipoint, and multipoint-to-multipoint services, it is necessary to install special equipment located on the customer’s side, but serviced centrally (for example, by a service provider or central office). In this case, the most modern approach is the introduction of the SDN / SD-WAN concept and support for NFV services implemented centrally (for example, in the operator’s data center) or distributed (both on vCPE, on the core network, and in the data center).

The introduction of NFV will allow operators and large corporate customers to transform the network infrastructure by eliminating the use of specialized network equipment in favor of fully software and virtualized solutions.

To use NFV technology, virtualization of subscriber equipment is required by using vCPE. When connecting a new client, in addition to installing a demarcation device that separates the client’s network and the operator’s network, the service provider often has the task of implementing additional functions - for example, to control and manage connections and traffic, solve client business problems, etc. So, many corporate customers require additional features such as a firewall, VPN support, and DDoS protection.

In order to implement such services today, you need to deliver, install, configure, and then also maintain the appropriate equipment on the client side. NFV helps to solve this problem in a much more efficient way, namely due to virtualization of network functions in software applications that can be run both on ordinary servers and on virtual machines running on these servers. In this case, the operator can, using only one network interface device to differentiate traffic, “place” all other functions, such as a firewall, on its territory, and to simplify the network and manage it, in particular for building service chains, implement SDN.

The main purpose of the proposed device is the construction of the SD-WAN architecture network by telecom operators and for corporate networks. For this, vCPE devices are used that are installed on the customer’s network side and allow implementing the SDN approach to network management and service implementation according to the NFV ideology.

To implement a subscriber network device with virtualized network functions (vCPE), a well-known structure for building network processors (prototype) with a central processing unit (CPU) 1, connected buses with read-only memory (ROM) 3 and random access memory (RAM) is taken. 4. Use of microcircuits FPGA 2 provides the necessary flexibility in the development of hardware logic for processing network traffic, as well as the ability to implement additional functionality when changing the competitive environment without changing the architecture devices.

Ethernet Transceiver Modules (PHY) 5 is an integrated circuit designed to perform the functions of the physical layer of the OSI network model.

PHYs allow other link-level chips, called MACs, to connect to a physical transmission medium, such as optical fiber or copper cable. The standard PHY microchip includes modules of the physical coding sublayer (PCS, Physical Coding Sublayer) and the transmission medium sublevel (PMD, Physical Medium Dependent). The physical coding sublevel module performs the functions of encoding and decoding the transmitted and received data stream. The purpose of coding is to simplify the process of recovering data stream by the receiver.

Power system operation 2.

In the initial state, the block of switched power supplies 2-10 is disabled. If it is necessary to connect the power supply unit BP1 (switched power supply unit 2-10), the first controlled relay 2-11 is switched on, the contacts of which connect the power supply output from BP1 to the elements of the subscriber network device with virtualized network functions and signal its connection via the remote monitoring and control unit 2-9. When BP1 is turned on, in the load measuring unit 2-8, the consumption current is calculated, the value of which is transmitted to the remote control and control unit 2-9, as well as through the information input unit 2-5 to the microcontroller 2-1 and then through the address and data 2- 16 and the information output unit 2-4 to the remote monitoring and control unit 2-9.

The software stored in the memory of the microcontroller 2-1, provides the calculation of the current consumption of consumed electricity, similar to electricity meters. This information is also displayed for each power supply (BP1 and BP2) in the display unit 2-15 along with the status of the power supplies (BP1, BP2) (on / off).

All calculations are carried out in the microcontroller 2-1. A possible implementation of a power control unit 2-7 is shown in FIG. 4. A triac is used as a control element.

An integral part of the claimed device is an uninterruptible power supply (UPS) 2-6, which supports power supply BP1 and BP2 in the event of a power failure in a centralized network. UPS 2-6 is also under the control of block 2-6 through the circuit: block 2-5 - microcontroller 2-1 - block 2-5 - block 2-4. At the same time, the charge level of the batteries is monitored, their charging is direct and the UPS 2-6 operating modes are signaled.

The load measuring unit 2-8 can be performed using Hall effect current sensors, compensation type current sensors, or on the ACS712 microassembly.

The block of remote monitoring and control 2-9 is an active network device that receives-transmits and processes signals based on network protocols (for example, TCP / IP protocols).

Microcontroller 2-1 is an INTEL 80C51 LSI family with a clock frequency of 12-14 MHz.

Permanent memory device (ROM) 2-2 is designed to store data memory (maximum current consumption of the switch, battery charge current of the UPS 2-6) and commands for the microcontroller 2-1, and is a standard LSI family INTEL 27C512 with a capacity of 64 kbytes.

Random access memory (RAM) 2-3 is designed to store information related to the operating mode of the system. RAM is connected to the system bus address and data 13-6 and is a standard LSI INTEL 6264 family with a capacity of 8 kbytes.

In addition, the proposed device uses an uninterruptible power supply (UPS) 2-6 with the addition to the main power supply of the battery and its charging unit. This ensures uninterrupted operation of the switch when the main supply voltage of 220 V.

Critical applications require a highly reliable power system. For this, in addition to the redundant power supply units (BP1, BP2, and UPS), high-power capacitors (capacitor bank 2-14) are added to power system 2, which provide short-term power supply while current information is stored in ROM 2-2 to detail the reasons for the failure of implementation sending Dying Gasp messages (a signal from the device that performs the correct termination of a communication session in case of a sudden power outage, which eliminates the possibility of erroneous continuation of charging by the provider).

The block of capacitors 2-14 is under the control of block 2-9 through the circuit: block 2-5 - microcontroller 2-1 - ROM 2-2 - output 2 of the remote control and control unit 2-9.

Thus, a subscriber network device with virtualized network functions with a highly reliable power supply system provides, in case of power failure from all possible sources, a short-term power supply while the current information is saved in flash to detail the reasons for the failure to send SNMP Trap Dying Gasp messages.

Claims (4)

1. A subscriber network device with virtualized network functions, comprising a first microcontroller, read-only memory, random-access memory, an address and data bus connected to the first microcontroller, a first power supply unit, characterized in that a high-speed packet data processing module with non-blocking is additionally introduced into it FPGA-based high-speed switching matrix, the first input / output of which is connected to the first microcontroller by bus, Ether transceiver modules net (PHY), the first inputs / outputs of which are connected by bus to the second inputs / outputs of the high-speed packet data processing module with a non-blocking high-speed FPGA-based switching matrix; information input / output ports, the first inputs of which are connected to the second inputs / outputs of the Ethernet transceiver modules (PHY), and the second inputs / outputs are the inputs / outputs of the device; a power system comprising a second microcontroller, an indication unit, an information input unit, an information output unit, a read-only memory (ROM), random access memory (RAM), combined by an address and data bus with a second microcontroller; a remote monitoring and control unit, the first input of which is connected to the second output of the information output unit, the first output - with the third input of the information input unit, the second output - with the third input of the information input / output ports; a load measuring unit, the first output of which is connected to the second input of the remote monitoring and control unit, and the second output is connected to the second input of the information input unit; a power control unit, the first input of which is connected to the first output of the information output unit; an uninterruptible power supply, the first output of which is connected to the second input of the power control unit, the second output to the first input of the information input unit, and the input to the third output of the information output unit; the first controlled relay, the input of which is connected to the third output of the remote monitoring and control unit; a block of switched power supplies as part of the first and second power supplies, the first input of which is connected to the output of the power control unit, the second input to the output of the first controlled relay, and the output to the input of the load measuring unit; a second controlled relay, the input of which is connected to the fourth output of the remote monitoring and control unit; a capacitor block, the input of which is connected to the output of the second controlled relay, the closed contact of which is connected to the first output of the uninterruptible power supply, and the open contact is connected to the third input of the control and control unit. 2. The device according to p. 1, characterized in that the power system contains a battery, providing its uninterrupted power. 3. The device according to claim 1, characterized in that the power system additionally contains a block of high-capacity capacitors that provide short-term power supply while the current information is saved in flash to detail the causes of the failure to send SNMP Trap Dying Gasp messages. 4. The device according to p. 1, characterized in that all its elements are made using digital technology.

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