[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

KR980007895A - 플라스틱 볼 그리드 어레이 모듈 - Google Patents

플라스틱 볼 그리드 어레이 모듈 Download PDF

Info

Publication number
KR980007895A
KR980007895A KR1019970015783A KR19970015783A KR980007895A KR 980007895 A KR980007895 A KR 980007895A KR 1019970015783 A KR1019970015783 A KR 1019970015783A KR 19970015783 A KR19970015783 A KR 19970015783A KR 980007895 A KR980007895 A KR 980007895A
Authority
KR
South Korea
Prior art keywords
circuit board
printed circuit
pads
pcb
grid array
Prior art date
Application number
KR1019970015783A
Other languages
English (en)
Other versions
KR100294602B1 (ko
Inventor
프란시스코 가르베리
스테파노 오기오니
Original Assignee
제프리 엘. 포맨
인터내셔널 비지네스 머신즈 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 제프리 엘. 포맨, 인터내셔널 비지네스 머신즈 코포레이션 filed Critical 제프리 엘. 포맨
Publication of KR980007895A publication Critical patent/KR980007895A/ko
Application granted granted Critical
Publication of KR100294602B1 publication Critical patent/KR100294602B1/ko

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/102—Material of the semiconductor or solid state bodies
    • H01L2924/1025—Semiconducting materials
    • H01L2924/10251—Elemental semiconductors, i.e. Group IV
    • H01L2924/10253—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/094—Array of pads or lands differing from one another, e.g. in size, pitch or thickness; Using different connections on the pads
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10734—Ball grid array [BGA]; Bump grid array
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Combinations Of Printed Boards (AREA)

Abstract

본 발명은 가변 영역의 도전성 금속 패드를 가진 플라스틱 볼 그리드 어레이 전자 패키지에 관한 것이다. 중앙 패드는 최종 패키지에 미치는 워페이지 효과를 보상하기 위해서 가장자리에 가까운 패드보다 넓게 되어 있다.

Description

플라스틱 볼 그리드 어레이 모듈
본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음
도 5는 본 발명의 바람직한 실시예의 단면도.
도 6은 본 발며의 바람직한 실시예에 다른 플라스틱 BGA 모듈의 금속 패드의 달라진 구조의 평면도.

Claims (9)

  1. 볼 그리드 어레이 전자 모듈 제작용의 인쇄 회로 기판(PCB)로서, 제1 면에 실직적으로 구형인 다수의 땜납 합금 부분과 접속 가능한 다수의 도전성 금속 패드를 가진 인쇄 회로 기판(PCB)에 있어서, 상기 다수의 패드들이 가변성(variable) 표면 영역을 갖는 인쇄 회로 기판.
  2. 제1항에 있어서, 상기 다수의 도전성 금속 패드들은 제1 표면 영역을 가진 적에도 제1 세트의 패드와 제2 표면 영역을 갖는 적어도 제2 세트의 패드를 포함하는 인쇄 회로 기판.
  3. 제2항에 있어서, 상기 제1 세트의 패드는 상기 PCB의 제1 부분에 배치되고 상기 제2 세트의 패드는 상기 PCB의 제2 부분에 배치되는 인쇄 회로 기판.
  4. 제3항에 있어서, 상기 제1 부분은 상기 PCB의 중앙에 위치해 있고 상기 제2 부분은 상기 제1 부분 주위에 위치해 있는 인쇄 회로 기판.
  5. 제2항, 제3항 또는 제4항에 있어서, 상기 제1 표면 영역은 상기 제2 표면 영역보다 큰 인쇄 회로 기판.
  6. 제5항에 있어서, 상기 제1 표면 영역은 상기 제2 표면 영역보다 25% 더 큰 인쇄 회로 기판.
  7. 제1항 내지 제6항 중 어느 한 항에 있어서, 유기 기판(organic substrate)을 가진 인쇄 회로 기판.
  8. 제1항 내지 제7항 중 어느 한 항에 따른 PCB를 포함하며, 상기 PCB는 제2면에 다수의 패드에 접속된 적어도 하나의 전자 소자에 접속 가능한 도전성 층을 갖는 플라스틱 볼 그리드 어레이 모듈.
  9. 제8항에 있어서, 상기 제1 영역은 적어도 하나의 전자 소자와 연통하여 (incorrespondence with) 위치되어 있는 플라스틱 볼 그리드 어레이 모듈.
KR1019970015783A 1996-06-19 1997-04-26 상이한크기의땜납장착패드를갖는전자볼그리드어레이모듈 KR100294602B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
GB9612769.1 1996-06-19
GB9612769A GB2314463A (en) 1996-06-19 1996-06-19 PCB mounting pad arrangement for plastic ball grid array module

Publications (2)

Publication Number Publication Date
KR980007895A true KR980007895A (ko) 1998-03-30
KR100294602B1 KR100294602B1 (ko) 2001-09-17

Family

ID=10795510

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019970015783A KR100294602B1 (ko) 1996-06-19 1997-04-26 상이한크기의땜납장착패드를갖는전자볼그리드어레이모듈

Country Status (6)

Country Link
EP (1) EP0814511A3 (ko)
JP (1) JPH1056102A (ko)
KR (1) KR100294602B1 (ko)
CN (1) CN1168617A (ko)
GB (1) GB2314463A (ko)
TW (1) TW345797B (ko)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200111520A (ko) 2019-03-19 2020-09-29 현대자동차주식회사 자동차용 대시 판넬 어셈블리 및 대시 판넬용 더스트 커버 판넬

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001007473A (ja) * 1999-06-17 2001-01-12 Nec Corp 集積回路素子の実装構造および方法
JP2004214657A (ja) 2003-01-07 2004-07-29 Internatl Business Mach Corp <Ibm> プリント回路板製造用水溶性保護ペースト
US7074049B2 (en) * 2004-03-22 2006-07-11 Johnstech International Corporation Kelvin contact module for a microcircuit test system
JP2006190902A (ja) * 2005-01-07 2006-07-20 Denso Corp 半導体電子部品の実装方法及び半導体電子部品の配線基板
JP4595823B2 (ja) 2006-01-24 2010-12-08 株式会社デンソー ボールグリッドアレイ
KR100818109B1 (ko) * 2007-03-15 2008-03-31 주식회사 하이닉스반도체 볼 그리드 어레이 패키지 제조용 볼 어태치 장치
US8766453B2 (en) * 2012-10-25 2014-07-01 Freescale Semiconductor, Inc. Packaged integrated circuit having large solder pads and method for forming
CN111755339B (zh) * 2020-06-30 2022-03-25 青岛歌尔微电子研究院有限公司 基于变形基板的锡膏植球方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4600970A (en) * 1984-05-29 1986-07-15 Rca Corporation Leadless chip carriers having self-aligning mounting pads
JP3291368B2 (ja) * 1993-07-06 2002-06-10 シチズン時計株式会社 ボールグリッドアレイ型半導体パッケージの構造
JP2867313B2 (ja) * 1993-12-10 1999-03-08 日本特殊陶業株式会社 セラミック基板
JPH0897322A (ja) * 1994-09-22 1996-04-12 Oki Electric Ind Co Ltd 半導体パッケージ
JPH08162560A (ja) * 1994-12-01 1996-06-21 Matsushita Electric Ind Co Ltd 電子部品

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20200111520A (ko) 2019-03-19 2020-09-29 현대자동차주식회사 자동차용 대시 판넬 어셈블리 및 대시 판넬용 더스트 커버 판넬

Also Published As

Publication number Publication date
KR100294602B1 (ko) 2001-09-17
JPH1056102A (ja) 1998-02-24
GB9612769D0 (en) 1996-08-21
CN1168617A (zh) 1997-12-24
GB2314463A (en) 1997-12-24
EP0814511A2 (en) 1997-12-29
TW345797B (en) 1998-11-21
EP0814511A3 (en) 1998-11-18

Similar Documents

Publication Publication Date Title
US5367435A (en) Electronic package structure and method of making same
EP1895586A3 (en) Semiconductor package substrate
EP1041633A4 (en) SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, PRINTED CIRCUIT BOARD, ELECTRONIC DEVICE
SG81960A1 (en) Semiconductor device, substrate for a semiconductor device, method of manufacture thereof, and electronic instrument
TW352474B (en) A ball grid array integrated circuit package that has vias located within the solder pads of a package
SG133406A1 (en) Substrates including innovative solder ball pad structure
GB2317268B (en) Integral copper column withsolder bump flip-chip
FR2840711B1 (fr) Carte de circuit integre et procede de fabrication de celle-ci
EP0350588A3 (en) Electronic package with improved heat sink
CA2242802A1 (en) Mounting structure for one or more semiconductor devices
KR970030750A (ko) 반도체장치 및 그것을 사용한 전자장치
EP0996154A4 (en) SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD, CIRCUIT SUBSTRATE AND ELECTRONIC DEVICE
MY123146A (en) Perimeter matrix ball grid array circuit package with a populated center
EP1447849A3 (en) Semiconductor device and circuit board having the same mounted thereon
KR970013236A (ko) 금속 회로 기판을 갖는 칩 스케일 패키지
US6368894B1 (en) Multi-chip semiconductor module and manufacturing process thereof
BR9712107A (pt) Módulo de chip e processo para a fabricação de um módulo de chip.
CA2355037A1 (en) Circuit board assembly with heat sinking
KR970067799A (ko) 반도체장치
KR920010872A (ko) 멀티칩 모듈
KR980007895A (ko) 플라스틱 볼 그리드 어레이 모듈
EP0971406A3 (en) Chip-sized semiconductor device
KR920001697A (ko) 수직형 반도체 상호 접촉 방법 및 그 구조
KR910008824A (ko) 반도체소자패키지 및 반도체소자패키지 탑재배선회로기판
KR920022431A (ko) 반도체 장치용 패키지

Legal Events

Date Code Title Description
A201 Request for examination
E902 Notification of reason for refusal
E701 Decision to grant or registration of patent right
GRNT Written decision to grant
LAPS Lapse due to unpaid annual fee