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KR970063766A - Manufacturing method of semiconductor substrate - Google Patents

Manufacturing method of semiconductor substrate Download PDF

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Publication number
KR970063766A
KR970063766A KR1019970006613A KR19970006613A KR970063766A KR 970063766 A KR970063766 A KR 970063766A KR 1019970006613 A KR1019970006613 A KR 1019970006613A KR 19970006613 A KR19970006613 A KR 19970006613A KR 970063766 A KR970063766 A KR 970063766A
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substrate
porous
layer
bonding
manufacturing
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KR1019970006613A
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KR100238571B1 (en
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키요후미 사카구찌
타카오 요네하라
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미타라이 후지오
캐논 가부시기가이샤
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Recrystallisation Techniques (AREA)
  • Element Separation (AREA)
  • Thin Film Transistor (AREA)

Abstract

충분한 품질과 우수한 재현성으로 SOI기판을 제조하는 것이며, 동시에, 웨이퍼 등의 재사용을 통해 자원절약과 비용절감을 실현하는 방법으로 비다공성박막의 적어도 한층이 다공성 Si층을 통해 형성되어 있는 제1기판(11)의 주표면을 제2기판(15)의 주표면에 결합하는 공정, 제1기판(11)과 제2기판(15)으로 이루어진 결합기판의 양면에서 다공성 Si층을 노출시키는 공정, 결합기판을 산화시켜 다공성 Si층을 분할하는 공정 및 다공성 Si층의 분할로 분리된 제2기판(15)위의 다공성 Si(12)와 산화다공성 Si층(16)을 제거하는 공정으로 이루어진다.At the same time, the SOI substrate is manufactured with sufficient quality and excellent reproducibility, and at the same time, at least one layer of the non-porous thin film is formed through the porous Si layer to realize resource saving and cost reduction through reuse of the wafer. 11) bonding the main surface of the second substrate 15 to the main surface of the second substrate 15, exposing the porous Si layer on both sides of the bonding substrate consisting of the first substrate 11 and the second substrate 15, the bonding substrate And oxidizing the porous Si layer and removing the porous Si 12 and the oxidized Si layer 16 on the second substrate 15 separated by the division of the porous Si layer.

Description

반도체기판의 제조방법.Method of manufacturing a semiconductor substrate.

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제1도는 본 발명의 원리를 설명하는 개략단면도.1 is a schematic cross-sectional view illustrating the principles of the present invention.

Claims (25)

다공성Si층을 통해 비다공성박막의 적어도 1층이 형성되어 있는 Si기판인 제1기판의 주요면을 제2기판의 주요면에 결합하는 공정 : 상기 제1기판과 상기 제2기판으로 이루어진 결합기판의 측면에 상기 다공성 Si층을 노출하는 공정; 상기 다공성Si층내의 상기 결합기판을 상기 결합기판을 산화시켜서 분할하는 공정; 및 상기 다공성Si층내 상기 결합기판의 분할로 분리된 상기 제2기판위의 다공성Si와 산화다공성Si층을 제거하는 공정으로 이루어진 반도체기판의 제조방법.Bonding the main surface of the first substrate, which is an Si substrate, on which at least one layer of the non-porous thin film is formed through the porous Si layer, to the main surface of the second substrate: a bonding substrate comprising the first substrate and the second substrate Exposing the porous Si layer to a side surface; Dividing the bonding substrate in the porous Si layer by oxidizing the bonding substrate; And removing the porous Si and the oxide porous Si layer on the second substrate separated by the division of the bonding substrate in the porous Si layer. 다공성Si층을 통해 비다공성박막의 적어도 1층이 형성되어 있고, 상기 다공성Si층이 이들의 측면에서 노출되어 있는 Si기판인 제1기판의 주요면을 제2기판의 주요면에 결합하는 공정; 상기 제1기판과 상기 제2판으로 이루어진 결합기판을 산화시켜 상기 다공정Si층내 상기 결합기판을 분할하는 공정; 및 상기 다공성Si층내 상기 결합기판의 분할로 분리된 상기 제2기판위의 다공성Si와 산화다공성Si층을 제거하는 공정으로 이루어진 반도체기판의 제조방법.Bonding at least one layer of the non-porous thin film through the porous Si layer, the main surface of the first substrate being a Si substrate with the porous Si layer exposed from their sides, to the main surface of the second substrate; Dividing the bonding substrate in the multi-process Si layer by oxidizing a bonding substrate composed of the first substrate and the second substrate; And removing the porous Si and the oxide porous Si layer on the second substrate separated by the division of the bonding substrate in the porous Si layer. 제1항 또는 제2항에 있어서, 다공성Si층의 상기 분할로 분리된 제1기판상의 다공성Si와 산화다공성Si층을제거한 후, 상기 제1기판용 원료로서 제1기판을 결합전에 다시 사용하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein after removing the porous Si and the porous Si layer on the first substrate separated by the division of the porous Si layer, the first substrate is used again before bonding as the raw material for the first substrate. A method of manufacturing a semiconductor substrate, characterized in that. 제1항 또는 제2항에 있어서, 다공성Si층의 상기 분할로 분리된 제1기판상의 다공성Si와 산화다공성Si층을 제거한 후, 상기 제2기판용 원료로서 제1기판을 결합전에 다시 사용하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein after removing the porous Si and the porous Si layer on the first substrate separated by the division of the porous Si layer, the first substrate is used again before bonding as the raw material for the second substrate. A method of manufacturing a semiconductor substrate, characterized in that. 제1항 또는 제2항에 있어서, 적어도 하나의 비다공성박막층을, 다공성Si층을 통해, 상기 2개의 주표면의 각각에 상기 제1기판과 상기 제2기판의 결합해 있는 2개의 주표면 각각에 형성하는 것을 특징으로 하는 반도체기판의 제조방법.The two main surfaces of claim 1 or 2, wherein at least one non-porous thin film layer is bonded to each of the two main surfaces through the porous Si layer, respectively, of the first substrate and the second substrate. Forming a semiconductor substrate. 제1항 또는 제2항에 있어서, 상기 비다공성박막은 단결정Si층인 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1, wherein the non-porous thin film is a single crystal Si layer. 제1항 또는 제2항에 있어서, 상기 비다공성박막은 산화된 Si층과 단결정Si층으로 이루어진 것을 특징으로 하는 반도체기판의 제조방법.The method according to claim 1 or 2, wherein the non-porous thin film is made of an oxidized Si layer and a single crystal Si layer. 제1항 또는 제2항에 있어서, 상기 비다공성박막은 단결정화합물반도체층인 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein the non-porous thin film is a single crystal compound semiconductor layer. 제1항 또는 제2항에 있어서, 상기 제2기판은 Si기판인 것을 특징으로 하는 반도체기판의 제조방법.The method according to claim 1 or 2, wherein the second substrate is a Si substrate. 제1항 또는 제2항에 있어서, 상기 제2기판은, 산화된 Si막이 결합되는 주표면상에 적어도 형성되어 있는 Si기판인 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein the second substrate is an Si substrate formed at least on a main surface to which the oxidized Si film is bonded. 제1항 또는 제2항에 있어서, 상기 제2기판은 광투명기판인 것을 특징으로 하는 반도체기판의 제조방법.The method according to claim 1 or 2, wherein the second substrate is a light transparent substrate. 제5항에 있어서, 상기 제1기판의 2개의 주표면에 각각 결합된 상기 제2기판은, Si기판, 결합되는 주표면에 적어도 산화된 Si막이 형성되어 있는 Si기판 및 광투명기판에서 선택된 것인 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 5, wherein the second substrate, each bonded to two major surfaces of the first substrate, is selected from an Si substrate, a Si substrate on which at least an oxidized Si film is formed, and a light transparent substrate. Method of manufacturing a semiconductor substrate, characterized in that. 제12항에 있어서, 상기 제1기판의 한쪽주면에 결합된 제2기판과 이들의 다른 주표면에 결합된 제2기판은 각각 서로 다른 재료로 이루어진 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 12, wherein the second substrate bonded to one main surface of the first substrate and the second substrate bonded to the other main surface thereof are made of different materials. 제1항 또는 제2항에 있어서, 제2기판의 주표면이 덮여있는 방향으로의 플래트닝공정을 상기 다공성Si와 산화다공성Si층을 제거한 후에 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein the flattening step in the direction in which the main surface of the second substrate is covered is performed after removing the porous Si and the porous oxide Si layer. 제14항에 있어서, 상기 표면플래트닝공정은 수소를 함유하는 분위기에서의 에닐링인 것을 특징으로 하는 반도체기판의 제조방법.15. The method of claim 14, wherein the surface flattening step is annealing in an atmosphere containing hydrogen. 제1항 또는 제2항에 있어서, 상기 다공성Si와 산화다공성Si층의 제거는, 불산, 불산, 완층된 불산에 적어도 하나의 알콜 및 과산화수소용액을 첨가한 혼합용액, 및 완층된 불산에 적어도 하나의 알콜 및 과산화수소용액을 첨가한 혼합용액중의 하나에 담금으로서 선택적으로 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein the removal of the porous Si and the porous oxide Si layer is performed by adding at least one alcohol and hydrogen peroxide solution to hydrofluoric acid, hydrofluoric acid, and complete hydrofluoric acid, and at least one hydrofluoric acid. A method of manufacturing a semiconductor substrate, characterized in that it is selectively carried out by immersing in one of a mixed solution containing an alcohol and a hydrogen peroxide solution. 제8항에 있어서, 상기 다공성Si와 산화다공성Si층의 제거는, 화합물반도체에 대해 다공성Si의 에칭율이 빠른 에칭제로 다공성Si를 선택적으로 화학에칭함으로서 행하는 것을 특징으로 하는 반도체기판의 제조방법.10. The method of claim 8, wherein the porous Si and the porous oxide Si layer are removed by selectively chemically etching porous Si with an etchant having a high etching rate of porous Si with respect to the compound semiconductor. 제1항 또는 제2항에 있어서, 상기 다공성Si와 산화다공성Si층의 제거는 스톱퍼로서 상기 비다공성박막을 사용하여 층을 연마함으로서 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method for manufacturing a semiconductor substrate according to claim 1 or 2, wherein the removal of the porous Si and the oxide porous Si layer is performed by polishing the layer using the non-porous thin film as a stopper. 제1항 또는 제2항에 있어서, 상기 제1기판과 상기 제2기판의 결합은 기판을 서로 밀착시키는 것으르 특징을 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein the bonding of the first substrate and the second substrate brings the substrates into close contact with each other. 제1항 또는 제2항에 있어서, 상기 제1기판과 상기 제2기판의 결합은 양극결합프레스, 애닐링, 이들의 조합에서 선택된 방법으로 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein the bonding of the first substrate and the second substrate is performed by a method selected from anodic bonding presses, annealing, and combinations thereof. 제1항 또는 제2항에 있어서, 다공성Si층위의 비다공성박막의 형성은, Si기판을 양극처리하여 다공성Si를 형성하고, 그후, 상기 다공성Si상에 비다공성박막을 형성하여 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein the formation of the nonporous thin film on the porous Si layer is performed by anodizing the Si substrate to form porous Si, and then forming a nonporous thin film on the porous Si. A method of manufacturing a semiconductor substrate. 제1항 또는 제2항에 있어서, 다공성Si층위의 비다공성박막의 형성은, 회가스, 수소 및 질소의 적어도 하나의 원소의 이온을 Si기판에 주입하여 이들 표면에서 일정깊이로 다공성층을 형성하는 것에 의해 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein the formation of the non-porous thin film on the porous Si layer is performed by implanting ions of at least one element of ash gas, hydrogen and nitrogen into the Si substrate to form a porous layer at a predetermined depth on these surfaces. A method of manufacturing a semiconductor substrate, which is performed by 제1항 또는 제2항에 있어서, 다공성Si층위의 비다공성박막의 형성은, Si기판을 양극처리하여 다공성Si층을 형성하고, 그후, 상기 다공성Si층위에 비다공성박막을 형성한 다음, 비다공성박막을 통하여 회가스, 수소, 질소의 적어도 하나의 원소의 이온을 상기 다공성Si층에 주입하여 상기 다공성Si층에서 이들의 투사범위를 지니도록 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of claim 1 or 2, wherein the formation of the nonporous thin film on the porous Si layer is performed by anodizing the Si substrate to form a porous Si layer, and then forming a nonporous thin film on the porous Si layer. And implanting ions of at least one element of ash gas, hydrogen, or nitrogen into the porous Si layer through the porous thin film to have their projection range in the porous Si layer. 제21항에 있어서, 상기 양극처리는 HF용액에서 행하는 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 21, wherein the anodization is performed in an HF solution. 제1항 또는 제2항에 있어서, 상기 결합기판의 산화전에, Si보다 열팽창계수가 적은 재료의 층을 상기 결합기판의 외부표면의 적어도 하나에 형성하는 것을 특징으로 하는 반도체기판의 제조방법.The method of manufacturing a semiconductor substrate according to claim 1 or 2, wherein before the oxidation of the bonding substrate, a layer of a material having a coefficient of thermal expansion less than that of Si is formed on at least one of an outer surface of the bonding substrate. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019970006613A 1996-02-28 1997-02-28 Manufacture of semiconductor substrate KR100238571B1 (en)

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JP04170996A JP3293736B2 (en) 1996-02-28 1996-02-28 Semiconductor substrate manufacturing method and bonded substrate
JP96-41709 1996-02-28

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KR100238571B1 KR100238571B1 (en) 2000-01-15

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JP (1) JP3293736B2 (en)
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CN (1) CN1135601C (en)
CA (1) CA2198552C (en)
SG (1) SG55280A1 (en)
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