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KR970054471A - Method of manufacturing thin film bipolar transistor - Google Patents

Method of manufacturing thin film bipolar transistor Download PDF

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Publication number
KR970054471A
KR970054471A KR1019950065835A KR19950065835A KR970054471A KR 970054471 A KR970054471 A KR 970054471A KR 1019950065835 A KR1019950065835 A KR 1019950065835A KR 19950065835 A KR19950065835 A KR 19950065835A KR 970054471 A KR970054471 A KR 970054471A
Authority
KR
South Korea
Prior art keywords
bipolar transistor
conductivity type
forming
photoresist
implanting impurities
Prior art date
Application number
KR1019950065835A
Other languages
Korean (ko)
Inventor
김영옥
Original Assignee
김광호
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 김광호, 삼성전자 주식회사 filed Critical 김광호
Priority to KR1019950065835A priority Critical patent/KR970054471A/en
Publication of KR970054471A publication Critical patent/KR970054471A/en

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  • Bipolar Transistors (AREA)

Abstract

본 발명은 박막 바이폴라 트랜지스터에 관한 것으로서, 특히 반도체 기판상의 산화막 위에 다결정실리콘막을 도포한 후 전면에 제1도전형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 내부 베이스를 형성하기 위하여 바이폴라 트랜지스터의 콜렉터 영역을 제외한 나머지 부분이 노출되도록 포토레지스트를 형성한 후 제2전도형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 외부 베이스를 형성하기 위하여 상기 바이폴라 트랜지스터의 외부 베이스영역이 노출되도록 포토레지스트를 형성한 후 제2전도형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 에미터 및 콜렉터의 콘택영역을 형성하기 위하여 상기 영역이 노출되도록 포토레지스터를 형성한 후 제1전도형의 불순물을 이온주입하는 단계; 결과물의전면에 절연을 위한 산화막을 도포하고 에미터, 베이스, 콜렉터의 각 단자의 금속전극을 위하여 통상의 사진식각공정을 사용하여 각 단자에 콘택홀을 형성하고 전면에 금속도전층을 도포한 후 상기 금속도전층을 통상의 사진식각공정을 사용하여 원하는 패턴을 형성하는 단계를 구비하는 것을 특징으로 한다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a thin film bipolar transistor, and more particularly, comprising: applying a polysilicon film on an oxide film on a semiconductor substrate and ion implanting impurities of a first conductivity type on the front surface; Implanting impurities of a second conductivity type after forming a photoresist such that the remaining portion except the collector region of the bipolar transistor is exposed to form an inner base of the bipolar transistor; Implanting impurities of a second conductivity type after forming a photoresist to expose the outer base region of the bipolar transistor to form an outer base of the bipolar transistor; Implanting impurities of a first conductivity type after forming a photoresist such that the region is exposed to form contact regions of the emitter and the collector of the bipolar transistor; After applying oxide film to insulate the entire surface of the resultant, contact hole is formed in each terminal by using normal photolithography process for metal electrode of each terminal of emitter, base and collector, and then metal conductive layer is applied on the front side. The metal conductive layer is characterized by comprising the step of forming a desired pattern using a conventional photolithography process.

따라서, 본 발명에서는 폴리실리콘막에 바이폴라 트랜지스터를 형성할 수 있다.Therefore, in the present invention, a bipolar transistor can be formed in the polysilicon film.

Description

박막 바이폴라 트랜지스터 제조방법Method of manufacturing thin film bipolar transistor

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제1도는 Ⅰ본 발명에 의한 박막 바이폴라 트랜지스터 제조공정순서를 나타낸 도면.1 is a view showing a manufacturing procedure of the thin film bipolar transistor according to the present invention.

Claims (1)

반도체 기판상에 소정 두께로 산화막을 도포하고 그 결과물상에 다결정실리콘막을 도포한 후 전면에 제1전도형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 내부 베이스를 형성하기 위하여 바이폴라 트랜지스터의 콜렉터 영역을 제외한 나머지 부분이 노출되도록 포토레지스터를 형성한 후 제2전도형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 외부 베이스를 형성하기 위하여 상기 바이폴라 트랜지스터의 외부 베이스영역이 노출되도록 포토레지스트를 형성한 후 제2전도형의 불순물을 이온주입하는 단계; 바이폴라 트랜지스터의 에미터 및 콜렉터의 콘택영역을 형성하기 위하여 상기 영역이 노출되도록 포토레지스터를 형성한 후 제1전도형의 불순물을 이온주입하는 단계; 상기 결과물의전면에 절연을 위한 산화막을 도포하고 에미터, 베이스, 콜렉터의 각 단자의 금속전극을 위하여 통상의 사진식각공정을 사용하여 각 단자에 콘택홀을 형성하고 전면에 금속도전층을 도포한 후 상기 금속도전층을 통상의 사진식각공정을 사용하여 원하는 패턴을 형성하는 단계를 구비하는 것을 특징으로 하는 박막 바이폴라 트랜지스터의 제조방법.Applying an oxide film on a semiconductor substrate to a predetermined thickness and then applying a polysilicon film on the resultant, and ion implanting an impurity of a first conductivity type on the entire surface; Implanting impurities of a second conductivity type after forming a photoresist such that the remaining portion except the collector region of the bipolar transistor is exposed to form an inner base of the bipolar transistor; Implanting impurities of a second conductivity type after forming a photoresist to expose the outer base region of the bipolar transistor to form an outer base of the bipolar transistor; Implanting impurities of a first conductivity type after forming a photoresist such that the region is exposed to form contact regions of the emitter and the collector of the bipolar transistor; An oxide film for insulation is coated on the entire surface of the resultant, and a contact hole is formed in each terminal using a conventional photolithography process for metal electrodes of each terminal of the emitter, the base and the collector, and the metal conductive layer is coated on the front surface. And forming a desired pattern on the metal conductive layer using a conventional photolithography process. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019950065835A 1995-12-29 1995-12-29 Method of manufacturing thin film bipolar transistor KR970054471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1019950065835A KR970054471A (en) 1995-12-29 1995-12-29 Method of manufacturing thin film bipolar transistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019950065835A KR970054471A (en) 1995-12-29 1995-12-29 Method of manufacturing thin film bipolar transistor

Publications (1)

Publication Number Publication Date
KR970054471A true KR970054471A (en) 1997-07-31

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1019950065835A KR970054471A (en) 1995-12-29 1995-12-29 Method of manufacturing thin film bipolar transistor

Country Status (1)

Country Link
KR (1) KR970054471A (en)

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