KR960032208A

KR960032208A - Reed-Solomon Decoder

Info

Publication number: KR960032208A
Application number: KR1019950002127A
Authority: KR
Inventors: 박상진
Original assignee: 구자홍; Lg 전자 주식회사
Priority date: 1995-02-07
Filing date: 1995-02-07
Publication date: 1996-09-17

Abstract

본 발명은 리드-솔로몬 디코더에 관한 것으로 , 가변되는 데이터에 따라 패리티 수를 셋팅하여 다중경로신호를 발생하기 위한 패리티 가변 코딩부와, 더미 데이터를 입력으로 하여 다른 비트 패턴 중에 있는 특정비트의 정보를 변경하거나 격리하기 위한 더미 데이터 마스크와, 데이터를 입력으로하며 상기 다중결로신호에 따라 신드롬 함수를 산출하기 위한 가변 신드롬 발생부와, 상기 다중경로 신호에 따라 에러위치 프래그신호로부터 에러위치를 계산하여 에러발생 순서대로 가변소거함수를 산출하기 위한 가변 소거함수 발생부와, 상기 시드롬 함수와 상기 가변 소거함수를 유클리드 연산의 초기조건으로 출력하기 위한 연산부와, 상기 연산부로부터 입력된 초기조건과 에러플래그 신호를 유클리드 연산하여 에러크기함수와 에러위치함수를 산출하기 위한 가변 에러위치/크기 연산부와, 어드레스에 따라 읽기/ 쓰기 시점을 다르게 하여 임의의 형태를 가지는 데이터 형식에 적용가능하므로 범용성이 뛰어나고, 더미 데이타의 바이패스와 같은 부가기능을 확보함으로써 여러시스템에 동시에 적용할 수 있는 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Reed-Solomon decoder, wherein a parity variable coding unit for generating a multipath signal by setting a parity number according to variable data, and information of a specific bit in another bit pattern by inputting dummy data A dummy data mask for changing or isolating, a variable syndrome generator for inputting data and calculating a syndrome function according to the multi-condensation signal, and calculating an error position from an error position flag signal according to the multi-path signal. A variable erasing function generator for calculating a variable erasing function in order of error occurrence, a calculator for outputting the seed ROM function and the variable erasing function as an initial condition of Euclid operation, an initial condition and an error flag input from the calculating part Calculate the error magnitude and error position functions by Euclidean the signal Variable error position / size calculation unit and different read / write points according to address can be applied to any type of data format, so it is highly versatile and secures additional functions such as bypassing dummy data. It can be applied at the same time.

Description

Reed-Solomon Decoder

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음Since this is an open matter, no full text was included.

제2도는 본 발명에 의한 리드-솔로몬 디코더의 구성블럭도.2 is a block diagram of a Reed-Solomon decoder according to the present invention.

Claims

A parity variable coding unit for generating a multipath signal by setting a parity number according to the variable data, a variable syndrome generator for inputting data and calculating a syndrome function according to the multipath signal, and the multipath signal A variable erasing function generating unit for calculating a variable erasing function in order of error occurrence by calculating an error position from the error position flag signal according to the error position, and a calculating unit for outputting the syndrome function and the variable erasing function as an initial condition of Euclidean operation And a variable error position / size operation unit for calculating an error size function and an error position function by Euclid operation of the initial condition and the error flag signal inputted from the operation unit, and by varying the read / write time points according to addresses. Has a number of values that allow the call time of the data to be adjusted accordingly. Solomon decoder, characterized in that the lead is configured to include a first-in, first-out portion.

The Reed-Solomon decoder of claim 1, wherein the variable syndrome generator is further connected to a dummy data mask for masking the dummy data when the dummy data is input and bypassing the dummy data without damaging other data.

The Reed-Solomon decoder of claim 1, wherein the variable first-in, first-out unit is configured as a dual port memory to simultaneously read and write.

※ Note: Disclosure is based on the initial application.