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KR960018895A - Memory device with the function of cache memory - Google Patents

Memory device with the function of cache memory Download PDF

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Publication number
KR960018895A
KR960018895A KR1019940028858A KR19940028858A KR960018895A KR 960018895 A KR960018895 A KR 960018895A KR 1019940028858 A KR1019940028858 A KR 1019940028858A KR 19940028858 A KR19940028858 A KR 19940028858A KR 960018895 A KR960018895 A KR 960018895A
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South Korea
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data
input
address
output
buffer means
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KR1019940028858A
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Korean (ko)
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KR0140470B1 (en
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이재진
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김주용
현대전자산업 주식회사
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Publication of KR960018895A publication Critical patent/KR960018895A/en
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Abstract

본 발명은 반도체 기억소자의 캐시 메모리의 기능을 갖는 메모리 장치에 관한 것으로, 모디파이드 라이트 데이타(modified write data)를, 데이타를 출력한 핀(pin)이 아닌 다른 데이타 핀을 이용하여 데이타 레지스터에 일시적으로 저장시켜 둠으로써, 연속적인 리드 동작을 수행하고 난 이후에 연속적인 라이트 동작이 가능하도록 하여 데이타의 리드 모디파이더 라이트(rmw)시 동작속도를 빠르게 할 수 있는 효과가 있다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory device having a function of a cache memory of a semiconductor memory device, wherein modulated write data is temporarily stored in a data register by using a data pin other than the pin on which the data is output. By storing the data as a result, the continuous write operation can be performed after the continuous read operation is performed, and thus the operation speed of the read modifier light rmw of the data can be increased.

Description

캐시 메모리의 기능을 갖는 메모리 장치Memory device with the function of cache memory

본 내용은 요부공개 건이므로 전문내용을 수록하지 않았음As this is a public information case, the full text was not included.

제3도는 본 발명에 따른 리드 모디파이 라이트 동작회로의 회로도.3 is a circuit diagram of a read modifier light operation circuit according to the present invention.

제4도는 제3도의 레지스터가 연속적인 데이타의 리드 라이트 동작을 수행하기 위한 어드레스 발생장치의 일실시예.4 is an embodiment of an address generator for performing the register write operation of the third data read write operation.

제5도는 연속적인 리드 동작 및 연속적인 라이트 동작으로 리드 모디파이 라이트 동작을 수행하는 경우의 타이밍도.5 is a timing diagram when a read modifier write operation is performed in a continuous read operation and a continuous write operation.

Claims (5)

입력 데이타를 셀 어레이 블럭에 저장하는 내부 메모리부와, 상기 메모리부에 저장된 데이타를 소자의 외부로 출력하기 위한 출력 버퍼 수단과, 상기 출력버퍼수단으로 부터의 리드 데이타를 출력하기 위한 입출력단자와, 상기 입출력단자로 부터의 출력된 리드 데이타를 상기 내부 메모리부에 입력하기 위한 입력버퍼수단과, 상기 입력 버퍼수단으로 부터의 입력된 데이타를 소자의 외부에 일시적으로 저장하기 위한 데이타 레지스터 수단과, 상기 데이타 레지스터가 연속적인 데이타의 리드 라이트 동작을 수행하기 위한 어드레스를 발생하여 상기 데이타 레지스터부에 공급하는 어드레스 발생수단을 구비하는 것을 특징으로 하는 메모리 장치.An internal memory unit for storing input data in a cell array block, an output buffer means for outputting data stored in the memory unit to the outside of the device, an input / output terminal for outputting read data from the output buffer means, An input buffer means for inputting read data output from the input / output terminal to the internal memory unit, a data register means for temporarily storing the data input from the input buffer means to the outside of the element, and And a data generating means for generating an address for performing a continuous read / write operation of data and supplying the address to the data register. 제1항에 있어서, 상기 입력 버퍼수단은 멀티플렉스 회로를 포함하는 것을 특징으로 하는 메모리 장치.The memory device as set forth in claim 1, wherein said input buffer means comprises a multiplex circuit. 제1항에 있어서, 상기 어드레스 발생수단은, 상기 데이타 레지스터 수단으로 하여금 데이타를 순차적으로 리드 라이트 하도록 순차 어드레스를 발생하는 것을 특징으로 하는 메모리 장치.The memory device according to claim 1, wherein said address generating means generates a sequential address so that said data register means reads data sequentially. 제1항에 있어서, 상기 데이타 레지스터 수단은, 상기 연속적으로 저장된 데이타를 상기 어드레스 발생수단에 의해 입력된 순서 또는 그 반대의 순서로 상기 내부 메모리로 전달하는 것을 특징으로 하는 메모리 장치.The memory device according to claim 1, wherein said data register means transfers said continuously stored data to said internal memory in the order inputted by said address generating means or vice versa. 입력 데이타 셀 어레이 블럭에 저장하는 내부 메모리부와, 상기 메모리부에 저장된 데이타를 소자의 외부로 출력하기 위한 제1, 제2출력버퍼수단과, 상기 출력 버퍼수단으로 부터의 리드 데이타를 출력하기 위한 제1, 제2입출력단자와, 상기 제1, 제2입출력단자로 부터의 출력된 리드 데이타를 상기 내부 메모리부에 입력하기 위한 제1, 제2입력 버퍼수단과, 상기 제1, 제2입력 버퍼수단으로 부터의 입력된 데이타를 소자의 외부에 일시적으로 저장하기 위한 데이타 레지스터수단과, 상기 데이타 레지스터가 연속적인 데이타의 리드 라이트 동작을 수행하기 위한 어드레스를 발생하여 상기 데이타 레지스터부에 공급하는 어드레스 발생수단을 구비하는 것을 특징으로 하는 메모리 장치.An internal memory unit for storing the input data cell array block, first and second output buffer means for outputting data stored in the memory unit to the outside of the device, and for outputting read data from the output buffer means. First and second input buffer means for inputting first and second input / output terminals, read data output from the first and second input / output terminals, to the internal memory unit, and the first and second inputs. Data register means for temporarily storing the data input from the buffer means to the outside of the device, and an address for generating and supplying an address for the data register to perform a continuous read write operation of the data and supplying it to the data register portion. And a generating means. ※ 참고사항 : 최초출원 내용에 의하여 공개하는 것임.※ Note: The disclosure is based on the initial application.
KR1019940028858A 1994-11-04 1994-11-04 Memory device with the function of cache memory KR0140470B1 (en)

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KR960018895A true KR960018895A (en) 1996-06-17
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JP5101736B2 (en) 2008-07-25 2012-12-19 ヒューレット−パッカード デベロップメント カンパニー エル．ピー． Leakage current dissipation device
KR102697484B1 (en) * 2017-01-23 2024-08-21 에스케이하이닉스 주식회사 Semiconductor device

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