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KR930016280U - Highly integrated package - Google Patents

Highly integrated package

Info

Publication number
KR930016280U
KR930016280U KR2019910024568U KR910024568U KR930016280U KR 930016280 U KR930016280 U KR 930016280U KR 2019910024568 U KR2019910024568 U KR 2019910024568U KR 910024568 U KR910024568 U KR 910024568U KR 930016280 U KR930016280 U KR 930016280U
Authority
KR
South Korea
Prior art keywords
highly integrated
integrated package
package
highly
integrated
Prior art date
Application number
KR2019910024568U
Other languages
Korean (ko)
Other versions
KR940008643Y1 (en
Inventor
송웅호
Original Assignee
삼성전자 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 삼성전자 주식회사 filed Critical 삼성전자 주식회사
Priority to KR2019910024568U priority Critical patent/KR940008643Y1/en
Publication of KR930016280U publication Critical patent/KR930016280U/en
Application granted granted Critical
Publication of KR940008643Y1 publication Critical patent/KR940008643Y1/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Lead Frames For Integrated Circuits (AREA)
KR2019910024568U 1991-12-28 1991-12-28 Lsi package KR940008643Y1 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR2019910024568U KR940008643Y1 (en) 1991-12-28 1991-12-28 Lsi package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR2019910024568U KR940008643Y1 (en) 1991-12-28 1991-12-28 Lsi package

Publications (2)

Publication Number Publication Date
KR930016280U true KR930016280U (en) 1993-07-28
KR940008643Y1 KR940008643Y1 (en) 1994-12-26

Family

ID=19326185

Family Applications (1)

Application Number Title Priority Date Filing Date
KR2019910024568U KR940008643Y1 (en) 1991-12-28 1991-12-28 Lsi package

Country Status (1)

Country Link
KR (1) KR940008643Y1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100288071B1 (en) * 1998-03-10 2001-05-02 김춘호 Duplexer for portable communication terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100288071B1 (en) * 1998-03-10 2001-05-02 김춘호 Duplexer for portable communication terminal

Also Published As

Publication number Publication date
KR940008643Y1 (en) 1994-12-26

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Legal Events

Date Code Title Description
A201 Request for examination
E701 Decision to grant or registration of patent right
REGI Registration of establishment
FPAY Annual fee payment

Payment date: 20040331

Year of fee payment: 11

LAPS Lapse due to unpaid annual fee