KR890000184Y1 - Electric circuit plate - Google Patents
Electric circuit plate Download PDFInfo
- Publication number
- KR890000184Y1 KR890000184Y1 KR2019840005996U KR840005996U KR890000184Y1 KR 890000184 Y1 KR890000184 Y1 KR 890000184Y1 KR 2019840005996 U KR2019840005996 U KR 2019840005996U KR 840005996 U KR840005996 U KR 840005996U KR 890000184 Y1 KR890000184 Y1 KR 890000184Y1
- Authority
- KR
- South Korea
- Prior art keywords
- conductive pattern
- circuit board
- electric circuit
- insertion portion
- insulating substrate
- Prior art date
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Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Structure Of Printed Boards (AREA)
- Non-Metallic Protective Coatings For Printed Circuits (AREA)
Abstract
내용 없음.No content.
Description
제1도는 본 고안의 전기회로 기판에 관한 한 실시예를 나타낸 사시도.1 is a perspective view showing an embodiment of an electric circuit board of the present invention.
제2도는 제1도중의 A-A선 단면도이다.2 is a cross-sectional view taken along the line A-A in FIG.
* 도면의 주요부분에 대한 부호의 설명* Explanation of symbols for main parts of the drawings
2 : 절연기판 3 : 도전패턴2: insulated substrate 3: conductive pattern
4 : 레지스트 5 : 삽입부4: resist 5: insertion part
8 : 금속용융막 10 : 균열8 molten metal film 10 crack
본 고안은 전기 회로기판에 관한 것이며, 특히 전자부품등을 삽입하기 위한 투공이나 절결부 등의 삽입부를 설치한 전기회로 기판의 구조에 관한 것이다.The present invention relates to an electric circuit board, and more particularly, to a structure of an electric circuit board provided with inserts such as perforations or cutouts for inserting electronic components and the like.
종래 전자부품을 삽입하기 위한 투공이나 절결부등의 삽입부를 설치한 전기회로 기판은 다음과 같은 공정을 거쳐 제조된다. 절연기판의 표면에 동박등으로 이루어진 도전패턴이 설치되고 그 도전 패턴중에서 전자부품등을 납땜하는 부분을 제외하고, 전기 회로기판의 거의 전면에 걸쳐서 절연성 레지스트가 도포된다. 그리고 상기의 삽입부가 타발(打拔) 가공에 의해 설치된다.Conventionally, an electric circuit board provided with an insert such as a hole or cutout for inserting an electronic component is manufactured through the following process. A conductive pattern made of copper foil or the like is provided on the surface of the insulating substrate, and an insulating resist is applied over almost the entire surface of the electric circuit board except for a portion of the conductive pattern for soldering an electronic component or the like. And the said insertion part is provided by a punching process.
그러나 타발가공을 행할때 전기회로 기판의 삽입부 근방에는 강한 힘이 급격하게 가해지기 때문에 삽입부에 근접하는 도전패턴에 균열이 생길 경우가 있다. 특히 도전패턴이 가는 것일 경우에는 균열의 발생이 많아진다.However, when punching, strong force is suddenly applied near the insertion portion of the electric circuit board, so that a crack may occur in the conductive pattern near the insertion portion. In particular, when the conductive pattern is thin, the occurrence of cracks increases.
도전패턴에 발생한 큰 균열은 품질검사에서 발견되기 쉬워 그 같은 균열을 포함하는 전기회로 기판은 제거되고 제품이 되는 일은 극히 적으나 작은 균열은 검사에 빠지기 쉽고 이같은 균열을 포함하는 전기회로 기판은 그대로 제품이될 경우가 있다.Large cracks occurring in conductive patterns are easily found in quality inspections, and electrical circuit boards containing such cracks are removed and products are rarely produced, but small cracks are easy to inspect, and electrical circuit boards containing such cracks are intact. This may be the case.
균열은 외부로 부터의 기계적인 힘이나 부식에 의해 점차 확대되어 진행하고 접촉불량이나 도전패턴의 단선등의 고장을 일으킨다. 따라서 전기 회로기판의 신뢰성이 현저하게 저하된다.The crack is gradually enlarged by mechanical force or corrosion from the outside and causes failure such as contact failure or disconnection of conductive pattern. Therefore, the reliability of the electric circuit board is significantly reduced.
본 고안의 목적은 상기 종래 기술의 결점을 제거하고, 전기회로 기판에 전자부품의 삽입단을 삽입하는 투공이나 절결부등의 삽입부를 형성할때에 생기는 도전패턴의 균열의 진행방지를 행할 수 있는 구조를 한 전기회로기판을 제공하는 것이다. 이 목적을 달성하기 위해 본 고안은 도전패턴중 전자부품의 삽입단을 삽입하기 위한 절연기판의 소정위치에 설치된 삽입부에 근접한 부분의 표면에는 절연 보호막이 형성되지 않고, 상기 삽입부 형성시에 도전패턴중에서 삽입부에 근접한 부분에 발생한 균열의 진행방지를 위한 금속용융막을 형성하는 것을 특징으로 한다.The object of the present invention is to eliminate the drawbacks of the prior art and to prevent the progression of cracks in the conductive patterns generated when forming inserts such as perforations or cutouts for inserting insertion ends of electronic components on electrical circuit boards. It is to provide an electrical circuit board having a structure. In order to achieve this object, the present invention does not form an insulating protective film on the surface of the conductive pattern adjacent to the insertion portion provided at a predetermined position of the insulation substrate for inserting the insertion end of the electronic component, and conducts the conductive portion formation at the insertion portion. Forming a molten metal film for preventing the progress of the crack generated in the portion close to the insertion portion of the pattern.
이하 본 고안의 전기 회로기판에 관한 한 실시예를 제1도 및 제2도를 참조하여 설명한다.Hereinafter, an embodiment of an electric circuit board of the present invention will be described with reference to FIGS. 1 and 2.
전기 회로기판(1)은 유리 에폭시 복합제등의 절연재로 이루어진 절연기판(2)과 이 절연기판(2)의 표면에 설치되고 동박등으로 이루어지는 도전패턴(3)과, 납땜등을 하는 부분을 제외하여 전기 회로기판(1)의 거의 전면을 피복하는 절연성 합성수지로 이루어진 레지스트(4)와, 예를들어 전자부품(11)의 삽입단(12)등을 삽입하기 위한 투공이나 절결부등의 삽입부(5)에 의해 구성된다. 또한 도전패턴(3)중 삽입부(5)에 근접한 부분(7)은 레지스트(4)로 피복되지 않으며 그 부분(7)의 표면에는 납땜등에 의한 금속용융막(8)이 형성된다.The electrical circuit board 1 excludes an insulating substrate 2 made of an insulating material such as a glass epoxy composite, a conductive pattern 3 formed on the surface of the insulating substrate 2 and made of copper foil, and soldered parts. Inserts made of an insulating synthetic resin covering almost the entire surface of the electric circuit board 1, for example, perforations or cutouts for inserting the insertion end 12 of the electronic component 11, or the like. It is comprised by (5). The portion 7 of the conductive pattern 3 adjacent to the insertion portion 5 is not covered with the resist 4, and the molten metal film 8 is formed on the surface of the portion 7 by soldering or the like.
상기 구조의 전기 회로기판(1)은 다음과 같은 공정으로 제조된다.The electric circuit board 1 of the above structure is manufactured by the following process.
절연기판(2)상에 에칭에 의해 도전패턴(3)을 형성한다.The conductive pattern 3 is formed on the insulating substrate 2 by etching.
다음에 도전패턴(3)중 전자부품을 납땜하기 위한 끝부(9)등 소정의 장소와 삽입부(5)에 근접하는 부분(7)을 제외하고 전기 회로기판(1)의 전면에 레지스트(4)를 도포한다.Next, a resist 4 is applied to the entire surface of the electric circuit board 1 except for a predetermined place such as an end portion 9 for soldering an electronic component of the conductive pattern 3 and a portion 7 close to the insertion portion 5. ) Is applied.
그리고 타발가공에 의해 소정의 장소에 삽입부(5)를 형성한다.And the insertion part 5 is formed in a predetermined place by punching.
최후에 전자부품(11)이나 도시되지 않은 소정의 전자부품을 전기 회로기판(1)상에 배치하고, 도전패턴(3)을 딥핑(Diping)납땜처리하고, 상기 전자부품을 기판(1)에 고정함과 동시에 도전패턴(3)중 삽입부(5)에 근접하는 부분(7)의 표면에 납땜으로 이루어진 금속용융막(8)을 형성한다.Finally, the electronic component 11 or a predetermined electronic component (not shown) is disposed on the electric circuit board 1, the conductive pattern 3 is dip soldered, and the electronic component is placed on the substrate 1. At the same time as fixing, a molten metal film 8 made of solder is formed on the surface of the portion 7 of the conductive pattern 3 adjacent to the insertion portion 5.
또한 삽입부(5)는 타발 가공에 의하여 형성되므로 종래와 같이 도전패턴(3)중 삽입부(5)에 근접한 부분(7)에는 예를들면 제2도에 나타낸 바와 같이 균열(10)이 생길 경우가 있다.In addition, since the inserting portion 5 is formed by a punching process, a crack 10 may occur in the portion 7 of the conductive pattern 3 close to the inserting portion 5 as in the related art, for example, as shown in FIG. There is a case.
그러나 삽입부(5)에 근접한 부분(7), 즉 균열이 생기기 쉬운 부분(7)에는 레지스트(4)가 도포되어 있지 않으므로 딥핑납땜 처리의 경우에 제2도에 나타낸 바와 같이 균열(10)에 용융납이 침입하거나 납땜으로 이루어진 금속용융막(8)에 의해 피복되어 균열의 진행이 방지된다.However, since the resist 4 is not applied to the portion 7 adjacent to the insertion portion 5, that is, the portion 7 which is likely to be cracked, the crack 10 is formed as shown in FIG. 2 in the case of the deep soldering process. Molten lead intrudes or is covered by the molten metal film 8 made of solder to prevent the progress of cracking.
본 고안은 상술과 같이 도전패턴중에서 전자부분의 삽입단을 삽입하기 위해 설치된 투공이나 절결부등의 삽입부에 근접한 부분의 표면에는 절연 보호막이 형성되지 않고, 상기 삽입부 형성시에도 도전패턴에 생긴 균열의 진행방지를 위한 금속용융막이 형성되어 있으므로 도전패턴에 생긴 균열에 의한 접촉불량이나 단선이 없어지며, 전기 회로기판의 신뢰성이 향상된다.The present invention does not form an insulating protective film on the surface of the conductive pattern close to the insertion portion such as a hole or cutout provided to insert the insertion end of the electronic portion in the conductive pattern. Since a molten metal film is formed to prevent the progress of cracks, there is no contact failure or disconnection due to cracks in the conductive pattern, and the reliability of the electric circuit board is improved.
Claims (1)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58-126185 | 1983-08-16 | ||
| JP1983126185U JPS6035567U (en) | 1983-08-16 | 1983-08-16 | electrical circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| KR850009734U KR850009734U (en) | 1985-12-05 |
| KR890000184Y1 true KR890000184Y1 (en) | 1989-03-06 |
Family
ID=30287019
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| KR2019840005996U KR890000184Y1 (en) | 1983-08-16 | 1984-06-25 | Electric circuit plate |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JPS6035567U (en) |
| KR (1) | KR890000184Y1 (en) |
-
1983
- 1983-08-16 JP JP1983126185U patent/JPS6035567U/en active Pending
-
1984
- 1984-06-25 KR KR2019840005996U patent/KR890000184Y1/en not_active IP Right Cessation
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6035567U (en) | 1985-03-11 |
| KR850009734U (en) | 1985-12-05 |
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