KR20220046533A - Method of sensitivity time control - Google Patents

Abstract

The present invention relates to a reception sensitivity time control method and, more specifically, to a reception sensitivity time control method capable of distributing reception control to an RF terminal and an IF terminal considering a dynamic range of a reception terminal to maximally secure a dynamic range from a maximum linear input signal up to a minimum identification signal, thereby improving reception sensitivity performance. In accordance with the present invention, the reception sensitivity time control method includes: an STC phase value setting step of setting an STC phase value for each distance section composed of a set of predetermined distance bins by applying a maximum value among attenuation values calculated in accordance with a procedure of calculating an estimated clutter-to-noise ratio (CNR) employing a jamming detection algorithm (JDA), and a procedure of reducing a gain attenuation by a distance index increase by distance bin; a mode step of converting the STC phase value for each distance section into a mode such that the STC phase value can increase; an attenuating step of including a procedure of enabling a transmission/reception shearing machine to primarily attenuate a received signal due to the mode-converted STC phase value, and a procedure of enabling a frequency downconverter to secondarily attenuate the signal; and a compensation step of compensating for the magnitude of the attenuated signal.

Description

Receive sensitivity time control method {METHOD OF SENSITIVITY TIME CONTROL}

The present invention relates to a method for controlling a reception sensitivity time, and more particularly, by distributing reception control to an RF terminal and an IF terminal in consideration of the dynamic range of the reception terminal, the dynamic range from the maximum linear input signal to the minimum identification signal is secured to the maximum. Accordingly, the present invention relates to a method for controlling the reception sensitivity time in which the reception sensitivity performance is improved.

Radar, an abbreviation of Radio Detection And Ranging, is a detection system that measures the distance of an object by emitting radio waves, hitting and reflecting off an object, and analyzing the received radio waves. The radar is composed of various types depending on the purpose of operation, and the coast surveillance radar is installed on the coast and on ships (ships), etc.

Since radar basically detects and displays the signal reflected by the transmitted wave as a target, the received signal is received whether it is a target signal to be detected or unwanted clutter.

Among the received signals, if the size of the reflected signal from the surface, terrain, structure, and shore clutter in the vicinity is quite large and exceeds the input level of the received power, the receiver is saturated and it is difficult to detect the desired target in the short distance or severely In this case, the receiver may be damaged.

In order to solve this problem, the function of controlling the reception gain by distance by attenuating the reception gain at a short distance and reducing or not applying the gain attenuation as the distance increases is called Sensitivity Time Control (STC). ) is called

Compared to the existing low-cost magnetron-type radar, the method of amplifying the transmit signal output by applying a semiconductor power amplifier (Solid State Power Amplifier, SSPA) includes the phase signal in the transmit signal, so that the received signal is not only the direction, distance, but also speed. Information can also be extracted. This type of coherent pulse Doppler radar (Coherent Pulse Doppler Radar) is applied with various signal processing technologies, and by applying linear frequency modulation (LFM)-based pulse expansion and pulse compression technology, the distance resolution ability is higher than that of existing radars. is improved

The basic purpose of STC is to prevent saturation of the receiver and to reduce the size of clutter occurring in a short distance to obtain desired target information. STC varies the gain of the receiver with time. In radar systems, in general, large ground (or sea level) clutter occurs at a short distance, so the received signal level reflected by the clutter in the short distance is reduced (maximizing the attenuation), and the effect of the clutter is relatively small at a long distance. to minimize

The amount of STC attenuation varies depending on the radar operating environment. Basically, the magnitude of the reflected signal in radar is attenuated with time by 1/R4 in inverse proportion to the fourth power of the distance. However, in an environment with a lot of area clutter such as the ground, 1/R3 type is applied, and in an environment with a lot of volume clutter such as rain and clouds, 1/R2 type is applied.

It is desirable to adjust the attenuation amount of STC to the maximum possible in consideration of the case where the clutter value is large within the dynamic range where the linearity of the receiver is secured, and to selectively apply various attenuation amounts. However, the dynamic range between the maximum linear signal input level that ensures linearity and the minimum detection signal (MDS) varies according to the budget for each receiver stage, and the STC attenuation amount must be determined in the non-saturated range. .

In general, a pulse Doppler radar receiver down-converts an RF signal of a GHz band to generate an intermediate frequency (IF) of a MHz band, converts an analog signal into a digital signal (Analog to Digital Conversion, ADC), and then in a signal processor After signal processing, the receiving signal including the target signal is sent to the display and displayed.

In the conventional case, if 60dB gain attenuation is performed in the transceiver frequency downconverter, when the maximum input level is received, the attenuator must be applied as saturation occurs exceeding P1dB at the beginning of the input stage on the budget. In addition, this attenuator is not a voltage variable attenuator (VVA) for STC control, but is for attenuation for high linear input levels. Separately, an AMP with a gain of 20dB or more to meet the signal processor input dynamic range and 30dB variable VVA for STC 60dB adjustment By adding , in the end, 2 VVA and 1 AMP have to be added, so it corresponds to a structure that is economically and performanceally inefficient.

It is an object of the present invention to provide an STC method with improved reception sensitivity according to dynamic range expansion by maximally securing the STC adjustment range on the reception budget by separately applying the RF stage and the IF stage STC.

In addition, by implementing the STC function that combines the estimated CNR (Clutter to Noise Ratio) function applied with the jamming detection algorithm and the modulated 1/R4 standard attenuation function, the STC method with improved clutter removal ability in the operating environment. The purpose.

In addition, the purpose of compensating for reception signal distortion is to restore the received signal amplitude in a short distance by applying inverse STC.

In the reception sensitivity time control method according to the present invention, gain attenuation is reduced by 1/R4 according to a process of obtaining an estimated Clutter to Noise Ratio (CNR) to which a jamming detection algorithm (JDA) is applied and an increase in the distance index in units of distance bins. The STC step value setting step of setting the STC step value for each distance section composed of a set of predetermined distance bins by applying the maximum value among the attenuation values calculated according to the reduction process, and the mode to increase the STC step value for each distance section Including a modeizing step of converting the signal into a mode, and a first attenuation step in which the received signal is primarily attenuated in the transceiver shear by the modulated STC step value, and a second attenuation step in which the received signal is secondarily attenuated in a frequency downconverter. It includes an attenuation step for performing the following steps, and a compensation step for compensating for the amplitude of the attenuated signal.

In addition, by using UDP/IP in the control block of FPGA (Field Programmable Gate Array) in the digital conversion module of the signal processor, the STC step value is provided to the UDP-232 communication converter of the transceiver's transceiver controller to convert UDP/IP communication to RS232 communication. Converts and transmits to the FPGA of the transceiver controller, converts RS232 communication to SPI communication in the FPGA of the transceiver controller and transmits it to the waveform generator through the signal processor, and when the waveform generator receives the STC step value mode information, the digital profile information for each mode stored in the FPGA of the waveform generator is transmitted to the DAC at a time adjusted to the timing signal, and the The DAC converts the digital profile information for each mode into an analog value, then converts it to an appropriate voltage level for supply in the OP-AMP and transmits DC power DAC data #1 for each gain, which is attenuated by 1 ~ 30dB for each mode, to the reception limiter of the transceiver shear DC power DAC data #2 for each gain, which is attenuated by 30 ~ 60dB for each mode, is supplied to the voltage variable attenuator of the frequency down converter.

In addition, the STC mode consists of 15 modes, the distance index consists of 1 to 17,828, and the distance index interval consists of 40.816 ns.

In addition, the compensation step includes a pre-processing process of pre-processing the received attenuated signal, and the control block of the digital conversion module of the signal processor adjusts the STC attenuated received signal according to the timing signal. It is characterized by providing inverse STC data.

The positive effects of the method according to the invention are as follows.

Considering the dynamic range of the receiving end, if the moded STC step value is selected by distributing the receive control to the RF and IF stages, attenuation is applied at the transceiver front end up to 1 ~ 30 dB, and additional attenuation corresponding to 31 ~ 60 dB is frequency down It has the advantage of being able to improve the reception sensitivity performance of the receiver and use it for coherent pulse Doppler radar by maximizing the STC adjustment range by performing it in the converter.

In addition, by combining the estimated CNR applied with the jamming detection algorithm and the modulated 1/R4 reference attenuation function, it has the advantage of improving the ability to remove clutter in the operating environment.

It has the advantage that it can be displayed based on an accurate signal by compensating for the distortion of the received signal by restoring the magnitude of the received signal in the short distance by applying the inverse STC.

1 is a diagram showing a system configuration diagram of a pulse compression radar.
2 is a graph showing a typical STC curve.
3 is a block diagram schematically showing the functions of the STC in time series.
4 is a performance graph of a jamming detection algorithm.
5 is a diagram illustrating an execution schedule of 1/R4 attenuation values for each distance index.
6 is a diagram illustrating an STC process inside a transceiver.
7 is a view showing the measurement result of the reception limiter STC test.
8 is a diagram illustrating a receiving end Power Budget.
9 is a view showing measurement results for STC attenuation values for each mode.
10 is a diagram schematically illustrating an STC process inside a signal processor;
11 is a view showing a display screen to which STC according to Mode 0, Mode 5, Mode 10, and Mode 15 is applied.

Since the present invention can have various changes and can have various forms, implementation examples (態樣, aspects) (or embodiments) will be described in detail in the text. However, this is not intended to limit the present invention to the specific disclosed form, it should be understood to include all modifications, equivalents and substitutes included in the spirit and scope of the present invention.

The terminology used herein is only used to describe a specific embodiment (aspect, aspect, aspect) (or embodiment), and is not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as comprises or consists of are intended to designate that the features, numbers, steps, operations, components, parts, or combinations thereof described in the specification exist, but one or more other features It is to be understood that it does not preclude the possibility of the presence or addition of numbers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

The ~1~, ~2~, etc. described in the present specification are only to be referred to to distinguish that they are different components, and are not limited to the order of manufacture, and their names in the detailed description and claims of the invention are may not match.

The present invention relates to a method for controlling a reception sensitivity time, and more particularly, by distributing reception control to an RF terminal and an IF terminal in consideration of the dynamic range of the reception terminal, the dynamic range from the maximum linear input signal to the minimum identification signal is secured to the maximum. By doing so, it relates to a method for controlling the reception sensitivity time in which the reception sensitivity performance is improved.

In addition, the present invention is to introduce a reception sensitivity time control function that prevents the receiver from being saturated due to a large clutter signal being input in a short distance while maintaining the long-distance detection performance of the pulse Doppler radar for coastal surveillance and ships.

As described above, the general STC method includes a method of attenuating an RF signal and a method of attenuating an IF signal in a receiver frequency downconverter. In the present invention, an appropriate reception signal gain attenuation is applied in the RF signal reception section and the IF signal reception section. This improves the reception sensitivity performance by maximizing the dynamic range from the maximum linear input signal to the minimum identification signal.

In addition, the signal processor of the pulse Doppler radar performs an inverse STC function to compensate the gain attenuated by the STC application of the previous stage to restore the original target signal level. Here, the original target signal means a target signal to which STC is not applied.

과 산출된 추정 CNR(Clutter to Noise Ratio)의 최대값을 조합하여 감쇄한다. The STC function, which controls the reception gain for each time unit distance by decreasing or not applying the reception gain at a short distance and decreasing as the distance increases, is inversely proportional to the fourth power of the distance.

It is attenuated by combining the calculated maximum value of the estimated Clutter to Noise Ratio (CNR).

In the radar system according to the present invention, by distributing the reception control to the RF and IF stages in consideration of the dynamic range of the receiving end, it is possible to designly adjust up to 70 dB, but in consideration of system operability, the STC step value is applied up to 60 dB. If the moded STC step value is selected, attenuation is applied at the transceiver front end up to 1 ~ 30dB, and additional attenuation corresponding to 31 ~ 60dB is performed at the frequency downconverter. After the attenuated signal is pre-processed in the signal processor, inverse STC is performed to compensate for the magnitude of the attenuated target signal.

When the STC control command is selected on the display, the transceiver applies the pre-stored control voltage for each STC profile according to the STC step value to the reception limiter of the transceiver and the voltage variable attenuator of the transceiver frequency down converter at the time when the timing signal is adjusted according to the timing signal. send.

In this way, the received signal to which STC is applied is received by a signal processor, and ADC (Analog to Digital Conversion) that converts an analog IF signal into a digital signal is processed, and I and Q signals are generated by a phase shift through frequency shift. DDC (Digital Down Converter) is performed for downsampling by decimation processing by generating a baseband signal. The control block compensates the attenuated reception signal by providing an inverse STC data profile that compensates the amplitude of the signal attenuated by the STC by synchronizing the timing to be applied to the reception signal applied with STC.

After performing subsequent signal processing, the corresponding signal is transmitted to the display through the network switch, and the target and clutter data are displayed on the screen. As shown in FIG. 3 , it is possible to check the STC function flow chart.

By sending the STC step value received through the display to the FPGA of the waveform generator in the transceiver, the STC profile data of the transceiver and the transceiver are extracted. When the attenuation timing arrives through the timing signal generated inside the waveform generator, the primary signal attenuation voltage (DAC data#1) is sent to the reception limiter of the transceiver according to the STC profile, and the secondary signal is attenuated to the transceiver frequency downshifter. Send the voltage (DAC data#2).

감쇄값과 추정 CNR(Clutter to Noise Ratio)에 근거한 사전산출 값 2가지의 STC 기능 중 최댓값을 적용하여 설정한다.The profile for the STC step value changes according to the increase of the distance index in the distance bin unit.

It is set by applying the maximum value among the two STC functions, a pre-calculated value based on the attenuation value and the estimated Clutter to Noise Ratio (CNR).

The graph of FIG. 4 is a graph showing the correlation between the detection probability and the CNR value according to the change in the number of azimuth bins.

감쇄값 중 최대값을 조합한 단계별 프로파일을 설정하였다.Njaz is the number of azimuth bins in which jamming is detected among all azimuth bins, and it can be seen that as the ratio (%) of bins in which jamming is detected from 0 to Njaz increases, the Jamming to Noise Ratio (JNR) increases. Estimated CNR and distance index to which Jamming Detection Algorithm (JDA) is applied

A step-by-step profile combining the maximum values among the attenuation values was set.

The STC attenuation size is determined in units of distance bins. If a value is set in units of a range grid, the corresponding attenuation size is maintained until a new distance division arrives. Based on this reference, the mode standard of the STC step value is set.

For STC step value information, a total of 15 modes are applied from STC mode 1 to mode 15. In mode 0, STC is inactive, and STC mode 15 has the largest amount of attenuation by distance. Distance indexes exist from 1 to 17,828, and the index interval (distance bin in terms of distance) is 40.816 ns. The amount of attenuation (dB value) for each distance index for each STC mode is shown in the table below.

As shown in FIG. 6, UDP/IP communication is performed by providing STC step value (mode information) from the Control Block of the FPGA in the signal processor digital conversion module to the UDP-232 communication converter of the transceiver controller of the transceiver through UDP/IP. It is converted to RS232 communication and transmitted to the FPGA of the transceiver controller. The FPGA of the transceiver controller converts RS232 communication to SPI communication and sends it to the waveform generator.

And here, FPGA (Field Programmable Gate Array, Field Programmable Gate Array) refers to a semiconductor device including a designable logic device and a programmable internal circuit.

The FPGA of the waveform generator generates a timing signal that is the reference of the transmission/reception period and transmits it to the signal processor through the transmission/reception controller. When the FPGA of the waveform generator receives the STC step value mode information, it sends the digital profile information for each mode stored in the FPGA to the DAC (Digital to Analog Converter) at the time adjusted to the timing signal.

DAC converts digital profile information into analog value, then converts the appropriate voltage level for supply in OP-AMP (operational amplifier) and receives DC power DAC Data #1 for each gain attenuated by 1~30 dB for each mode. It is supplied to the limiter, and DC power DAC Data #2 for each gain, which is attenuated by 1 to 30 dB in the index section where attenuation of 30 dB or more and 60 dB or less is required for each mode, is supplied to the voltage variable attenuator of the frequency down converter.

Although the reception limiter of the transceiver shear can be attenuated up to 40dB in design, the attenuation control range is applied to 30dB from the operational point of view. 7 is an STC test measurement result of the reception limiter. It shows a linear attenuation pattern up to 40dB as an attenuation curve according to the voltage change for each frequency.

The structure of primary attenuation of the received signal in the reception limiter of the transceiver front end and the secondary attenuation in the transceiver frequency downconverter was applied in consideration of the expansion of the dynamic range to ensure the linearity of the receiving end.

If 60 dB gain attenuation is performed in the transceiver frequency downconverter, when the maximum input level is received, saturation occurs exceeding P1dB at the beginning of the input stage on the budget, and an attenuator must be applied. This attenuator is not a voltage variable attenuator (VVA) for STC, but is for high linear input level. By adding a dB variable VVA, you end up having to add 2 VVAs and 1 AMP.

Since this is not efficient from the standpoint of a frequency down converter, the method to secure the maximum reception linear input level and to have a dynamic range of 70 dB or more and to adjust more than 60 dB through STC is the primary STC control at the RF end of the reception limiter in the transceiver. , and secondary STC control is performed at the IF stage of the down-converter in the transceiver.

8, it can be known about the reception budget of the transceiver shear and the transceiver down-converter.

The maximum linear input level is -9 dBm in specifications, and the dynamic range is 70 dB or more. STC is 60 dB in design, but considering the minimum received signal (MDS), the STC attenuation value can be applied up to 45 dB.

The dynamic range including STC is 117 dB by design, but as a result of test measurement, the maximum linear input level can be raised by about 5 dB, so the practically operable dynamic range including STC is 122 dB.

Table 2 below shows the setting values for the attenuation voltage for each 1 dB unit of the transceiver shear (RFE) and the transceiver frequency down converter (DCA).

9 is a measurement result of the STC attenuation value for each designed STC step value.

The signal on the upper part of the oscilloscope is the TX_ON signal, which means the transmission period. The signal in the middle is the reception limiter output attenuation signal of the transmitter/receiver, and the signal at the bottom is the frequency downconverter output attenuation signal of the transceiver. In STC mode 5, the attenuation value does not exceed 30 dB, so no attenuation occurs in the frequency downconverter. In STC mode 10, there is a section where the attenuation is up to 59 dB, so the attenuation occurs. In STC mode 15, attenuation occurs up to 60 dB, and the attenuation amount and attenuation section are the largest.

10 is a block diagram of the STC process inside the signal processor.

The attenuated analog reception signal received from the transceiver performs preprocessing such as ADC and Digital Down Conversion (DDC) in the digital conversion module. STC step value received from the display and Inv. By matching the STC profile (inverse STC profile), the Inv. Provides STC Data.

Thereafter, the received signal subjected to post-processing such as pulse compression processing is provided to the signal processing module. The signal processing module displays the moving target through Doppler processing, CFAR, and MTI (Moving Target Indication). The information (target, clutter) generated by the signal processing target moves to the display through the network switch and is displayed on the electronic chart.

11 is a display screen for each STC step value. In the STC 0 mode, STC is not applied. STC 5 is partially attenuated only at close range, and some clutter has been removed from STC 0 in the right part where the radar is located. Compared to STC 5, in STC 10, attenuation occurred throughout the sea area in the center of the exhibition area, and in STC 15, the greatest attenuation occurred, confirming that clutter attenuation occurred even in the upper land portion.

In general, coastal surveillance radars or navigation radars receive a large amount of sea level or terrain reflection signals at a short distance, so the dynamic range of the receiving end is saturated, resulting in a problem in that the reception signal detection performance for a short-range target is deteriorated. For this reason, a Sensitivity Time Control function is required.

The proposed STC technology performs the primary STC control at the RF end of the transceiver, and the secondary STC control at the transceiver frequency down converter in consideration of securing the maximum linear input level, securing a wide dynamic range, and securing the STC attenuation range. is the structure By applying this design, a dynamic range of 117 dB was secured when the STC control was included.

This range is much wider than the dynamic range level of about 100 dB in normal similar radars, and it is similar to the high-power radar level with a high maximum linear input level. In addition, although it is sufficient for operation, the dynamic range can be extended to 132 dB by design when the RF stage additionally reflects the maximum linear input level of 5dB margin and 10 dB of the RF stage STC additionally measured at the RF stage. In addition, it compensates the attenuated target signal reception signal by applying Inverse STC compared to general magnetron radar.

In particular, such an STC design can be universally used for coherent pulse Doppler radar, and will greatly contribute to improving reception sensitivity performance.

The present invention described above with reference to the accompanying drawings is capable of various modifications and changes by those skilled in the art, and such modifications and changes should be construed as being included in the scope of the present invention.

Claims (3)

In the STC (Sensitivity Time Control) method of attenuating the reception gain at a short distance and controlling the reception gain by distance by reducing or not applying the gain attenuation as the distance increases,
According to the process of obtaining the estimated Clutter to Noise Ratio (CNR) applied with the Jamming Detection Algorithm (JDA) and the increase of the distance index in units of distance bins

an STC step value setting step of setting an STC step value for each distance segment composed of a set of predetermined distance bins by applying a maximum value among the attenuation values calculated according to the process of reducing the gain attenuation by the corresponding amount;
modding to increase the STC step value for each distance division;
an attenuation step comprising a first attenuation step in which a received signal is primarily attenuated in a transceiver shear by the moded STC step value and a second attenuation step in which a frequency downconverter is secondarily attenuated; and
a compensating step of compensating for the amplitude of the attenuated signal;
Reception sensitivity time control method comprising a.
The method according to claim 1,
By using UDP/IP in the control block of FPGA (Field Programmable Gate Array) in the digital conversion module of the signal processor, the STC step value is provided to the UDP-232 communication converter of the transceiver's transceiver controller to convert UDP/IP communication to RS232 communication. and transmit it to the FPGA of the transceiver controller,
In the FPGA of the transceiver controller, the RS232 communication is converted into SPI (Serial Peripheral Interface) communication and transmitted to a waveform generator,
The FPGA of the waveform generator generates a timing signal that is a reference of the transmission/reception period and transmits it to the signal processor through the transmission/reception controller,
When the waveform generator receives the STC step value mode information, the digital profile information for each mode stored in the FPGA of the waveform generator is transmitted to a DAC (Digital to Analog Converter) at a time point adjusted to the timing signal,
The DAC converts the digital profile information for each mode into an analog value, then converts it to an appropriate voltage level for supply in the OP-AMP and receives DC power DAC data #1 for each gain, which is attenuated by 1 to 30 dB for each mode. Receive sensitivity time control method, characterized in that it is supplied to the voltage variable attenuator of the device, and DC power DAC data #2 for each gain attenuated by 30 to 60 dB for each mode is supplied to the voltage variable attenuator of the frequency down converter.
The method according to claim 1,
The compensation step is
Including a pre-processing process of pre-processing the received attenuated signal, the control block of the digital conversion module of the signal processor provides inverse STC data at a time when the STC attenuation received signal is adjusted according to the timing signal. Receiving sensitivity time control method, characterized in that made.

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