KR20210084398A - Memristor devices and preparation method there of - Google Patents

Abstract

The present invention relates to a memristor device and to a manufacturing method thereof. The memristor device includes: a substrate; a first metal oxide thin film layer disposed on the substrate; a second metal oxide nanoparticle layer disposed on the first metal oxide thin film layer; and an electrode disposed on the second metal oxide nanoparticle layer.

Description

Memristor devices and preparation method thereof

The present invention relates to a memristor device and a method for manufacturing the same.

With the advent of computer science, attempts to connect brain information processing with computer science are based on the development of neuro-computing and hardware-based neural information processing and sensory-motor nervous system based on integrated circuit technology. The field of neuromorphic was born in 1990. Imitating the brain based on CMOS (Complementary Metal Oxide Semiconductor) has encountered the limit of integration, one of which is imitation of the synapse, a basic element of learning. In 2008, the neuromorphic field entered a second growth period after the analysis of a resistor-structured device capable of performing memory and switching at the same time. Synaptic mimics can not only replace conventional memory devices, but also have the potential to mimic the functions of brain cells only by hybrids with CMOS transistors or by combining them with CMOS transistors.

Memristor is a compound word of memory and resistor. The electrical resistance is not constant and the current or electric charge passing through the device is an integral value with respect to time, that is, a characteristic that depends on the history of the current passing through it. Eggplant represents a passive two-terminal electrical device and has memory and switching functions, so it is suitable for mimicking synapses and ion channels and has the advantage of mimicking neuronal cells.

Accordingly, the memristor is a device that enables the construction of new logic circuits such as terabit memory and defect recognition device by neural network circuit configuration. Research is being conducted in the field of next-generation memory based on nanotechnology. have.

As a related art, in Korean Patent Registration No. 10-1537433, a storage change memory device is formed through a spontaneous oxidation reaction that occurs between an insulating layer containing a polymer insulator and an upper electrode containing a metal, and a metal A memristor device in which a resistance change memory and a diode are integrated by forming a diode by disposing a metal layer in a partial region of a resistance change semiconductor layer including an oxide semiconductor, and a method for manufacturing the same have been disclosed.

Republic of Korea Patent No. 10-1537433

The object of the present invention is

To provide a memristor device and a method for manufacturing the same.

In order to achieve the above purpose,

One embodiment of the present invention is

Board;

a first metal oxide thin film layer disposed on the substrate;

a second metal oxide nanoparticle layer disposed on the first metal oxide thin film layer; and

Including; an electrode disposed on the second metal oxide nanoparticle layer;

A memristor device is provided.

In addition, another embodiment of the present invention is

forming an amorphous first metal oxide thin film layer on a substrate;

heat-treating the substrate on which the first metal oxide thin film layer is formed;

forming a crystalline second metal oxide nanoparticle layer on the first metal oxide thin film layer; and

Forming an electrode on the second metal oxide nanoparticle layer using a mask; including

A method of manufacturing a memristor device is provided.

A memristor device according to an embodiment of the present invention may have excellent resistance random access memory (RERAM) characteristics. In addition, it can be driven at a low voltage of 2 to 5V, and can exhibit excellent on/off switching characteristics, conductivity and storage capacity.

In addition, according to the present invention, a memristor device exhibiting excellent performance can be manufactured by an easier process using the gradient deposition method.

1 is a schematic diagram showing a memristor device according to an embodiment of the present invention;
2 is a schematic diagram showing a method of manufacturing a memristor device according to an embodiment of the present invention;
3 is a schematic diagram showing a gradient deposition apparatus according to an embodiment of the present invention;
4 is a scanning electron microscope (SEM) photograph observing the shape of a memristor device manufactured according to an embodiment of the present invention;
5 and 6 are energy dispersive X-ray analysis (EDXA) graphs obtained by elemental analysis of a memristor device manufactured according to an embodiment of the present invention;
7 is a graph showing the result of photoluminescence (PL) analysis of a memristor device manufactured according to an embodiment of the present invention;
8 is a graph showing the results of Raman analysis of a memristor device manufactured according to an embodiment of the present invention;
9 and 10 are graphs of the results of X-ray diffraction (XRD) analysis of a memristor device manufactured according to an embodiment of the present invention;
11 is a graph showing the current-voltage (Current-Voltage, IV) characteristics of a memristor device manufactured according to an embodiment of the present invention;
12 is a graph showing a change in current according to white light irradiation of a memristor device manufactured according to an embodiment of the present invention;
13 is a graph of measuring capacitance (CV) according to voltage using an LCR meter for a memristor device manufactured according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. However, the embodiment of the present invention may be modified in various other forms, and the scope of the present invention is not limited to the embodiments described below. In addition, the embodiments of the present invention are provided in order to more completely explain the present invention to those of ordinary skill in the art. Accordingly, the shapes and sizes of elements in the drawings may be exaggerated for clearer description, and elements indicated by the same reference numerals in the drawings are the same elements. In addition, the same reference numerals are used throughout the drawings for parts having similar functions and functions. In addition, "including" a certain element throughout the specification means that other elements may be further included, rather than excluding other elements, unless otherwise stated.

The memristor device 100 according to the embodiment of the present invention may include oxygen vacancies included in the interface between the first metal oxide thin film layer 120 and the second metal oxide nanoparticle layer 130 , which Through this, it is possible to switch the high resistance state (HRS) and the low resistance state (LRS) of the device, so that information writing and erasing functions can be performed.

1 is a schematic diagram showing a memristor device 100 according to an embodiment of the present invention.

The memristor device 100 according to the embodiment of the present invention is

substrate 110;

a first metal oxide thin film layer 120 disposed on the substrate 110;

a second metal oxide nanoparticle layer 130 disposed on the first metal oxide thin film layer 120; and

and an electrode 140 disposed on the second metal oxide nanoparticle layer 130 .

The substrate 110 of the present invention may be, for example, a Si substrate, or _{a SiO 2} /Si substrate _{in which SiO 2} is formed on the substrate.

The memristor 100 according to an embodiment of the present invention may further include a lower electrode disposed under the substrate 110 .

The memristor 100 according to an embodiment of the present invention may include a first metal oxide thin film layer 110 disposed on the substrate.

When a layer is referred to herein as being “on” another layer or substrate, it may be formed directly on the other layer or substrate, or a third layer may be interposed therebetween.

The first metal oxide may be at least one of MgO, ZnO, TiO2, NiO, SiO ₂ , Nb ₂ O ₅ , Al ₂ O ₃ and HfO ₂ , or a potential metal oxide, preferably titanium dioxide ( TiO ₂ ) may be.

In addition, it may be preferable that the first metal oxide is amorphous. This is to form insulation between the substrate and the electrode, and if the first metal oxide is crystalline, the on-off characteristic of the device may not appear.

The thickness of the first metal oxide thin film layer 110 may be 10 to 80 nm, preferably 20 to 60 nm, and more preferably 30 to 50 nm.

If the thickness of the first metal oxide thin film layer 110 is less than 10 nm, a problem in that electrical insulation is not formed by the first metal oxide thin film layer may occur, and the first metal oxide thin film layer 110 When the thickness of is greater than 80 nm, a problem in that the thickness of the device to be manufactured becomes thick may occur.

The memristor 100 according to an embodiment of the present invention may include a second metal oxide nanoparticle layer 130 disposed on the first metal oxide thin film layer 120 .

The second metal oxide may be at least one of MgO, ZnO, TiO ₂ , NiO, SiO ₂ , Nb ₂ O ₅ , Al ₂ O ₃ and HfO ₂ , or a transition metal oxide, preferably titanium dioxide. (TiO ₂ ) may be.

In addition, the second metal oxide nanoparticle layer is a layer including the second metal oxide nanoparticles, and preferably, may include crystalline second metal oxide nanoparticles having excellent electrical conductivity. For example, the second metal oxide nanoparticle layer may include brookite-phase titanium dioxide (TiO ₂ ) nanoparticles.

The memristor 100 according to an embodiment of the present invention includes a nanoparticle layer including crystalline second metal oxide nanoparticles on the first metal oxide thin film layer exhibiting insulation, so that the mobility of oxygen ions or oxygen vacancies is reduced. It may be faster, thereby exhibiting fast switching characteristics.

In addition, the first metal oxide layer and the second metal oxide nanoparticle layer of the memristor 100 according to the embodiment of the present invention may be layers composed of the same material but having different electrical properties due to different crystal properties and material shapes.

For example, the first metal oxide thin film layer may be an amorphous titanium dioxide thin film layer having insulation, and the second metal oxide nanoparticle layer may be a nanoparticle layer composed of crystalline titanium dioxide nanoparticles having excellent electrical conductivity.

The second metal oxide nanoparticle layer may include second metal oxide nanoparticles, and the diameter of the second metal oxide nanoparticles may be 5 to 30 nm, preferably 10 to 20 nm.

The memristor 100 according to an embodiment of the present invention may include oxygen vacancies at an interface between the metal oxide thin film layer and the metal oxide nanoparticle layer.

The oxygen vacancy may electrically connect the substrate and the electrode, and may perform a function of changing a resistance state of a device to exhibit switching characteristics. Accordingly, the first metal oxide thin film layer 120 and the second metal oxide nanoparticle layer 130 including oxygen vacancy may be a resistance change material layer.

In addition, the memristor 100 according to the embodiment of the present invention can exhibit excellent charge storage capacity by trapping electric charges at the interface between the metal oxide thin film layer and the metal oxide nanoparticle layer.

The memristor device 100 according to an embodiment of the present invention is a non-volatile memory device. When an electrical signal is applied, the memristor device 100 is in an OFF state in which conduction is not performed due to a large resistance, in an ON state in which conduction is possible due to a small resistance. A memory characteristic that changes to an (ON state), that is, a resistance random access memory (RERAM) characteristic, may appear, and information may be stored using the on/off state.

In addition, the memristor device 100 according to the embodiment of the present invention may be a voltage controlled negative differential resistance (Voltage Controlled Negative Differential Resistance) type RERAM that generates a resistance difference by controlling a voltage. Accordingly, the memristor device 100 according to the embodiment of the present invention may change from a large current state to a small current state as the voltage increases, and an ON/OFF memory using the resistance difference at this time. properties can be implemented.

Here, the voltage controlled negative differential resistance method may be a method of rapidly reducing a current according to a voltage.

The memristor device 100 according to the embodiment of the present invention is to be stably maintained in a high-resistance state (HRS) or a low-resistance state (LRS) even in a state in which external power is not supplied. can

In addition, it can be operated at a low voltage of 2 to 5V, so it can be used at low power.

The memristor device 100 according to the embodiment of the present invention may exhibit a switching characteristic in which electrical characteristics rapidly change from an 'OFF' state with a large resistance to an 'ON' state with a low resistance when a first voltage is applied. In this case, the first voltage may be referred to as a set voltage. Thereafter, the resistance may remain low until the second voltage, and the current may increase as the voltage increases. At the second voltage, a phenomenon in which the resistance rapidly increases, that is, a negative differential resistance phenomenon occurs. can The second voltage at this time may be referred to as a reset voltage. Thereafter, the resistance may be maintained in a large state until a predetermined voltage.

In this case, the set voltage may be 0 to 2V, and the reset voltage may be 5 to 10V.

In the memristor 100 according to an embodiment of the present invention, when a positive voltage is applied to the electrode 140 and a ground voltage is applied to the substrate 110 , a set process may be performed. In the set process, oxygen ions move in the direction of the electrode, and oxygen vacancies are formed in vacancies formed by the movement of the oxygen ions, so that a conductive path may be generated by oxygen vacancies. Accordingly, the device may be in an 'ON' state, which is a low resistance state.

On the other hand, when a negative voltage is applied to the electrode 140 and a ground voltage is applied to the substrate 110 , a reset process may be performed. In the reset process, oxygen vacancies are eliminated, and the conductive path generated in the set process may be eliminated. Accordingly, the device may be in the 'OFF' state, which is a high resistance state.

The memristor device 100 according to an embodiment of the present invention may change the resistance state of the device from an 'OFF' state to an 'ON' state by applying a voltage greater than or equal to a set voltage, and through this (Writing) function can be performed. In addition, by applying a voltage greater than or equal to the reset voltage, the resistance state of the device can be changed from the 'ON' state to the 'OFF' state, and an erasing function can be performed through work.

The electrode is silver (Ag), platinum (Pt), iridium (Ir), gold (Au), ruthenium (Ru), tungsten (W), titanium (Ti), nickel (Ni), hafnium (Hf), iridium oxide (IrO2), ruthenium oxide (RuO2), titanium nitride (TiN), and may be any one or more selected from tantalum nitride (TaN), it may be more preferable to use silver (Ag) which can be used at low cost.

A method of manufacturing a memristor device according to an embodiment of the present invention

forming a first metal oxide thin film layer on a substrate;

heat-treating the substrate on which the first metal oxide thin film layer is formed;

forming a crystalline second metal oxide nanoparticle layer on the first metal oxide thin film layer; and

It may include; forming an electrode on the second metal oxide nanoparticle layer using a mask.

2 is a schematic diagram showing a method of manufacturing a memristor device according to an embodiment of the present invention.

The method of manufacturing a memristor device according to an embodiment of the present invention can form a crystalline metal oxide nanoparticle layer with excellent conductivity by using a gradient deposition method of depositing at an inclination angle of less than 90°, resulting in faster switching speed and A memristor having excellent charge resistance can be easily manufactured at low cost.

Hereinafter, the manufacturing method of the memristor device of the present invention will be described in detail for each step.

The first metal oxide thin film layer may be formed by physical (Physical Vapor Deposition, PVD) or chemical vapor deposition (CVD), but is not limited thereto. Another method capable of manufacturing a thin film having a thickness of 100 nm or less can be formed with

The first metal oxide thin film layer is a layer including the amorphous first metal oxide, and may exhibit insulation.

The thickness of the first metal oxide thin film may be 10 to 80 nm, preferably 20 to 60 nm, and more preferably 30 to 50 nm.

If the thickness of the first metal oxide thin film layer 110 is less than 10 nm, a problem in that electrical insulation is not formed by the first metal oxide thin film layer may occur, and the first metal oxide thin film layer 110 When the thickness of is greater than 80 nm, a problem in that the thickness of the device to be manufactured becomes thick may occur.

The first metal oxide may be at least one of MgO, ZnO, TiO2, NiO, SiO ₂ , Nb ₂ O ₅ , Al ₂ O ₃ and HfO ₂ , or a transition metal oxide, preferably titanium dioxide ( TiO ₂ ) may be.

The heat treatment of the substrate on which the first metal oxide thin film layer is formed may include forming oxygen vacancies on the surface of the first metal oxide.

The heat treatment may be performed at a temperature of 500 to 1000 ℃.

If the heat treatment is performed at 500° C. or less, the degree of oxygen vacancy formation by the heat treatment may be insufficient, and when the heat treatment is performed at 1000° C. or higher, the degree of oxygen vacancy formation does not increase any more. Since it is performed at a high temperature, there may be a problem in that the efficiency of device manufacturing is lowered.

The forming of the second metal oxide nanoparticle layer on the first metal oxide thin film layer includes forming crystalline metal oxide nanoparticles on the first metal oxide thin film layer by using the glancing angle deposition technique (GLAD). It may be a step to

The method of manufacturing a memristor device according to an embodiment of the present invention can easily form crystalline second metal oxide nanoparticles using a gradient deposition apparatus, and through this, a memristor having excellent switching characteristics devices can be manufactured.

The second metal oxide nanoparticle layer may include crystalline second metal oxide nanoparticles. For example, the second metal oxide nanoparticle layer may include brookite-phase titanium dioxide nanoparticles.

3 is a schematic diagram showing an example of a gradient deposition apparatus.

The inclined deposition apparatus 200 may include a source portion 210 and a substrate holder 220 disposed at a predetermined distance from the source portion, and an inclination angle α of less than 90°. ) can have

In this case, the inclination angle α may be an angle formed by a straight line perpendicular to the source part and a straight line perpendicular to the substrate holder, and the substrate holder 220 may include a motor, and a rotating holder rotated by the motor. can be

The inclined deposition apparatus 200 may control the shape and crystallinity of the deposited material by adjusting the inclination angle or the rotation speed of the substrate holder.

A material to be deposited may be disposed in the source unit 210 , and a second metal oxide may be disposed in the source unit.

The second metal oxide may be at least one of MgO, ZnO, TiO2, NiO, SiO ₂ , Nb ₂ O ₅ , Al ₂ O ₃ and HfO ₂ , and may be a transition metal oxide, preferably, titanium dioxide ( TiO ₂ ) may be.

In the method of manufacturing a memristor device according to an embodiment of the present invention, the second inclination angle is 75 to 85°, and the rotation speed of the substrate or substrate holder is 300 to 500 rpm using the inclined deposition apparatus. It may include the step of depositing a metal oxide gradient on the first metal oxide thin film layer, through this, it is possible to form a nanoparticle layer including the crystalline second metal oxide nanoparticles.

The diameter of the second metal oxide nanoparticles may be 5 to 30 nm, preferably 10 to 20 nm.

The step of forming the electrode on the second metal oxide nanoparticle layer using the mask may be a step of forming a plurality of electrodes on the nanoparticle layer to be spaced apart from each other.

To this end, the mask may include a plurality of holes, and the holes may have a diameter of 1 to 3 mm.

For example, by disposing a mask including a plurality of holes on the second metal oxide nanoparticle layer and then depositing the electrodes using a deposition method, a plurality of electrodes spaced apart on the second metal oxide nanoparticle layer is formed. can be formed

Hereinafter, the present invention will be described in detail through Examples and Experimental Examples.

However, the following examples and experimental examples are merely illustrative of the present invention, and the content of the present invention is not limited by the following examples.

<Example 1> Preparation of memristor device (1)

Step 1: Using the RCA-1 standard cleaning process, the n-type Si substrate was cleaned. Thereafter, using an electron beam evaporator, a titanium dioxide (TiO ₂ ) thin film having a thickness of 40 nm was deposited.

Second step: The n-type Si substrate on which the titanium dioxide (TiO ₂ ) thin film was deposited was placed in a tube furnace, and heat-treated at 500° C. in an atmospheric atmosphere for 1 hour. At this time, the temperature increase and cooling rate were set to 4°C/min.

Step 3: Then, the source (source) unit; Using an inclined deposition apparatus comprising a; is positioned at a distance of 24 cm from the source in the vertical direction, and disposed to form an inclination angle of 85° with respect to the source and the vertical direction. A nanoparticle layer including titanium dioxide (TiO ₂ ) nanoparticles having a size of 15 nm was deposited on a titanium (TiO _{2 ) thin film.}

Specifically, the n-type Si substrate on which the titanium dioxide (TiO ₂ ) thin film was deposited was placed in the substrate holder and rotated at 460 rpm. Thereafter, after disposing a titanium dioxide (TiO ₂ ) source in the source portion, an electron beam (e-beam) is applied _{to the source to vaporize the titanium dioxide (TiO 2} ) source to evaporate the rotating titanium dioxide (TiO _{2 )} ) was deposited in the form of nanoparticles on the thin film. At this time, the deposition rate was 1.6 Å/s.

Step 4: Then, an aluminum (Al) mask including a plurality of holes having a diameter of 1.5 mm is formed on the nanoparticle layer, and silver (Ag) is formed using an electron beam evaporator. By vapor deposition, a silver (Ag) electrode was formed. In this case, the contact area of the silver (Ag) electrode was 1.77 x 10 ^-6 m ² .

<Experimental Example 1> Scanning electron microscope (SEM) observation and elemental analysis (EDXA)

In order to analyze the shape and element of the memristor device manufactured according to the embodiment of the present invention, the memristor device manufactured according to Example 1 was subjected to a field emission scanning electron microscope (Field Emission Gun-Scanning Electron Microscopes FEGSEM) and energy Analysis was performed using an Energy Dispersive X-ray Analysis (EDXA), and the results are shown in FIGS. 4 to 6 .

As shown in FIG. 4 , it was found that, by Example 1, a thin film layer with a thickness of about 40 nm was formed on an n-Si substrate, and a nanoparticle layer including nanoparticles having a size of about 15 nm was formed on the thin film. can

5 and 6, it can be seen that the thin film layer and the nanoparticle layer are composed of titanium (Ti) and oxygen (O) elements.

<Experimental Example 2> Photoluminescence (PL) and Raman analysis

In order to confirm the photoluminescence characteristics, crystal structure, and oxygen vacancies of the memristor device manufactured according to the embodiment of the present invention, the memristor device manufactured in Example 1 was analyzed using a photoluminescence (PL) analyzer. and a Raman analyzer using a 532 nm wavelength source, and the results are shown in FIGS. 7 and 8 .

7 is a titanium dioxide (TiO ₂ ) thin film layer (TiO ₂ TF) and titanium dioxide (TiO ₂ ) A graph showing the photoluminescence characteristics at room temperature for each of the nanoparticle layer (TiO _{2 NPs), the titanium dioxide (TiO 2} ) It can be seen that the photoluminescence intensity of the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO ₂ NPs) is significantly higher than the thin film layer (TiO _{2 TF).}

This is due to the generation of oxygen vacancies between the titanium dioxide (TiO ₂ ) thin film layer (TiO ₂ TF) and the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO _{2 NPs) by heat treatment.} That is, the oxygen vacancies are formed in titanium dioxide by radial recombination between electrons of conduction band minimum (CBM) and holes of valence band maximum (VBM). (TiO ₂ ) It can be seen that the thin film layer (TiO ₂ TF) and the titanium dioxide (TiO ₂ ) act as electron traps between the nanoparticle layer (TiO _{2 NPs).} The electron trap may improve the non-volatile storage of the memristor device.

8 is a Raman analysis result at room temperature for each of the titanium dioxide (TiO ₂ ) thin film layer (TiO ₂ TF) and the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO _{2 NPs), the titanium dioxide (TiO 2} ) thin film layer (TiO) ₂ TF) compared to titanium dioxide (TiO ₂ ) It can be seen that the strength of the nanoparticle layer (TiO _{2 NPs) is significantly higher.} Which the titanium dioxide by heat treatment (TiO ₂₎ the oxygen vacancy occurs on the thin film surface, and the titanium dioxide by the oxygen vacancy (TiO ₂₎ film layer (TiO ₂ TF) and titanium dioxide (TiO ₂₎ nanoparticle layer (TiO ₂ This may be because more defect traps occurred between the NPs).

In addition, the strength of the graph of the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO ₂ NPs) is increased compared to the titanium dioxide (TiO ₂ ) thin film layer (TiO ₂ TF), and the size of the full width at half maxima (FWHM) is small. It can be seen that the crystallinity is further improved, and the brookite phase is formed through the peaks of ^{462 cm -1} and 510 cm ^{-1 .}

<Experimental Example 3> X-ray-diffraction analysis

In order to confirm the crystal structure _{of the titanium dioxide (TiO 2} ) thin film layer (TiO ₂ TF) and the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO ₂ NPs) in the memristor device manufactured according to an embodiment of the present invention, Examples 1 was subjected to X-ray diffraction (XRD) analysis of the memristor device, and the results are shown in FIGS. 9 and 10 .

Figure 9 is the titanium dioxide (TiO ₂₎ thin film layer of titanium dioxide (TiO ₂₎ film layer (TiO ₂ TF) by X- ray diffraction analysis of the (TiO ₂ TF), with reference to FIG. 8 it can be seen that it does not have any particular peak , through which it can be seen that the titanium dioxide (TiO ₂ ) thin film layer (TiO _{2 TF) is amorphous.}

10 is titanium dioxide (TiO ₂₎ nanoparticle layer (TiO ₂ NPs) X- ray diffraction analysis as a result, the titanium dioxide (TiO ₂₎ nanoparticle layer (TiO ₂ NPs) through 10 of the titanium dioxide brookite phase (brookite phase), it can be seen that the peak B (610) appears, and through this, it can be seen that the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO ₂ NPs) is crystalline.

Through this, it can be seen that _{crystalline titanium dioxide (TiO 2} ) nanoparticles are formed when deposition is performed using a gradient deposition method (GLAD) at an inclination angle of 85° and a rotation speed of 460 rpm.

<Experimental Example 4> Current-Voltage (I-V) characteristic evaluation

In order to confirm the current-voltage (Current-Voltage, IV) relationship of the memristor device of the present invention, the memristor device manufactured in Example 1 was swept over a predetermined voltage range to respond to the voltage change. The current value was measured accordingly, and the results are shown in FIG. 11 .

11, the memristor device manufactured according to Example 1 has a high-resistance state (HRS) or a low-resistance state (LRS) even when external power is not supplied. It can be seen that it remains stable.

Initially, a large amount of oxygen vacancies formed by heat treatment may exist between the titanium dioxide (TiO ₂ ) thin film layer (TiO ₂ TF) and the titanium dioxide (TiO ₂ ) nanoparticle layer (TiO ₂ NPs).

When the voltage changes from (-) voltage to (+) voltage, the current rapidly increases about 3 times or more around 0.2V, which is low in the OFF state where the electrical resistance state is a high-resistance state (HRS). It represents a change to the On state, which is a low-resistance state (LRS). Here, 0.2V can be viewed as a set voltage.

As a result of increasing the voltage to 0.2V or more, a low-resistance state (LRS) and an On-state state in which the current increases as the voltage increases until the applied voltage becomes 5.07V were maintained. Thereafter, when the voltage reaches 5.07V, it can be seen that the current rapidly decreases and the resistance increases, indicating a negative differential resistance (NDR) behavior. In this case, 5.07 may be regarded as a reset voltage.

In addition, in the region where the voltage exceeds 5.07V, the current continuously appeared in the OFF state. While the voltage returned to 0.2V, the resistance showed an intermediate resistance state, and at 2V, a high resistance state of 5 x 104 Ω was reached.

When measuring the I-V characteristics, the device exhibits most of the same current curve as that of the first loop, which can be seen as exhibiting a rewritable memory effect.

Accordingly, the device can set the voltage from the OFF state to the ON state by applying a slightly higher voltage from the set voltage, and writes through this, and sets the voltage to a negative differential resistor ( By applying a voltage exceeding the NDR region, it can be reset from the ON state to the OFF state, and an erasing function can be performed through this.

<Experimental Example 5> Storage characteristics evaluation

In order to confirm the storage capacity of the memristor device according to an embodiment of the present invention, the following experiment was performed, and the results are shown in FIG. 12 .

In a state where -2V was applied to the silver electrode of the memristor device manufactured according to Example 1, white light was turned on/off at intervals of 30 seconds. At this time, the rise time (rise time, Tr) was received as 2.5 seconds, and the fall time (fall time, Tf) was received as 3 seconds.

As shown in FIG. 12, as a result of the measurement, the longer decay time is dominated by the lifetime of the excess carriers, which causes various trapping states due to defects or oxygen vacancies in 15 nm-sized nanoparticles included in the nanoparticle layer. This may be because it occurs Through the above results, it can be seen that the memristor device according to the embodiment of the present invention exhibits more improved storage characteristics.

<Experimental Example 5> C-V (Capacitacnce-Voltage) hysteresis characteristic evaluation

In order to confirm the CV hysteresis characteristics of the memristor device according to an embodiment of the present invention, for the memristor device manufactured in Example 1, using an Agilent E4980A LCR meter, frequencies of 100 MHz and 1 MHz For each (frequency), at room temperature, capacitance according to a gate voltage of -10V to 10V was measured, and the results are shown in FIG. 13 .

As shown in FIG. 13 , the memristor device manufactured according to Example 1 exhibited hysteresis behavior according to voltage change.

^{Capacitance values were 26x10 -11} F and 6.17x10 ^-11 F at 100 MHz and 1 MHz, respectively, indicating that charges were trapped at the interface between the titanium dioxide thin film layer and the titanium dioxide nanoparticle layer of the memristor device, resulting in excellent charge storage ability. can be seen to have appeared.

100: memristor
110: substrate
120: thin film layer
130: nanoparticle layer
140: electrode
200: gradient deposition device
210: source unit
220: substrate holder

Claims (10)

Board;
a first metal oxide thin film layer having a thickness of 10 to 80 nm disposed on the substrate;
a second metal oxide nanoparticle layer disposed on the first metal oxide thin film layer;
an electrode disposed on the second metal oxide nanoparticle layer; and
Oxygen vacancies formed at the interface between the first metal oxide thin film layer and the second metal oxide nanoparticle layer,
Memristor device.
According to claim 1,
The first metal oxide thin film layer is amorphous,
Memristor device.
According to claim 1,
The second metal oxide nanoparticle layer is crystalline,
Memristor device.
According to claim 1,
The first metal oxide is titanium dioxide (TiO ₂ ),
Memristor device.
According to claim 1,
The second metal oxide is titanium dioxide (TiO ₂ ),
Memristor device.
According to claim 1,
The electrode is a silver (Ag) electrode,
Memristor device.
forming an amorphous first metal oxide thin film layer on a substrate;
heat-treating the substrate on which the first metal oxide thin film layer is formed;
forming a crystalline second metal oxide nanoparticle layer on the first metal oxide thin film layer; and
Forming an electrode on the second metal oxide nanoparticle layer using a mask; including
A method of manufacturing a memristor device.
8. The method of claim 7,
The crystalline second metal oxide nanoparticle layer is characterized in that it is formed using a glancing angle deposition technique (GLAD)
A method of manufacturing a memristor device.
8. The method of claim 7,
The method of manufacturing the memristor device is characterized in that oxygen vacancies are formed on the first metal oxide thin film layer through the heat treatment.
A method of manufacturing a memristor device.
8. The method of claim 7,
The heat treatment is characterized in that performed at a temperature of 500 to 1000 ℃
A method of manufacturing a memristor device.

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