KR20180119763A - Semiconductor chip package having improved heating structure - Google Patents
Semiconductor chip package having improved heating structure Download PDFInfo
- Publication number
- KR20180119763A KR20180119763A KR1020170053309A KR20170053309A KR20180119763A KR 20180119763 A KR20180119763 A KR 20180119763A KR 1020170053309 A KR1020170053309 A KR 1020170053309A KR 20170053309 A KR20170053309 A KR 20170053309A KR 20180119763 A KR20180119763 A KR 20180119763A
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- lead frame
- terminal
- package body
- package
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
- H01L23/3672—Foil-like cooling fins or heat sinks
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/40—Mountings or securing means for detachable cooling or heating arrangements ; fixed by friction, plugs or springs
- H01L23/4093—Snap-on arrangements, e.g. clips
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/71—Means for bonding not being attached to, or not being formed on, the surface to be connected
- H01L24/72—Detachable connecting means consisting of mechanical auxiliary parts connecting the device, e.g. pressure contacts using springs or clips
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16245—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
- H01L2924/1815—Shape
- H01L2924/1816—Exposing the passive side of the semiconductor or solid-state body
- H01L2924/18161—Exposing the passive side of the semiconductor or solid-state body of a flip chip
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
The present invention relates to a semiconductor package having an improved heat dissipation structure, and more particularly, to a semiconductor package having an improved heat dissipation structure, more specifically, The present invention relates to a semiconductor package for solving various problems in connection with a chip to form a lead frame.
That is, according to the present invention, there is provided a semiconductor device comprising: a semiconductor chip having a bottom surface on which a plurality of terminals are protruded on the upper side and a terminal on the opposite side is formed; a lead frame directly connected to the terminals of the semiconductor chip; And a bottom surface of the semiconductor chip is exposed to the outside, wherein a terminal of the semiconductor chip is formed in a package body, The bottom surface of the semiconductor chip is exposed in the upper direction of the package body by connecting the terminal and the lead frame.
Description
The present invention relates to a semiconductor package having an improved heat dissipation structure, and more particularly, to a semiconductor package having an improved heat dissipation structure, more specifically, The present invention relates to a semiconductor package for solving various problems in connection with a chip to form a lead frame.
Generally, a semiconductor package is formed by mounting a semiconductor chip on a substrate and molding the package body with a thermosetting material such as EMC (Epoxy molding compound) on a single module having a structure in which a semiconductor chip and a lead frame are connected with a clip or a bonding wire .
In this semiconductor package, the heat generated from the semiconductor chip mounted inside the body is combined with a separate heat slug to dissipate heat. However, since the heat dissipation amount of the highly integrated semiconductor package is large, Can not expect
Below is a look at some of the prior art techniques to improve heat dissipation.
(1) A semiconductor chip having a bonding pad, a pattern lead connected to the bonding pad by a wire, and a semiconductor chip mounted on the semiconductor chip, A package body encapsulating the semiconductor chip, the wire, and the pattern lead, the package body being formed by exposing a lower portion of the semiconductor chip and a lower portion of the pattern lead to the outside.
In the prior art, since the semiconductor chip and the pattern lead are connected to each other by wires, the heat dissipation is not easy. That is, since the wire is attached by bonding, and only the electrical signal is transmitted, heat is not transferred to the pattern through the wire, so that it is difficult to expect high heat emission.
(2) A heat dissipation resin layer and a first heat dissipation resin layer applied between the semiconductor chip and the film and a coating film of a COF type semiconductor chip package having a heat dissipation structure are coated on the side surface of the semiconductor chip, And a second heat radiating resin layer coated on the upper surface of the semiconductor chip so as to be exposed to the outside.
In the prior art, since the semiconductor chip is placed on the film and connected to the electrode pattern by the bumps, the heat generated in the semiconductor chip is discharged only to the exposed upper portion, There is no package body to protect the semiconductor chip and the respective components, so that the connection by the lead frame or the wire is difficult and the structure is easily damaged by vibration or impact.
(3) In Japanese Patent Application Laid-Open No. 10-2005-0051806 (semiconductor package), a semiconductor chip, a bonding pad for electrical connection with the semiconductor chip is provided on an insulating material, and a solder ball for electrical connection to the outside is provided on the bottom surface of the insulating material A bonding wire for electrically connecting the semiconductor chip and the bonding pad, a sealing material for sealing the semiconductor chip, and a heat dissipating film interposed between the insulating material and the semiconductor chip.
The prior art also has a structure in which a semiconductor chip is mounted on a substrate. The bonding pads provided on the substrate and the semiconductor chip are connected to each other by wires. The wires are attached by bonding, and only an electrical signal is transmitted. High heat dissipation is difficult to expect because it is not a heat transfer configuration.
Therefore, in order to solve such a problem, Japanese Patent No. 1694657 (a semiconductor package having a heat dissipation structure) filed and registered by the inventor of the present invention is characterized in that a lead frame is directly connected to a terminal of a semiconductor chip located at an upper portion, Discloses a technique for exposing the bottom of the body to easily discharge the heat of the semiconductor chip located inside the package body to the outside.
However, the above-described technology has a limitation in heat emission because the heat is emitted in a direction in which the heat generated from the semiconductor chip is connected to the PCB substrate (downward direction of the package), and the lead frame has a terminal It is necessary to bend the lead frame several times according to various design arrangements among the internal structures. Therefore, the present invention is intended to prevent such problems from occurring.
SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and it is an object of the present invention to provide a semiconductor device and a manufacturing method thereof, The present invention is directed to a semiconductor package that can solve various problems associated with forming a lead frame by connecting to a semiconductor chip.
According to the present invention, there is provided a semiconductor device comprising: a semiconductor chip having a plurality of terminals protruded from an upper portion thereof and a bottom surface having no terminal formed on the opposite side thereof; a lead frame connected directly to the terminals of the semiconductor chip; And the package body is formed in an incision so that the bottom surface of the semiconductor chip can be exposed to the outside, and the terminal of the semiconductor chip is connected to the lower portion of the package body So that the bottom surface of the semiconductor chip can be exposed in the upper direction of the package body by connecting the terminal and the lead frame.
The lead frame may be formed in a non-bent state so that the terminals of the semiconductor chip can be directly connected to the upper surface of the lead frame so as to be connected to each other.
In addition, the exposed surface of the semiconductor chip is disposed at a position spaced apart from the upper surface of the package body by a lower height, and a cut-off hole is formed to a spaced position so that the exposed surface of the semiconductor chip is exposed to the outside by the cut- .
In addition, a conductive or nonconductive filler is further filled in the incising hole, and heat is released by the filler.
The filling material may be made of a nonconductive material including at least one of silica (SIO2), alumina (Al2O3) and aluminum nitride (AlN), or a metal powder containing at least one of silver (Ag) And is made of a conductive material included therein.
A lead frame connected to the terminals of the semiconductor chip; and a plurality of leads arranged between the semiconductor chip and the lead frame, A lead frame and a lead frame, and a lead frame, a lead frame, and a lead frame, and a lead frame and a lead frame, wherein the lead frame and the lead frame are integrally formed. And the bottom surface of the semiconductor chip is connected to the lead frame in a state that the terminal of the semiconductor chip is inverted so that the terminal of the semiconductor chip is in the bottom of the package body, So that it can be exposed.
The lead frame may be formed in a non-bent state, but may be disposed at a lower position than the terminal position of the semiconductor chip, and the clip members connected to the lead frame may be bent upward to be connected to the terminals. .
The present invention has a structure in which one surface of a semiconductor chip is exposed to the outside of a package body to facilitate heat dissipation, thereby preventing overheating of the semiconductor chip.
In addition, since the exposed portion of the semiconductor chip is exposed to the upper portion (the direction facing the PCB substrate), the semiconductor chip package has an advantage over the conventional semiconductor package technology in terms of heat dissipation conditions.
Further, since the lead frame according to the present invention has a simplified shape that is not subjected to a bending process so as to be connected to a terminal, the lead frame can more easily dissipate heat, the lead frame becomes a solid form, And it is possible to increase the productivity such as cost reduction due to manpower and mechanical equipment according to the design of the lead frame.
1 is a perspective view showing a semiconductor package of the present invention;
2 is a cross-sectional view showing the internal structure of the semiconductor package according to the present invention
3 is a view showing an embodiment in which a cut-out hole is formed in the package body of the present invention and a filler is filled in the package body.
4 is a cross-sectional view showing another embodiment of the clip package according to the present invention,
5 is a cross-sectional view showing the internal configuration of the embodiment of Fig. 4
Fig. 6 is an exploded perspective view showing the internal configuration of the embodiment of Fig.
FIGS. 7 to 8 are views showing an example in which the heat emitting direction of the semiconductor chip is differently applied in the embodiment in which the clip member of the present invention is further constructed
Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description of the present invention, detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.
1 and 2 show an embodiment of a semiconductor package according to the present invention in which a plurality of
The semiconductor package having the improved heat dissipation structure of the present invention exposes the
A plurality of
The
As shown in the figure, the
Since the
3, the exposed surface of the
Preferable examples of the
4 to 6 show another embodiment of the present invention in which a plurality of
The
The
The embodiment using the
Also in the embodiment using the
While the present invention has been described with reference to the exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments.
10: semiconductor chip 11: terminal
12: bottom surface (exposed surface) 20: lead frame
30: package body 31: incision hole
40: filling material 50: clip member
Claims (7)
A lead frame 20 directly connected to the terminal 11 of the semiconductor chip 10,
A package body (30) for protecting the semiconductor chip (10) and the lead frame (20) and forming an outer shape is formed by molding,
A portion of the package body 30 is formed in an incised shape so that the bottom surface 12 of the semiconductor chip 10 can be exposed to the outside while the terminal 11 of the semiconductor chip 10 is exposed to the outside of the package body The bottom surface 12 of the semiconductor chip 10 can be exposed in the upper direction of the package body 30 by connecting the terminal 11 and the lead frame 20 in an inverted state so as to come to the bottom of the package body 30 A semiconductor package having an improved heat dissipation structure
The lead frame 20 is formed in an unfolded shape and can be connected to one another so that the terminals 11 of the semiconductor chip 10 can be directly in contact with the upper surface of the lead frame 20 A semiconductor package having an improved heat dissipation structure
The exposed surface of the semiconductor chip 10 is disposed at a position spaced apart from the upper surface of the package body 30 by a lower height so that a cutout hole 31 is formed up to the spaced position to expose the exposed surface of the semiconductor chip 10 And is exposed to the outside by a cutting hole (31). The semiconductor package
Characterized in that a conductive or nonconductive filler (40) is further filled in the cut-off hole (31) and heat is discharged by the filler (40)
The filler material 40 may be made of a nonconductive material containing at least one of silica (SIO2), alumina (Al2O3) and aluminum nitride (AlN), or may be made of a metal containing at least one of silver (Ag) A semiconductor package having an improved heat dissipation structure, characterized in that it is made of a conductive material containing a powder
A lead frame 20 connected to the terminal 11 of the semiconductor chip 10,
A clip member 50 disposed between the semiconductor chip 10 and the lead frame 20 so that each terminal 11 can be indirectly connected to the lead frame 20,
A package body 30 that protects the semiconductor chip 10, the lead frame 20, and the clip member 50 and forms an outer shape is formed by molding,
A portion of the package body 30 is formed in an incised shape so that the bottom surface 12 of the semiconductor chip 10 can be exposed to the outside while the terminal 11 of the semiconductor chip 10 is exposed to the outside of the package body The bottom surface 12 of the semiconductor chip 10 can be exposed in the upper direction of the package body 30 by connecting the terminal 11 and the lead frame 20 in an inverted state so as to come to the bottom of the package body 30 A semiconductor package having an improved heat dissipation structure
The lead frame 20 is not bent and is disposed at a lower position than the terminal 11 of the semiconductor chip 10. The clip member 50 connected to the lead frame 20 is connected to the terminal 11). The semiconductor package according to claim 1, wherein the semiconductor package
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020170053309A KR101920915B1 (en) | 2017-04-26 | 2017-04-26 | Semiconductor chip package having heating structure |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR1020170053309A KR101920915B1 (en) | 2017-04-26 | 2017-04-26 | Semiconductor chip package having heating structure |
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| Publication Number | Publication Date |
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| KR20180119763A true KR20180119763A (en) | 2018-11-05 |
| KR101920915B1 KR101920915B1 (en) | 2018-11-21 |
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| KR1020170053309A KR101920915B1 (en) | 2017-04-26 | 2017-04-26 | Semiconductor chip package having heating structure |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
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| KR20220158404A (en) * | 2021-05-24 | 2022-12-01 | (주) 에이엘웍스 | Antenna Touch Pad Structure Manufacturing Method with Integral Press Working and Antenna Touch Pad Structure Manufactured by the Same |
| CN118299356A (en) * | 2024-05-14 | 2024-07-05 | 日月新半导体(威海)有限公司 | Front side heat dissipation structure of semiconductor chip and packaging method thereof |
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| KR102264132B1 (en) | 2019-06-14 | 2021-06-11 | 제엠제코(주) | Semiconductor package |
| CN112086413B (en) | 2019-06-14 | 2024-04-23 | Jmj韩国株式会社 | Semiconductor package |
| KR102244279B1 (en) | 2019-06-14 | 2021-04-26 | 제엠제코(주) | Semiconductor package |
| KR102355687B1 (en) | 2020-03-19 | 2022-01-27 | 제엠제코(주) | Semiconductor package and method of fabricating the same |
| KR102313764B1 (en) * | 2021-04-05 | 2021-10-19 | 제엠제코(주) | Cooling system for semiconductor component having semiconductor chip with cooling apparatus |
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Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR101977994B1 (en) * | 2013-06-28 | 2019-08-29 | 매그나칩 반도체 유한회사 | Semiconductor pacakge |
| KR101694657B1 (en) * | 2016-08-04 | 2017-01-09 | 제엠제코(주) | Semiconductor chip package having improved heating structure |
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2017
- 2017-04-26 KR KR1020170053309A patent/KR101920915B1/en active IP Right Grant
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20220158404A (en) * | 2021-05-24 | 2022-12-01 | (주) 에이엘웍스 | Antenna Touch Pad Structure Manufacturing Method with Integral Press Working and Antenna Touch Pad Structure Manufactured by the Same |
| CN118299356A (en) * | 2024-05-14 | 2024-07-05 | 日月新半导体(威海)有限公司 | Front side heat dissipation structure of semiconductor chip and packaging method thereof |
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| Publication number | Publication date |
|---|---|
| KR101920915B1 (en) | 2018-11-21 |
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