KR20180033496A - Method and Apparatus for Clock Synchronization in a Small Cell - Google Patents

Abstract

The present invention discloses a method and a device for clock synchronization capable of reducing a clock synchronization time when performing clock synchronization when booting a small cell. The device comprises: a nonvolatile memory storing clock synchronization information; a clock synchronizer; and a processor loading the clock synchronization information from the nonvolatile memory when booting the small cell, determining an input value to the clock synchronizer, and initially driving the clock synchronizer with the determined input value. The clock synchronizer can be configured to obtain the clock synchronization by performing the clock synchronization based on the input value when being initially driven by the processor. Also, the processor is further configured to update the clock synchronization information stored in the nonvolatile memory to information related to a state of the clock synchronizer at a time that the clock synchronization is obtained.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a clock synchronizing method and apparatus for a small-

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for performing clock synchronization in a small cell, and more particularly, to a technique for performing clock synchronization at the boot time of a small cell.

In recent radio access networks, a small size cell such as a micro cell, a pico cell, and a femto cell has a relatively large size macro cell It is evolving into an interlocking form. A small cell is a low-power wireless access node that has a narrower service area than a general cell, and is similar to a DSL modem, allowing it to connect to a wired IP network in the home and to use wired and wireless communication freely to terminals such as mobile phones. However, since a small cell is managed by a user in a user's area, the number of reboots is relatively frequent compared to a macro cell operated by an operator. In addition, it is necessary to acquire clock synchronization by performing clock synchronization procedure at each reboot, and it takes a long time to acquire clock synchronization. In particular, when a small cell performs clock synchronization according to a packet based synchronization scheme, the network environment changes instantaneously while synchronization is performed, so that it takes a long time to acquire the synchronization.

In order to provide a mobile communication service, the RF frequency output from the RF module must satisfy RF Frequency Accuracy Requirements - when the mobile communication service is provided without satisfying the RF frequency accuracy related standard It is necessary to precisely adjust the clock synchronization (for example, in a radio communication device such as a small cell, a clock synchronization result is output from an RF module Because it affects the output RF frequency). Therefore, if the acquisition of the clock synchronization is delayed, the time until the RF frequency accuracy related standard can be satisfied also becomes longer and the start time of the mobile communication service is delayed accordingly.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a clock synchronization method and apparatus capable of shortening a clock synchronization time in performing clock synchronization at boot time of a small cell.

The problems to be solved by the present invention are not limited to the above-mentioned problems, and other problems not mentioned can be clearly understood by those skilled in the art from the following description.

According to an aspect, a clock synchronization method in a small cell is provided. The method comprises the steps of: acquiring clock synchronization by driving a clock synchronizer using clock synchronization information at the time of booting of the small cell; acquiring information about the state of the clock synchronizer at the time of acquiring the clock synchronization; And updating the clock synchronization information with the clock synchronization information.

In one embodiment, the step of updating the clock synchronization information with the information on the state of the clock synchronizer at the time when the clock synchronization is obtained may include the step of updating information on the state of the clock synchronizer as non- In a non-volatile memory.

In one embodiment, the step of acquiring clock synchronization by driving the clock synchronizer using the clock synchronization information at the boot of the small cell comprises the step of determining an initial input value to the clock synchronizer based on the clock synchronization information .

In one embodiment, the step of acquiring clock synchronization by driving a clock synchronizer using the clock synchronization information at the boot of the small cell further comprises: obtaining an input value to the clock synchronizer from the initial input value continuously As shown in FIG.

In one embodiment, acquiring clock synchronization by driving a clock synchronizer using the clock synchronization information at boot time of the small cell may include loading the clock synchronization information from the non-volatile memory. have.

In one embodiment, the method includes an operation of acquiring clock synchronization by driving the clock synchronizer, and an operation of updating the clock synchronization information with information about the state of the clock synchronizer at the time when the clock synchronization is obtained And repeating it periodically.

In one embodiment, the clock synchronizer may be a Voltage Controlled Oscillator (VCO), and the initial input to the clock synchronizer may be an initial input to the voltage controlled oscillator.

In one embodiment, the step of acquiring clock synchronization by driving a clock synchronizer using the clock synchronization information at the time of booting of the small cell includes the steps of generating an Over-the-Air Synchronization (OTA Sync) based synchronization method based on one of the methods.

According to one aspect, a clock synchronizer in a small cell is provided. The apparatus includes a non-volatile memory for storing clock synchronization information, a clock synchronizer, and a controller for determining the input value to the clock synchronizer by loading the clock synchronization information from the nonvolatile memory at boot time of the small cell, ≪ / RTI > and a processor configured to initially drive the clock synchronizer with a value. Here, the clock synchronizer may be configured to acquire clock synchronization by performing clock synchronization based on the input value when it is initially driven by the processor. The processor may further be configured to update the clock synchronization information stored in the nonvolatile memory with information on the state of the clock synchronizer at the time the clock synchronization is obtained.

In one embodiment, the processor is further configured to periodically drive the clock synchronizer after the initial drive, wherein the clock synchronizer is configured to acquire clock synchronization each time it is periodically driven by the processor, And to update the clock synchronization information stored in the nonvolatile memory with information on the state of the clock synchronizer at the corresponding time point each time the clock synchronization is obtained.

In one embodiment, the clock synchronizer may be a Voltage Controlled Oscillator (VCO), and the input value may be an initial input value to the voltage controlled oscillator.

In one embodiment, the voltage controlled oscillator may be further configured to continuously adjust an input value to the voltage controlled oscillator from the initial input value to obtain a clock synchronization.

According to one aspect, a clock synchronization method in a small cell is provided. The method includes the steps of: querying a preset synchronization method at booting of the small cell; setting a sync packet rate to be higher than a normal transmission rate if the preset synchronization method is a packet based synchronization method , Performing clock synchronization with the highly synchronous packet transmission rate to obtain clock synchronization, and setting the synchronous packet transmission rate to a standard transmission rate again.

In one embodiment, the step of performing clock synchronization with the highly synchronous packet transmission rate to acquire clock synchronization may further comprise the steps of: receiving a synchronous packet from a Network Time Protocol (NTP) server or a Precision Time Protocol (PTP) Lt; / RTI >

According to one aspect, a clock synchronizer in a small cell is also provided. The apparatus includes a processor configured to inquire a communication unit and a preset synchronization method at boot time of the small cell, and to set a synchronization packet transmission rate higher than a standard transmission rate when the predetermined synchronization method is a packet-based synchronization method can do. Here, the communication unit may be configured to exchange the synchronization packet with the NTP server or the PTP server at the highly synchronous packet transmission rate.

According to the embodiments of the present invention, there is a technical effect that a mobile communication service can be started quickly by performing clock synchronization quickly and accurately at boot time of a small cell.

1 is a block diagram illustrating a configuration of a clock synchronizing apparatus in a small cell according to an embodiment of the present invention.
2 is a flowchart showing a first embodiment of a clock synchronization method in a small cell, which is executed at boot time of a small cell according to the present invention.
3 is a flowchart showing a second embodiment of a clock synchronization method in a small cell, which is executed at boot time of a small cell according to the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of attaining them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the invention to those skilled in the art. To fully disclose the scope of the invention to a person skilled in the art, and the invention is only defined by the scope of the claims.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present invention. For example, an element expressed in singular < Desc / Clms Page number 5 > terms should be understood to include a plurality of elements unless the context clearly dictates a singular value. In addition, in the specification of the present invention, it is to be understood that terms such as "include" or "have" are intended to specify the presence of stated features, integers, steps, operations, components, The use of the term does not exclude the presence or addition of one or more other features, numbers, steps, operations, elements, parts or combinations thereof. Further, in the embodiments described herein, 'module' or 'sub-unit' may mean at least one function or a functional part performing an operation.

In addition, all terms used herein, including technical or scientific terms, unless otherwise defined, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be construed as meaning consistent with meaning in the context of the related art and may be interpreted in an ideal or overly formal sense unless explicitly defined in the specification of the present invention It does not.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, well-known functions or constructions will not be described in detail if they obscure the subject matter of the present invention.

FIG. 1 is a diagram illustrating a configuration of a clock synchronizing apparatus in a small cell according to an embodiment of the present invention. It should be noted that the components shown in Figure 1 do not necessarily reflect all the functionality of the clock synchronizer 100 and are not necessary so that the clock synchronizer 100 includes more components or fewer components than the components shown As will be appreciated by those skilled in the art.

1, a clock synchronizer 100 includes a processor 110, a non-volatile (NV) memory 140, a clock synchronizer (not shown) 170 and a communication unit 180. The nonvolatile memory 140 may be used to store clock synchronization information, which will be described later. The nonvolatile memory 140 may further be used to store software / firmware and / or data for operation and operation of the processor 110, data to be input / output, and the like. The non-volatile memory 140 may be a flash memory type, a hard disk type, a multimedia card micro type, a card type memory (for example, SD or XD memory) (ROM), an electrically erasable programmable read-only memory (EEPROM), a programmable read-only memory (PROM), a magnetic memory, a magnetic disk, or an optical disk .

The processor 110 may be configured to load the clock synchronization information from the non-volatile memory 140 at boot time of the small cell to determine the input to the clock synchronizer 170. [ The processor 110 may be further configured to initially drive the clock synchronizer 170 with the determined input value. The processor 110 is further configured to update the clock synchronization information stored in the nonvolatile memory 140 with information regarding the state of the clock synchronizer 170 at the time the clock synchronization is obtained by the clock synchronizer 170 . In one embodiment, the processor 110 may be further configured to periodically drive the clock synchronizer 170 after the initial drive. In one embodiment, the processor 110 may be configured to store information about the state of the clock synchronizer 170 at that point in time in the nonvolatile memory 140 whenever the clock synchronizer 170 periodically acquires clock synchronization, Lt; RTI ID = 0.0 > synchronization < / RTI > In one embodiment, information about the state of the clock synchronizer 170 at the time the clock synchronization is obtained may include information about the input value to the clock synchronizer 170 at the time the clock synchronization is obtained . The processor 110 may further be configured to inquire a preset synchronization method at the boot time of the small cell and to set the synchronization packet transmission rate higher than the standard transmission rate when the predetermined synchronization method is a packet-based synchronization method as a result of the inquiry.

The processor 110 may be implemented in hardware from application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic And may be implemented using at least one of Programmable Logic Devices (PLDs), Field-Programmable Gate Arrays (FPGAs), micro-controllers, and microprocessors. The processor 110 may also be implemented as a firmware / software module that is executable on the hardware platform described above. In this case, the firmware / software module may be implemented by one or more software applications written in an appropriate program language.

Clock synchronizer 170 may be configured to obtain clock synchronization by performing clock synchronization based on an initial input value provided by processor 110 when initially driven by processor 110. [ The clock synchronizer 170 includes a Global Navigation Satellite System (GNSS) synchronization method for receiving a signal at a predetermined time period from the satellite and adjusting a clock synchronization based on the synchronization signal, a synchronization channel transmitted from a neighboring macro cell, (OTP Sync) method, which synchronizes the clock by receiving a signal, and a clock synchronization (OTP) by exchanging sync packets with an NTP / PTP (Synchronization Server) And a packet-based synchronization scheme for synchronizing the clock signals with each other. In one embodiment, clock synchronizer 170 may be further configured to acquire clock synchronization every time it is periodically driven by processor 110 after the initial start-up. In one embodiment, the clock synchronizer 170 may be a Voltage Controlled Oscillator (VCO), and the initial input value may be an initial input value to the voltage controlled oscillator. The voltage controlled oscillator 170 further comprises a further configuration for continuously adjusting the input value to the voltage controlled oscillator from the initial input value until the frequency error for the frequency of the output clock signal decreases below a specified reference . In one embodiment, the voltage-controlled oscillator 170 receives the input of the clock synchronizer 170 until it can meet the RF frequency accuracy related specification, e.g., 250PPB (Part Per Billion) specified for a small cell in 3GPP The frequency of the output clock signal can be adjusted.

The communication unit 180 is configured to transmit various RATs (e.g., LTE / LTE-A) such that the clock synchronizer 100 can perform clock synchronization using a GNSS synchronization scheme, a wireless synchronization scheme, a packet synchronization scheme based on NTP / PTP Radio Access Technologies) and communication protocols. In this case, the RAT and communication protocol may be implemented with appropriate hardware and / or firmware. The communication unit 180 may be further configured to transmit and receive a synchronization packet to and from an NTP server or a PTP server according to a synchronization packet transmission rate set by the processor 110.

In some implementations, the communication protocol may include a Transmission Control Protocol / Internet Protocol (TCP / IP) protocol and / or a User Datagram Protocol (UDP) protocol. In some implementations, the communication unit 180 may be implemented to comply with a wireless communication interface specification such as LTE-Ue. In some implementations, the communication unit 180 may be implemented in a portable Internet network such as a GSM network, a 2G wireless communication network such as a CDMA network, a wireless Internet network such as a WiFi network, a WiBro network and a WiMax network or a wireless communication network supporting packet transmission RATs and may include the functions / features of the communication unit of the communication device used in such wireless communication network, but the functionality of the communication unit 180 is not limited thereto.

2 is a flowchart showing a first embodiment of a clock synchronization method in a small cell, which is executed at boot time of a small cell according to the present invention.

A first embodiment of a clock synchronization method in a small cell according to the present invention begins with step S210 in which the processor 110 loads clock synchronization information from the nonvolatile memory 140. [ The clock synchronization information may include information on the state of the clock synchronizer 170 at the time when the clock synchronization is obtained at the previous clock synchronization execution. In one embodiment, the clock synchronization information may be an input to the clock synchronizer 170 at the time the clock synchronization was obtained at the time of previous clock synchronization. In this step, the initial input value to the clock synchronizer 170 may be determined based on the loaded clock synchronization information.

In step S220, the clock synchronizer 170 is driven using the initial input value to the clock synchronizer 170 determined in step S210. In this step, the initial input value is input to the clock synchronizer 170 and the clock synchronizer 170 is driven. In step S230, the clock synchronizer 170 may be driven to acquire clock synchronization. The clock synchronizer 170 may perform clock synchronization using any one of the NTP / PTP synchronization scheme, for example, a GNSS synchronization scheme, a wireless synchronization scheme, and a packet based synchronization scheme, depending on the implementation scheme of the small cell. In this step, the input to the clock synchronizer 170 may be continuously adjusted from the initial input value to obtain clock synchronization. This step also adjusts the input value of the clock synchronizer 170 until it can satisfy the RF frequency accuracy related standard, e.g., 250 PPB as defined for the small cell in the 3GPP, .

In step S240, when clock synchronization is obtained by the clock synchronizer 170 in step S230, the information on the state of the clock synchronizer 170 at the time when the clock synchronization is obtained is stored in the nonvolatile memory 140. [ Lt; / RTI > In this step, the processor 110 obtains information on the state of the clock synchronizer 170 at the time when the clock synchronizer is obtained, for example, the input value to the clock synchronizer 170 in the clock synchronized state And store it as non-volatile memory 140 as clock synchronization information. In this manner, the clock synchronization information is updated every time the clock synchronization is performed. By doing so, since the latest clock synchronization result stored previously can be used at the next clock synchronization, the time required for acquiring the clock synchronization can be shortened .

In step S250, it is checked whether the selected time period has expired. Whether or not the predetermined time period has expired can be checked using a timer, for example. If it is determined in step S250 that the selected time period has not expired, step S250 is repeated. If it is determined in step S250 that the selected time period has expired, the process proceeds to step S230, where the clock synchronizer 170 is driven. The reason why the clock synchronizer 170 is driven again (periodically) is to refresh the clock synchronization in the periodical maintenance level and to reflect the latest clock synchronization state at the next booting. In this case, since the clock synchronization is not performed at boot time, the input value at the time of previous clock synchronization acquisition is maintained in the clock synchronizer 170. Therefore, the processor 110 receives the clock synchronization information from the nonvolatile memory 140 And does not have to be provided to the clock synchronizer 170. When the process returns to step S230, steps S230 and S240 are performed to update the clock synchronization information again.

In various embodiments, steps S210 through S250 may be performed by a boot loader for booting the CPU of the small cell at the start of the boot of the small cell, May be performed by sequentially executing the routine according to the image, but it may be called and executed according to other methods. It should be appreciated that the specific manner in which steps S210 through S250 are performed may vary depending on the implementation of the small cell.

As described above, when the small cell is booted, the previous clock synchronization information is read from the nonvolatile memory 140, and the input value to the clock synchronizer 170 is determined and provided to the clock synchronizer 170, The synchronizer 170 can acquire the clock synchronization more quickly than when performing the clock synchronization with an arbitrary initial input value using the previous clock synchronization result (input value). In addition, when the clock synchronization is obtained, information on the state of the clock synchronizer 170 at the time when the clock synchronization is obtained is stored in the nonvolatile memory 140 as clock synchronization information, and thereafter, The clock synchronization information is updated every time the clock signal is input to the clock synchronizer 170, so that it can be utilized for determining the input value to the clock synchronizer 170 at the time of rebooting the small cell.

3 is a flowchart showing a second embodiment of a clock synchronization method in a small cell, which is executed at boot time of a small cell according to the present invention.

The second embodiment of the clock synchronization method in a small cell according to the present invention starts from S310 of querying a preset synchronization method to be used in a small cell. As described above, the small cell can adopt any one of the GNSS synchronization method, the wireless synchronization method, and the packet-based synchronization method according to the implementation method thereof. For reference, macro cells are installed in open outdoor space, so it is common to use GNSS synchronous method for clock synchronization and not to use packet based synchronous method. However, in the case of a small cell, since it is usually installed indoors, the OTP synchronous method or the packet based NTP / PTP synchronous method is mainly used in a situation where GNSS synchronous method can not be used. Among these, the OTA synchronous method is a method of synchronizing with the neighboring macrocells by receiving the synchronous channel signal. However, this method also has a high probability of failing due to the characteristic of the small cell which is the target of enlarging the coverage in the shadow area. If the OTA synchronization fails, the packet-based synchronization method such as NTP / PTP should be used. However, since the network environment is not constant during the clock synchronization, it takes a long time to acquire the synchronization basically (for example, about 30 minutes ). Returning to the description of the flowchart of FIG. 3, if it is determined in step S310 that the preset synchronization method used in the small cell is not the packet-based synchronization method, the process proceeds to step S320, The clock synchronization is performed according to a synchronous method (e.g., a GNSS synchronous method, a wireless synchronous method, etc.) to acquire clock synchronization, and the process ends.

On the other hand, if it is determined in step S310 that the predetermined synchronization method used in the small cell is the packet-based synchronization method, the process proceeds to step S330 to set the sync packet rate as a standard (normal) transmission rate. In one embodiment, when the standard transmission rate is 1/16 packets / sec, it is possible to set the synchronous packet transmission rate up to 2 packets / sec. It should be appreciated, however, that this value is merely an example of a synchronous packet transmission rate that can be set up, and that a value that can be set up as the synchronous packet transmission rate should not be limited by this value.

Packet-based synchronization is known as synchronizing clocks by exchanging synchronous packets with NTP / PTP servers in a private network such as a backbone network. Specifically, in the clock synchronous operation, each of the small cell and the NTP / PTP server sends a synchronous packet to a counterpart side, or transmits a packet with a time stamp indicating a transmission time, And the small cell may be able to synchronize clocks using these timestamps. Since the packet-based synchronization method is based on the synchronous packet exchange between the small cell and the NTP / PTP server, the time required for the clock synchronization may depend on the set synchronous packet transmission rate. In implementing a packet-based synchronization scheme, it is advantageous to shorten a clock synchronization time by setting a high synchronization packet rate. However, considering a network environment in which a small number of small cells are concentrated in a certain area, a traffic load ) May be increased to cause congestion. In the aspect of the NTP / PTP server, the capacity of the number of synchronous packets to be exchanged at one time is determined. Therefore, setting the synchronous packet transmission rate higher may cause problems. Therefore, it is impossible to set the synchronous packet transmission rate to be high in a normal situation, which is a practical method for shortening the clock synchronization time. However, considering that it is an exceptional situation in which a small cell is booted in this step, a synchronous packet transmission rate is set to be higher than a standard transmission rate in performing a packet synchronous clock synchronization. By doing so, clock synchronization can be performed in a short period of time to effectively cope with an exceptional situation of booting a small cell.

In step S340, clock synchronization is performed at a high sync packet transmission rate to obtain clock synchronization. As described above in connection with the first embodiment, the clock synchronizer 170, such as a VCO, is driven to provide a clock synchronization (e.g., a clock synchronization) until it can meet the RF frequency accuracy related specifications of 250 PPB, The clock frequency / phase of the clock synchronizer 170 can be adjusted by adjusting the input value of the oscillator 170. If the clock synchronization is obtained in step S340, the synchronous packet transmission rate is set again to the standard transmission rate in step S350. Since an exceptional situation of booting a small cell has been terminated, it is intended to synchronize the clock by exchanging the synchronization packet with the NTP / PTP server at the standard rate.

Steps S310 to S350 are similar to the first embodiment in that the boot loader for booting the CPU of the small cell at the start of booting of the small cell loads the image into the processor 110 and the processor 110 May be performed by sequentially executing the routine according to this image. It is also the same as in the first embodiment that the specific manner in which the steps S310 to S350 are performed may be changed depending on the implementation method of the small cell.

As described above, in the second embodiment, when the small cell is booted and the clock synchronization is performed, the synchronous packet transmission rate is set to be higher than the standard transmission rate and the clock synchronization is performed within a short time , And after the clock synchronization is obtained, the synchronization packet transmission rate is reduced back to the standard transmission rate, and an excessive number of synchronization packets are transmitted during the subsequent clock synchronization, thereby preventing traffic congestion.

Although the clock synchronizing method executed at the time of booting the small cell according to the present invention has been described with reference to the first and second embodiments as examples, those skilled in the art can refer to the first and second embodiments A modified example of the first embodiment, a modified example of the second embodiment, or other embodiments in which the first and second embodiments are combined can be interpreted as belonging to the scope of the present invention do. For example, it is also possible to replace the step S230 in the first embodiment with the steps S310 to S350 in the second embodiment, and to carry out it with a slight modification, It is to be understood that the same is within the scope of the present invention.

In the embodiments disclosed herein, the arrangement of the components shown may vary depending on the environment or requirements in which the invention is implemented. For example, some components may be omitted or some components may be integrated into one. In addition, the arrangement order and connection of some components may be changed.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention. Accordingly, the technical scope of the present invention should be determined only by the appended claims.

100: Clock synchronizer
110: Processor
140: Nonvolatile memory
170: clock synchronizer
180:

Claims (3)

As a clock synchronization method in a small cell,
A step of inquiring a preset synchronization method at booting of the small cell,
Setting a sync packet rate to be higher than a normal transmission rate when the preset synchronization method is a packet based synchronization method and acquiring clock synchronization by performing clock synchronization at the highly synchronous packet transmission rate , And
And setting the synchronous packet transmission rate again to a standard transmission rate. The method according to claim 1,
The step of performing clock synchronization with the highly synchronous packet transmission rate to acquire clock synchronization may include exchanging a synchronization packet with an NTP (Network Time Protocol) server or a PTP (Precision Time Protocol) server at the highly synchronous packet transmission rate / RTI > A method of synchronizing clocks in a small cell. CLAIMS 1. A clock synchronizer in a small cell,
And
A processor configured to inquire a predetermined synchronization method at the time of booting of the small cell and to set a synchronous packet transmission rate higher than a standard transmission rate when the predetermined synchronous method is a packet based synchronous method,
Wherein the communication unit is configured to exchange a synchronization packet with the NTP server or the PTP server at the highly synchronous packet transmission rate.

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