KR20180002154A - Organic light emitting diode display device and driving method the same - Google Patents

Abstract

The present invention relates to an organic light emitting display and a driving method thereof,
The organic light emitting display includes an organic light emitting diode, a driving transistor DT electrically connected to the organic light emitting diode and applying a voltage to the organic light emitting diode, and a first switching transistor ST1 for controlling the turn- .
The organic light emitting diode display includes a first switching transistor SCL1 extending in one direction and a first node connected to the driving transistor, the first switching transistor transmitting a turn-on voltage to the first switching transistor, An emission control signal transmission line (EML) which transmits a turn-on voltage to the emission control transistor and extends in the same direction as the first signal transmission line, and a turn- On voltage and a second signal transmission line (L2) extending in the same direction as the first signal transmission line.
Further, the organic light emitting display device is characterized in that the first signal transmission line is located between the driving transistor and the emission control signal transmission line.

Description

TECHNICAL FIELD [0001] The present invention relates to an organic light emitting diode (OLED) display device,

The present invention relates to an organic light emitting display and a driving method thereof.

2. Description of the Related Art Recently, various flat panel display devices capable of reducing weight and volume, which are disadvantages of cathode ray tubes (CRTs), have been developed. Examples of the flat panel display include a liquid crystal display (LCD), a field emission display (FED), a plasma display panel (PDP), and an organic light emitting display (OLED) ).

Among the flat panel display devices, the organic light emitting display device displays an image using an organic light emitting device that generates light by recombination of electrons and holes. This is advantageous in that it has a fast response speed and is driven with low power consumption.

2. Description of the Related Art Conventionally, an organic light emitting diode (OLED) is classified into a passive matrix type OLED (PMOLED) and an active matrix type OLED (AMOLED) according to a method of driving an organic light emitting diode.

In an organic light emitting display, pixels each including an organic light emitting element and a pixel circuit are arranged in a matrix form, and brightness of an image is adjusted by pixels driven according to gray levels of video data.

The organic light emitting display includes a plurality of gate lines, a plurality of data lines, a plurality of power lines, and a plurality of pixels connected to the lines and arranged in a matrix. Each of the pixels includes an organic light emitting element composed of an organic light emitting layer between the anode and the cathode, and a pixel circuit for independently driving the organic light emitting element. The pixel circuit mainly comprises a switching transistor for transferring a data signal, a driving transistor for driving the EL element in accordance with the data signal, and a capacitor for holding the data voltage. The switching transistor charges the data voltage to the capacitor in response to the scan pulse. The driving transistor controls the amount of current supplied to the organic light emitting element according to the data voltage charged in the capacitor to control the amount of light emitted from the organic light emitting element.

Such an AMOLED has an advantage of low power consumption, but a pixel circuit driving an organic light emitting element is affected by a kick back due to a parasitic capacitor existing in a transistor within a light emission period, There is a problem. Specifically, a parasitic capacitor according to a laminating process exists between the electrodes of the transistors provided in the pixel. Particularly, a parasitic capacitor is generated between the scan signal line connected to the gate electrode of the first switching transistor and the drain electrode of the driving transistor. By this parasitic capacitor, the drain electrode of the driving transistor can be affected by kick back when the first switching transistor is turned off in the light emitting period. The potential of the drain electrode of the driving transistor is lowered due to the effect of the kickback, and rises to the high potential driving power source when the emission control transistor is turned on. At this time, the potential of the gate electrode of the driving transistor also rises. When the potential of the gate electrode of the driving transistor set in the programming period is changed in the light emission period, the gate-source voltage Vgs is distorted, which is recognized as a luminance change. As a result, when the first switching transistor is turned off in the light emitting period and is in the floating state, the luminance distortion may be caused by the kickback effect by the parasitic capacitor.

In order to overcome such a problem, there is a need for a new pixel structure and an OLED display which are not affected by a kickback due to a parasitic capacitor existing in a transistor within a light emission period.

As described above, the inventors of the present invention have developed a novel pixel structure that is not affected by kickback and minimizes the generation of a parasitic capacitor (Cpara) existing in a transistor constituting a pixel, Device.

SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a light emitting control signal transmission line, which is positioned with a driving transistor and a first signal transmission line therebetween, so that the first signal transmission line and the first node are positioned as far as possible And an organic light emitting display device for minimizing a parasitic capacitor between the first switching transistor and the first node, and a manufacturing method thereof.

According to an embodiment of the present invention, there is provided an organic light emitting display including an organic light emitting diode, a driving transistor DT electrically connected to the organic light emitting diode to apply a voltage to the organic light emitting diode, And a first switching transistor ST1 for controlling the turn-on of the transistor.

The organic light emitting diode display includes a first switching transistor SCL1 extending in one direction and a first node connected to the driving transistor, the first switching transistor transmitting a turn-on voltage to the first switching transistor, An emission control signal transmission line (EML) which transmits a turn-on voltage to the emission control transistor and extends in the same direction as the first signal transmission line, and a turn- On voltage and a second signal transmission line (L2) extending in the same direction as the first signal transmission line.

Further, the organic light emitting display device is characterized in that the first signal transmission line is located between the driving transistor and the emission control signal transmission line.

According to another aspect of the present invention, an organic light emitting diode display includes a first switching transistor for supplying a data voltage applied from the outside to a gate electrode of a driving transistor, a second switching transistor connected to the driving transistor for controlling an electrical connection with the high- A first signal transmission line connected to the gate electrode of the first switching transistor and controlling the turn-on of the first switching transistor, a second signal transmission line connected to the gate electrode of the third switching transistor, And an active layer of the driving transistor and an active layer of the third switching transistor are connected to each other and are in contact with each other. Further, the organic light emitting display includes a first signal transmission line on one plane, A light emitting element is provided between the first node and the first signal transmission line so as to be as far as possible from the node, And a signal transmission line is disposed.

The details of other embodiments are included in the detailed description and drawings.

In each pixel of the present invention, the light emission control signal transmission line is located with the driving transistor and the first signal transmission line therebetween, and the first signal transmission line and the first node are disposed as far as possible so as not to overlap each other. As a result, each pixel structure of the present invention minimizes the generation of a parasitic capacitor (Cpara) existing between the first switching transistor and the first node, so that the driving transistor is not affected by the kick back Lt; / RTI >

Accordingly, each pixel of the present invention solves the problem that reverse bias (Bias) is formed in the driving transistor, and distortion occurs in a specific period gradation. The present invention minimizes the generation of parasitic capacitors (Cpara) existing in the transistor, thereby improving the reliability and increasing the luminance uniformity, thereby greatly extending the service life of the product.

1 is a configuration diagram of an organic light emitting diode display according to an embodiment of the present invention.
2 is a plan view of the pixel shown in FIG. 1 according to an embodiment of the present invention.
FIG. 3 is a cross-sectional view schematically showing a pixel structure of an organic light emitting diode display cut along a perforated line A-A 'in FIG. 2 according to an embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. The present invention may, however, be embodied in many different forms and should not be construed as being limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Is provided to fully convey the scope of the invention to those skilled in the art, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, and the like disclosed in the drawings for describing the embodiments of the present invention are illustrative, and thus the present invention is not limited thereto.

In the following description, well-known functions or constructions are not described in detail since they would obscure the invention in unnecessary detail. Where the terms "comprises", "having", "done", and the like are used in this specification, other portions may be added unless "only" is used. Unless the context clearly dictates otherwise, including the plural unless the context clearly dictates otherwise.

In interpreting the constituent elements, it is construed to include the error range even if there is no separate description. In the case of a description of the positional relationship, for example, if the positional relationship between two parts is described as 'on', 'on top', 'under', and 'next to' Or " direct " is not used, one or more other portions may be located between the two portions.

It will be understood that when an element or layer is referred to as being on another element or layer, it encompasses the case where it is directly on or intervening another element or intervening another element or element.

Although the first, second, etc. are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component mentioned below may be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The sizes and thicknesses of the individual components shown in the figures are shown for convenience of explanation and the present invention is not necessarily limited to the size and thickness of the components shown.

It is to be understood that each of the features of the various embodiments of the present invention may be combined or combined with each other partially or entirely and technically various interlocking and driving is possible as will be appreciated by those skilled in the art, It may be possible to cooperate with each other in association.

In the present invention, the transistor may be of P type or N type. In the following embodiments, the transistor is assumed to be N type for convenience of explanation. In describing the pulse-type scan signals SCAN1 and SCAN2 inputted to the gate electrode, the gate electrode high voltage (VGH) state is defined as "high state ", and the gate electrode low voltage (VGL) State ".

Thus, the high voltage VGH is the gate electrode ON voltage that turns on the transistor, and the gate electrode low voltage VGL is the gate electrode OFF voltage that turns off the transistor.

Hereinafter, an OLED display and a driving method thereof according to embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a configuration diagram of an organic light emitting diode display according to an embodiment of the present invention.

1 includes a display panel 2 in which a plurality of gate lines GL and a plurality of data lines DL intersect to define respective pixels 1 and a plurality of gate lines GL, A data driver 3 for driving a plurality of data lines DL and a data driver 3 for supplying image data RGB inputted from outside to the data driver 3, And a timing controller 5 for outputting a control signal GCS and a data control signal DCS to control the gate driver 4 and the data driver 3.

Each pixel 1 of the present invention includes a pixel driving circuit for independently driving an organic light emitting diode OLED including an organic light emitting diode OLED and a driving transistor for supplying a driving current to the organic light emitting diode OLED do. The pixel driving circuit compensates the electrical characteristic deviations of the driving transistor such as the threshold voltage Vth and the mobility and compensates the luminance deviation between the pixels 1 due to the difference in current supplied to the organic light emitting element OLED Can be reduced. The pixel 1 of the present invention will be described later in detail with reference to Figs. 2 to 3.

The display panel 2 has a plurality of gate lines GL and a plurality of data lines DL intersecting with each other and a plurality of pixels 1 are arranged in an intersection region of these gate lines GL and data lines DL. Each pixel 1 includes an organic light emitting element OLED and a pixel driving circuit. Each pixel 1 is connected to a gate line GL, a data line DL, a first voltage VDD supply line VDDL and a second voltage VSS supply line VSSL.

The gate driver 4 supplies a plurality of gate signals to the plurality of gate lines GL in accordance with a plurality of gate electrode control signals GCS provided from the timing controller 5. [ The plurality of gate signals includes first and second scan signals SCAN1 and SCAN2, and these signals are supplied to each pixel 1 through a plurality of gate lines GL. The first voltage VDD has a higher potential and a relatively higher voltage than the second voltage VSS, which is a lower potential. The second voltage VSS may be a ground voltage.

The data driver 3 outputs the digital image data RGB input from the timing controller 5 to the data voltage Vdata using the reference gamma voltage in accordance with the plurality of data control signals DCS provided from the timing controller 5 Conversion. And supplies the converted data voltage Vdata to the plurality of data lines DL. On the other hand, the data driver 3 outputs the data voltage (Vdata) in the programming period of each pixel 1.

The timing controller 5 arranges image data RGB input from the outside in accordance with the size and resolution of the display panel 2 and supplies the image data RGB to the data driver 3. The timing controller 5 uses a synchronous signal SYNC input from the outside, for example, a dot clock DCLK, a data enable signal DE, a horizontal synchronizing signal Hsync, and a vertical synchronizing signal Vsync, And generates a gate control signal GCS and a data control signal DCS. The gate driver 4 and the data driver 3 are controlled by supplying the generated gate control signals GCS and data control signals DCS to the gate driver 4 and the data driver 3, respectively.

Hereinafter, the pixel of the present invention will be described in detail. 2 is a plan view of the pixel shown in Fig.

Referring to Fig. 2, the pixel 1 includes a pixel driving element including an organic light emitting element OLED and four transistors, signal transmission lines for transmitting a signal to turn on each transistor, and a capacitor. Specifically, the pixel driving element includes a driving transistor DT, first to third switching transistors ST1 to ST3, a high potential supply line VDD_L, a data voltage supply line Vdata_L, a reference voltage supply line Vref_L, And a storage capacitor Cst. In addition, it includes a bottom shield metal (BSM) which is a metal pattern to prevent the driving current of a pixel from suddenly lowering.

The OLED is a light emitting element connected between a third node (node 3) connected to the source electrode of the driving transistor DT and a low potential voltage supply line (not shown), and emitting light according to the driving current.

Next, the first switching transistor ST1 has a first gate electrode, a first active layer, a first source electrode, and a first drain electrode. The first source electrode of the first switching transistor ST1 is connected to the gate electrode of the driving transistor DT through the second node node2.

The first switching transistor ST1 is turned on or off according to the first scan signal Scan1 supplied via the first scan signal transmission line SCL1 and is turned on or off according to the turn- And the second node (node2). That is, the data voltage Vdata provided from the data voltage supply line Vdata_L is supplied to the second node node2.

Next, the second switching transistor ST2 has a second gate electrode, a second active layer, a second source electrode, and a second drain electrode. Here, the second source electrode of the second switching transistor ST2 is connected to the source electrode of the driving transistor DT through the third node (node3). The second switching transistor ST2 is turned on or off according to the second scan signal Scan2 supplied via the second scan signal transmission line SCL2 extending in the same direction as the first scan signal transmission line SCL1. Off reference voltage supply line Vref_L and the third node node3 to each other. That is, the reference voltage Vref provided from the reference voltage supply line Vref_L is supplied to the third node node3.

Next, the third switching transistor ST3 has a third gate electrode, a third active layer, a third source electrode, and a third drain electrode. Here, the third source electrode of the third switching transistor ST3 is connected to the drain electrode of the driving transistor DT through the first node (node1). The third switching transistor ST3 is a light emission control transistor for controlling the organic light emitting element OLED not to emit light in a period other than the light emission period. The emission control transistor ST3 is turned on or turned off according to the emission control signal EM supplied via the emission control signal transmission line EML and is turned on when the high potential voltage supply line VDD_L and the turn- Connect one node (node1) to each other. That is, the high potential voltage VDD supplied from the high potential supply line VDD_L is applied to the first node node1.

Next, the driving transistor DT, together with the organic light emitting element, is connected in series between the high-potential voltage supply line VDD_L and the low-potential voltage supply line, and is involved in the light emission of the organic light emitting element. The driving transistor DT is a driving element in which the magnitude of the driving current is controlled in accordance with the gate-source voltage Vgs.

Further, the driving transistor DT includes a gate electrode, an active layer, a source electrode, and a drain electrode. The gate electrode is connected to a second node (node2) to which a data voltage (Vdata) is applied, and the drain electrode is connected to a first node (node1) to which a high potential voltage (VDD) is applied. The gate electrode is formed on the same plane as the first scan signal transmission line SCL1 and the emission control signal transmission line EML.

Next, the storage capacitor Cst is connected to the second node node2, and maintains the gate-source voltage Vgs of the driving transistor DT constant during the light emission period. In addition, the data voltage Vdata is maintained for one frame so that the driving transistor DT is turned on to allow the current to flow constantly to the organic light emitting element.

Referring to FIG. 2, the pixel driving element includes a driving transistor DT electrically connected to the organic light emitting element to apply a voltage to the organic light emitting element.

The pixel driving element includes a first node (node1) connected to the driving transistor DT and includes a light emitting control transistor ST3 for controlling the light emission of the organic light emitting element.

The pixel driving element transmits a turn-on voltage of the emission control transistor ST3 and includes a light emission control signal transmission line EML extending in one direction and a second node node2 connected to the driving transistor DT. .

The pixel driving element transmits the turn-on voltage of the first switching transistor ST1 and the first switching transistor ST1 for controlling the turn-on of the driving transistor DT and the same as the emission control signal transmission line EML And a first scan signal transmission line (SCL1) extending in the direction of the first scan signal.

The emission control signal transmission line (EML) is located between the driving transistor (DT) and the first scan signal transmission line (SCL1).

Also, on one plane, the pixel driving element is arranged between the first node (node1) and the first scan signal transmission line (SCL1) such that the first scan signal transmission line (SCL1) is as far as possible from the first node A light emission control signal transmission line (EML) may be disposed. The spaced apart arrangement of the emission control signal transmission line (EML) and the first node (node1) can minimize the generation of the parasitic capacitor (Cpara). This parasitic capacitor can make the voltage applied to the first node (node1) lower than the source electrode of the driving transistor DT.

2, the pixel 1 of the organic light emitting diode display includes a driving transistor DT, first to third switching transistors ST1 to ST3, a high potential supply line VDD_L and 190, A supply line Vdata_L, a reference voltage supply line Vref_L, and a storage capacitor Cst.

FIG. 3 is a cross-sectional view schematically showing a pixel structure of an organic light emitting diode display cut into a perforated line A-A 'in FIG. 2 according to an embodiment of the present invention.

3, a pixel 1 of an organic light emitting diode display according to an exemplary embodiment of the present invention includes a light emission control signal transmission line 160c connected to a gate electrode of a first switching transistor ST1, ST3) and the first node (node1) to which the driving transistor DT is connected are positioned as far as possible.

Next, the structure of the pixel 1 of the organic light emitting diode display will be described with reference to FIG. The lower substrate 110 may be disposed on an auxiliary substrate. The lower substrate 110 may be made of plastic. In addition, the lower substrate 110 may be formed of a polymer material such as polyimide (PI). The organic light emitting device OLED connected to the first to third switching transistors ST1 to ST3 and the driving transistor DT may be formed on the lower substrate 110. [ The auxiliary substrate is composed of a glass substrate and a sacrificial layer. The auxiliary substrate may be separated from the lower substrate 110 on which the organic light emitting device is formed through a laser-releasing process.

Then, a buffer layer 120a is formed on the entire surface of the lower substrate 110. [ The buffer layer 120a may have a structure in which a plurality of thin films are deposited. Here, for the sake of simplicity, it is described as a single layer. More preferably, the buffer layer 120a is made of silicon oxide (SiOx) that does not particularly affect the device.

Then, the BSM 130 is selectively formed on the buffer layer 120a only in a necessary portion.

The active layer of various transistors including the driving transistor DT may be damaged by the laser-releasing process. In addition, a negative charge trap is generated in the sacrificial layer due to the laser and light entering from the outside, so that charges in the polyimide (PI) forming the lower substrate 110 are sacrificed Moves towards the floor. Accordingly, the potential of the surface of the lower substrate 110 is increased. As a result, the current flowing through the transistor can be reduced.

Further, the source electrode of the driving transistor connected to the organic light emitting diode (OLED) is kept in a floating state when the driving transistor is turned off. In this case, as the potential of the surface of the lower substrate 110 increases, parasitic capacitance may be generated between the lower substrate 110 and the source electrode, and the source electrode may be continuously influenced by the parasitic capacitance have. Therefore, the current flowing through the source electrode can be changed by the parasitic capacitance, and as a result, a residual image can be generated.

When the pixel 1 of the OLED display including the lower substrate 110 made of a polymer material such as polyimide (PI) is driven after the laser-releasing process, May occur. As a result, the charged particles generated in the lower substrate 110 move upward. Charged particles may affect the active layer, thereby decreasing the reliability of the OLED display.

As shown in FIG. 3, the BSM 130 detects the current drop phenomenon in which the driving current for driving the pixel 1 is lowered due to the charge flowing into the channel of some of the transistors, Can be solved.

Also, the BSM 130 may be formed using a molybdenum (Mo) material.

An active buffer layer 120b surrounding the BSM 130 and protecting the active layer 140 of some of the transistors is formed on the buffer layer 120a. The active buffer layer 120b may be formed of the same material as the buffer layer 120a.

An active layer 140 of some transistors is formed on the active buffer layer 120b. When some of the transistors are the driving transistors DT, it is desirable to have a characteristic suitable for performing high-speed driving processing. For example, the driving transistor DT may include a P-MOS or N-MOS type transistor, or a C-MOS type transistor including both of them. The P-MOS, N-MOS and / or C-MOS type transistors preferably include a polycrystalline semiconductor material such as poly-silicon. Further, as shown in Fig. 2, the active layer 140 may be an active layer of the light emission control transistor ST3 and the first switching transistor ST1.

In addition, it is preferable that the transistor has a top-gate structure. Impurities (ions) are injected into the active layer 140 to define a doped region including a source region SA and a drain region DA having a conducting property, and the other region is a channel region CHA. The source region SA and the drain region DA each include a high density doping area (HDD) and a low density doping area (LDD).

The source electrode of the emission control transistor ST3 and the drain electrode of the driving transistor DT are electrically connected to each other by a contact (not shown) in the doped region of the active layer 140. [ The contacted area may be the first node (node1).

Then, a gate insulating film 150 is deposited on the entire surface of the substrate 110 on which the active layer 140 is disposed. The gate insulating film 150 may be formed of silicon nitride (SiNx) or silicon oxide (SiOx). In the case of the gate insulating film 150, it is preferable that the gate insulating film 150 has a thickness of about 1,000 ANGSTROM to 1,500 ANGSTROM considering the stability and characteristics of the device. When the gate insulating film 150 is formed of silicon nitride (SiNx), a large amount of hydrogen may be contained in the gate insulating film 150 in the manufacturing process. These hydrogen atoms may diffuse to the outside of the gate insulating film 150 in a subsequent process, and the gate insulating film 150 is preferably formed of a silicon oxide (SiOx) material.

Then, on the gate insulating film 150, a gate electrode 160a of the driving transistor DT is formed. The gate electrode 160a is disposed so as to overlap the central portion of the active layer 140 of the driving transistor DT. In addition, the gate electrode 160a may be formed of the same material as the BSM 130. A light emission control signal transmission line (EML, 160b) for transmitting a signal to the gate electrode of the emission control transistor ST3 and a first scan signal transmission Lines SCL1 and 160c are formed.

Referring to FIG. 3, the first scan signal transmission line 160c is spaced apart from the first node (node1). As a result, a parasitic capacitor having a very small value is generated between the gate electrode of the first switching transistor and the first node (node1), so that the driving transistor DT for driving the pixel 1 can minimize current fluctuation. Therefore, the change in luminance of the organic light emitting diode display according to the embodiment of the present invention can be minimized to ensure reliability.

Next, a first intermediate insulating film 170a is deposited on the entire surface of the substrate 110 on which the gate electrode 160a is formed. In particular, the first intermediate insulating film 170a preferably has a structure of a bilayer or more layer in which a nitride film (SIN) containing silicon nitride (SiNx) and an oxide film (SIO) containing silicon oxide (SiOx) are sequentially deposited. Here, as a minimum component for the sake of convenience, a bilayer structure in which an oxide film (SIO) is deposited on the nitride film (SIN) will be described.

The nitride film (SIN) diffuses the hydrogen contained therein through a subsequent heat treatment process to deposit the active layer 140 of the driving transistor DT including the polycrystalline silicon for performing the hydrogenation treatment. On the other hand, the oxide film SIO is deposited to prevent hydrogen released from the nitride film (SIN) from diffusing too much into the semiconductor material of another transistor by a subsequent heat treatment process.

For example, it is preferable that hydrogen emitted from the nitride film (SIN) is diffused into the active layer 140 of the driving transistor DT disposed below the gate insulating film 150 therebetween. Therefore, the nitride film (SIN) is preferably deposited directly on the gate insulating film 150. Therefore, it is preferable to deposit an oxide film (SIO) on the nitride film (SIN). Considering the manufacturing process, it is preferable that the total thickness of the first intermediate insulating film 170a has a thickness of 2,000 to 6,000 ANGSTROM. Therefore, it is preferable that the thickness of each of the nitride film (SIN) and the oxide film (SIO) is 1,000 ANGSTROM to 3,000 ANGSTROM. Further, hydrogen in the nitride film SIN can be diffused to a large extent into the active layer of the driving transistor DT. Particularly, the oxide film SIO is for controlling the degree of diffusion of hydrogen emitted from the nitride film SIN, and the thickness of the oxide film SIO is preferably thicker than the gate insulating film 150. [

Then, a dummy metal pattern 180 is formed on the upper surface of the first intermediate insulating film 170a. The dummy metal pattern 180 overlaps with the gate electrode 160a of the driving transistor DT and has a large area. In addition, the dummy metal pattern 180 generates the storage capacitor Cst together with the gate electrode 160a. The storage capacitor Cst uses the dummy metal pattern 180 having a large area to increase the capacitance of the storage capacitor Cst and can be utilized in an organic light emitting display device requiring high resolution.

Next, a second intermediate insulating film 170b is formed on the entire surface of the first intermediate insulating film 170a. The second intermediate insulating film 170b may be formed of the same material as the first intermediate insulating film 170a. The second intermediate insulating film 170b is formed to cover the dummy metal pattern 180. [

Finally, referring to FIG. 3, a high-potential voltage supply line VDD_L 190 for supplying a high-potential voltage to the drain electrode of the driving transistor DT is formed on the second intermediate insulating film 170b. The high potential voltage supply line 190 may be electrically connected to the dummy metal pattern 180 through a contact hole. As a result, the dummy metal pattern 180 can serve as one electrode of the storage capacitor Cst. The high voltage supply line 190 may also be electrically connected to the BSM 130. As a result, the BSM 130 can prevent the charge of the transistor from being trapped in the buffer 120a.

An organic light emitting display according to an embodiment of the present invention includes an organic light emitting device, a driving transistor DT electrically connected to the organic light emitting device for applying a voltage to the organic light emitting device, 1 switching transistor ST1.

The organic light emitting diode display includes a first switching transistor SCL1 extending in one direction and a first node connected to the driving transistor, the first switching transistor transmitting a turn-on voltage to the first switching transistor, An emission control signal transmission line (EML) which transmits a turn-on voltage to the emission control transistor and extends in the same direction as the first signal transmission line, and a turn- On voltage and a second signal transmission line (L2) extending in the same direction as the first signal transmission line.

Further, the organic light emitting display device is characterized in that the first signal transmission line is located between the driving transistor and the emission control signal transmission line.

According to another aspect of the present invention, a driving transistor of an organic light emitting display includes an active layer, a gate insulating layer positioned on an upper surface of the active layer, a gate electrode positioned on an upper surface of the gate insulating layer, And a dummy metal electrode located on the upper surface of the insulating layer.

According to another aspect of the present invention, an organic light emitting display has a portion of the active layer extending in one direction, and a portion of the active layer has a property of conducting by ion implantation.

According to another aspect of the present invention, an organic light emitting display has a portion of the active layer as a first node.

According to another aspect of the present invention, in the organic light emitting diode display, the first signal transmission line and the emission control signal transmission line are flush with the gate electrode of the driving transistor.

According to another aspect of the present invention, an OLED display further includes a storage capacitor formed between a second node extending in one direction in the gate electrode of the driving transistor and the dummy metal electrode.

According to another aspect of the present invention, a dummy metal electrode of the organic light emitting diode display may be connected to a third node extending in one direction from a source electrode of the driving transistor to constitute one electrode of the storage capacitor.

According to another aspect of the present invention, the OLED display further includes a BSM electrode electrically connected to the first signal transmission line through the contact hole.

According to another aspect of the present invention, the BSM electrode of the organic light emitting display is electrically connected to a third node extending in one direction from a source electrode of the driving transistor.

According to another aspect of the present invention, in the organic light emitting display, the driving transistor and the light emission control transistor are electrically connected by the first node.

According to another aspect of the present invention, in the organic light emitting display, the distance between the first signal transmission line and the first node is longer than the distance between the emission control signal transmission line and the first node. As a result, the parasitic capacitor value existing between the first signal transmission line and the first node can be minimized.

An OLED display according to an exemplary embodiment of the present invention includes a first switching transistor for supplying a data voltage applied from the outside to a gate electrode of a driving transistor, a second switching transistor connected to the driving transistor and controlling an electrical connection with the high- 3 switching transistor, a first signal transmission line connected to the gate electrode of the first switching transistor and controlling the turn-on of the first switching transistor, a second signal transmission line connected to the gate electrode of the third switching transistor, Wherein the first signal transmission line is connected to the first node in one plane, and the first node is connected to the first node through which the driving transistor and the active layer of the third switching transistor are extended and connected to each other, The first signal transmission line and the first node, The transmission line is characterized in that the is arranged.

According to another aspect of the present invention, in the organic light emitting display, the spaced arrangement of the first signal transmission line and the first node can minimize parasitic capacitor generation.

According to another aspect of the present invention, in the organic light emitting display, the parasitic capacitor can change the gate-source voltage (Vgs) of the driving transistor.

According to another aspect of the present invention, an organic light emitting display further includes a second node extending from a gate electrode of the driving transistor and coplanar with a gate electrode of the driving transistor.

According to another aspect of the present invention, the organic light emitting display further includes a dummy electrode located on the upper surface of the second node and constituting an electrode of the storage capacitor together with the second node.

According to another aspect of the present invention, the organic light emitting display further includes a first switching transistor and an antistatic electrode formed on a lower surface of the driving transistor, except for a third switching transistor.

According to another aspect of the present invention, an organic light emitting display further includes a third node extending from a source electrode of the driving transistor and coplanar with a source electrode of the driving transistor.

According to another aspect of the present invention, the organic light emitting display further includes a second switching transistor electrically connected to the third node and turned on by a signal applied through the second signal transmission line.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the general inventive concept as defined by the appended claims and their equivalents. Will be clear to those who have knowledge of.

1: pixel 2: display panel
3: Data driver 4: Gate driver
5: timing controller 110: lower substrate
120a: buffer layer 120b: active buffer layer
130: BSM 140: active layer
150: gate insulating film 160a: gate electrode
160b: emission control signal transmission line 160c: first scan signal transmission line
170a: first intermediate insulating layer 170b: second intermediate insulating layer
180: dummy metal pattern 190: high potential voltage supply line
Cst: storage capacitor ST1: first switching transistor
ST2: second switching transistor ST3: third switching transistor
DT: driving transistor node 1: first node

Claims (19)

An organic light emitting element;
A driving transistor DT electrically connected to the organic light emitting element and applying a voltage to the organic light emitting element;
A first switching transistor (ST1) for controlling the turn-on of the driving transistor;
A first signal transmission line (SCAN1) transmitting a turn-on voltage to the first switching transistor and extending in one direction;
A light emitting control transistor ST3 having a first node connected to the driving transistor and controlling light emission of the organic light emitting element;
An emission control signal transmission line (EML) transmitting a turn-on voltage to the emission control transistor and extending in the same direction as the first signal transmission line; And
And a second signal transmission line (SCL2) transmitting a turn-on voltage of the second switching transistor and extending in the same direction as the first signal transmission line,
And the emission control signal transmission line is located between the driving transistor and the first signal transmission line. The method according to claim 1,
The driving transistor
Active layer,
A gate insulating layer located on the upper surface of the active layer,
A gate electrode located on an upper surface of the gate insulating layer,
An intermediate insulating layer located on the upper surface of the gate electrode,
And a dummy metal electrode located on the upper surface of the intermediate insulating layer. 3. The method of claim 2,
Wherein a portion of the active layer extends in one direction, and a portion of the active layer has a conductivity property by ion implantation. The method of claim 3,
And a part of the active layer is the first node. 3. The method of claim 2,
Wherein the first signal transmission line and the emission control signal transmission line are flush with the gate electrode of the driving transistor. 3. The method of claim 2,
Further comprising a storage capacitor formed between the dummy metal electrode and a second node extending in one direction in the gate electrode of the driving transistor. The method according to claim 6,
Wherein the dummy metal electrode is connected to a third node extending in one direction from a source electrode of the driving transistor, and is formed as one electrode of the storage capacitor. The method according to claim 1,
And a BSM electrode electrically connected to the first signal transmission line through a contact hole. 9. The method of claim 8,
And the BSM electrode is electrically connected to a third node extending in one direction from a source electrode of the driving transistor. The method according to claim 1,
And the driving transistor and the emission control transistor are electrically connected by the first node. The method according to claim 1,
Wherein a distance between the first signal transmission line and the first node is longer than a distance between the emission control signal transmission line and the first node and a parasitic path between the first signal transmission line and the first node Wherein the capacitor value is minimized. A first switching transistor ST1 for supplying a data voltage applied from the outside to the gate electrode of the driving transistor;
A third switching transistor (ST3) connected to the driving transistor for controlling an electrical connection between the high-potential voltage transmission line and the driving transistor;
A first signal transmission line (SCL1) connected to the gate electrode of the first switching transistor and controlling the turn-on of the first switching transistor;
An emission control signal transmission line (EML) connected to a gate electrode of the third switching transistor and controlling the turn-on of the third switching transistor; And
And a first node in which an active layer of the driving transistor and the third switching transistor are extended and connected to each other,
Wherein the emission control signal transmission line is disposed between the first node and the first signal transmission line such that the first signal transmission line is as far as possible from the first node on one plane. 13. The method of claim 12,
Wherein a spaced apart arrangement of the first signal transmission line and the first node minimizes parasitic capacitor generation. 14. The method of claim 13,
Wherein the parasitic capacitor changes a gate-source voltage (Vgs) of the driving transistor. 13. The method of claim 12,
And a second node extending from the gate electrode of the driving transistor and formed on the same plane as the gate electrode of the driving transistor. 16. The method of claim 15,
Further comprising a dummy electrode located on the upper surface of the second node and constituting an electrode of the storage capacitor together with the second node. 15. The method of claim 14,
Further comprising an antistatic electrode formed on a bottom surface of the first switching transistor and the driving transistor, except for the third switching transistor. 13. The method of claim 12,
And a third node extending from a source electrode of the driving transistor and formed on the same plane as the source electrode of the driving transistor. 19. The method of claim 18,
And a second switching transistor electrically connected to the third node and turned on by a signal applied through a second signal transmission line.

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