KR20170079570A - Array substrate and display device having the same - Google Patents

Abstract

In the display device of the present invention, static electricity generated at the edge of the array substrate can be first introduced into the dummy wiring. Further, the display device of the present invention can flow the static electricity to the ground wiring after lowering the energy through the discharge part. Therefore, the present invention lowers the maximum energy using the discharged static electricity by the discharge part, so that the damage of the circuit parts of the display device connected to the ground wiring can be prevented.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an array substrate,

The present invention relates to an electrostatic protection structure provided on an array substrate of a display device.

Information and electronic devices realize high-resolution, high-quality images such as portable telephones (mobile phones), notebooks, computers, and portable devices such as HDTVs. As information electronic devices are developed, there is an increasing demand for flat panel display devices applied thereto. As such flat panel display devices, a liquid crystal display (LCD), a plasma display panel (PDP), a field emission display (FED), and an organic light emitting diode (OLED) have been actively studied. However, liquid crystal displays (LCDs) are now in the spotlight because of mass production technology, ease of driving means, realization of high image quality, and realization of a large area screen.

A liquid crystal display device includes a liquid crystal display panel, a data driving circuit, a gate driving circuit, and a timing controller. The data driving circuit supplies data to the data lines of the liquid crystal display panel. The gate driving circuit supplies a gate pulse to the gate line of the liquid crystal display panel. The timing controller controls the data driving circuit and the gate driving circuit. Such a liquid crystal display device generally has a gate and a data driver circuit formed in the form of an integrated circuit and attached to a liquid crystal display panel such as TCP or COF tape. As a result, the number of parts is increased and the process cost is increased due to an increase in the number of parts, resulting in a problem of weight reduction and miniaturization of the liquid crystal display device. Therefore, a GIP (Gate Driver-IC in panel) type liquid crystal display device in which a gate drive circuit is formed on a liquid crystal display panel has been proposed.

In a liquid crystal display device having an integrated circuit, a data driver circuit is formed in a chip form and attached to a liquid crystal display panel such as TCP or COF tape. In the liquid crystal display device provided with the built-in circuit, a plurality of gates and data lines defining liquid crystal cells are formed to intersect with each other in the display region of the liquid crystal display panel. And a gate driving circuit of a GIP system composed of a plurality of thin film transistors is provided outside the display area.

1 is a view showing a conventional array substrate.

The display device as described above includes an array substrate 10 including a display area A / A in which an image is output and non-display areas 11, 12, 13, and 14 outside the display area. The array substrate 10 includes a data driving circuit (not shown) for supplying a data voltage to a data line DL disposed in the display area A / A. In addition, the array substrate 10 includes gate drive circuits 20a and 20b for supplying a scan signal to a gate line GL disposed in the display area A / A. The gate drive circuits 20a and 20b are gates which are mounted in the second non-display area 12 and the third non-display area 14 of the array substrate 10, Panel (Gate In Panel: GIP) method. Also, the ground wiring 30 may be disposed in the first to fourth non-display areas 11, 12, 13, and 14 of the array substrate 10. The ground wiring 30 is disposed at the edge of the panel 10 rather than the gate driving circuits 20a and 20b.

In electronic products, electrostatic discharge (ESD) is generally occurring.

The static electricity can easily flow into the ground wiring 30 disposed at the edge of the array substrate 10 when static electricity is generated in the array substrate 10 of the conventional display device. In this case, the gate drive circuits 20a and 20b disposed adjacent to the ground wiring 30 have a problem in that they are damaged due to static electricity. In addition, the ground line 30 may be connected to other circuit components through the pad 40. Therefore, the static electricity introduced into the ground wiring 30 may cause damage to other circuit components connected to the pad 40.

An object of the present invention is to provide a display device in which the influence of static electricity introduced into a ground wiring to a gate drive circuit is reduced.

It is another object of the present invention to provide a display device capable of preventing static electricity from flowing through a discharging part of a high energy and lowering the energy of static electricity to prevent damage to circuit parts of the display device.

It is still another object of the present invention to provide a display device capable of protecting a circuit component of a display device from static electricity, regardless of the polarity of the static electricity.

There is provided an array substrate including a ground wiring to which a ground signal is applied, a dummy wiring arranged outside the ground wiring, and a discharge portion including at least one diode and connecting the ground wiring and the dummy wiring . Therefore, according to the present invention, since the static electricity having flowed into the dummy wiring at high energy instantaneously is discharged to the ground wiring line by lowering the energy of the static electricity by using the discharge unit, it is possible to prevent the damage of the circuit component of the display device connected to the ground wiring line.

According to the present invention, since the ground wiring is spaced apart from the gate driving circuit in the prior art, the influence of the static electricity introduced into the ground wiring reduces the influence on the gate driving circuit.

Further, in the present invention, the static electricity can be introduced before the ground wiring due to the dummy wiring.

In addition, the present invention can prevent the damage of the circuit components of the display device connected to the ground wiring, since the static electricity that has flowed into the dummy wiring at a high energy instantaneously is discharged to the ground wiring line by lowering the energy of the static electricity by using the discharge unit.

Further, in the present invention, even if any one of a plurality of diodes included in the discharge unit is damaged when static electricity is input, the remaining diodes operate normally, so that the circuit component of the display device can be protected from static electricity.

Further, the present invention can protect the circuit components of the display device from static electricity that flows, regardless of the polarity of the static electricity.

Further, the present invention can use the process of the conventional display device when disposing the discharge portion, so that no additional process and cost are incurred.

1 is a view showing a conventional array substrate.
2 is a block diagram of a display device including an array substrate according to an embodiment of the present invention.
3 is a schematic view of a display device to which an array substrate according to an embodiment of the present invention is applied.
4 is a configuration diagram of an embodiment of a dummy wiring and a discharge unit arranged in a display device according to an embodiment of the present invention.
5 is a view illustrating a discharge unit according to an embodiment of the present invention.
6 is a view illustrating a discharge unit according to another embodiment of the present invention.

The following embodiments are provided by way of example so that those skilled in the art can fully understand the spirit of the present invention. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. Like reference numerals designate like elements throughout the specification.

BRIEF DESCRIPTION OF THE DRAWINGS The advantages and features of the present invention and the manner of achieving them will become apparent with reference to the embodiments described in detail below with reference to the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but may be embodied in various forms. In addition, the present embodiments are provided so that the disclosure of the present invention is complete and that those skilled in the art will fully understand the scope of the present invention. Further, the present invention is only defined by the scope of the claims. Like reference numerals refer to like elements throughout the specification. The dimensions and relative sizes of the layers and regions in the figures may be exaggerated for clarity of illustration.

It will be understood that when an element or layer is referred to as being another element or "on" or "on ", it includes both intervening layers or other elements in the middle, do. On the other hand, when a device is referred to as "directly on" or "directly above ", it does not intervene another device or layer in the middle.

The terms spatially relative, "below," "lower," "above," "upper," and the like, And may be used to easily describe the correlation with other elements or components. Spatially relative terms should be understood to include, in addition to the orientation shown in the drawings, terms that include different orientations of the device during use or operation. For example, when inverting an element shown in the figures, an element described as "below" or "beneath" of another element may be placed "above" another element. Thus, the exemplary term "below" can include both downward and upward directions.

The terminology used herein is for the purpose of describing embodiments only and is not intended to be limiting of the invention. In the present specification, the singular form includes plural forms unless otherwise specified in the specification. &Quot; comprise "and / or" comprising ", as used in the specification, means that the presence of stated elements, Or additions.

FIG. 2 is a block diagram of a display apparatus including an array substrate according to an embodiment of the present invention, and FIG. 3 is a schematic diagram of a display apparatus to which an array substrate according to an embodiment of the present invention is applied.

2, the display device of the present invention includes a display panel including an array substrate 100 and an upper substrate 1000, a timing controller 400, first and second gate driving circuits 200a and 200b ), A data driving circuit 300, and an electrostatic protection area (A). The timing controller 400 can generate various control signals by receiving a timing signal from an external system. The first and second gate driving circuits 200a and 200b and the data driving circuit 300 can control the array substrate 100 in response to a control signal of the timing controller 400. [ The electrostatic protection area A may be disposed in the first to fourth non-display areas 110 to 140 of the array substrate 100. The electrostatic protection area A may include a ground wiring 500 and a dummy wiring 700 and a discharger 800 to protect the display device from static electricity.

The array substrate 100 intersects the gate lines GL 1 to GL n and the data lines DL 1 to DL m in a matrix form on a substrate using a glass and defines a plurality of pixels at intersections . Each pixel is provided with a thin film transistor (TFT), a liquid crystal capacitor Clc and a storage capacitor Cst, and all the pixels form one display area A / A. The area where the pixel is not defined is divided into the first to fourth non-display areas 110 to 140. The first and second gate driving circuits 200a and 200b may be disposed in the second and fourth non-display areas 120 and 140, and the first to fourth non- The protection area A can be disposed.

The timing controller 400 outputs a timing signal such as a video signal RGB transmitted from an external system and a clock signal DCLK, a horizontal synchronization signal Hsync, a vertical synchronization signal Vsync, and a data enable signal DE And generates control signals for the first and second gate driving circuits 200a and 200b and the data driving circuit 300. [

Here, the horizontal synchronization signal Hsync is a signal indicating the time taken to display one horizontal line of the screen, and the vertical synchronization signal Vsync is a signal indicating the time taken to display a frame of one frame. The data enable signal DE is a signal indicating a period during which the data voltage is supplied to the pixel defined in the array substrate 100.

Meanwhile, the timing controller 400 is designed to receive image-related signals and timing signals output therefrom through a predetermined interface with an external system at a high speed without noise. Such interfaces include a low voltage differential signal (LVDS) method or a transistor-transistor logic (TTL) interface method.

The timing controller 400 generates the control signal GCS of the first and second gate driving circuits 200a and 200b and the control signal DCS of the data driving circuit 300 in synchronization with the input timing signal .

In addition, the timing controller 400 generates a plurality of clock signals for determining the driving timings of the respective stages of the first and second gate driving circuits 200a and 200b, and the first and second gate driving circuits 200a and 200b ). The timing controller 400 arranges and modulates the received image data (RGB DATA) in a form that the data driving circuit 300 can process. Here, the aligned image data may be a form in which a color coordinate correction algorithm for improving image quality is applied. The control signals GCS of the first and second gate driving circuits 200a and 200b may include a gate start pulse, a gate shift clock, a gate output enable signal, .

Next, the data driving circuit 300 generates a sampling signal by shifting a source start pulse (SSP) from the timing controller 400 according to a source shift clock (SSC). Then, the data driving circuit 300 latches the image data input according to the source shift clock SSC in accordance with the sampling signal, and changes the data signal into a data signal. Then, the data driving circuit 300 supplies a data signal to the data lines DL in units of horizontal lines in response to a source output enable (SOE) signal. To this end, the data driving circuit 300 may include a data sampling unit, a latch unit, a digital-analog converting unit, and an output buffer.

Next, the first and second gate driver circuits 200a and 200b are composed of a plurality of stages including shift registers. The first and second gate driving circuits 200a and 200b are connected to a plurality of gate lines GL1 to GLn formed in the liquid crystal panel 100 in response to a gate control signal GCS input from the timing controller 400 It is possible to alternately output the gate high voltage VGH which is a scan pulse. Here, the output gate high voltage VGH may be overlapped during a certain horizontal period. This is for precharging the gate lines GL1 to GLn, so that it is possible to more stably charge the pixel when the data voltage is applied. And supplies the gate line voltage VGL to the gate lines GL 1 to GL n during the remaining period when the scan pulse of the gate high voltage VGH is not supplied.

Meanwhile, the first and second gate driving circuits 200a and 200b applied to the present invention may be formed independently of the panel, and may be configured to be electrically connected to the panel in various ways. In addition, the first and second gate driving circuits 200a and 200b are formed on the gate-in-panel (not shown) on the second and fourth non-display areas 120 and 140 in the form of a thin film pattern during the manufacture of the array substrate 100 Gate-In-Panel (GIP) method. In this case, the gate control signal GCS for controlling the first and second gate driving circuits 200a and 200b includes the clock signal CLK and the gate start signal Gate for driving the first driven stage of the shift register Start Pulse VST).

The electrostatic protection area A may include a ground wiring 500, a dummy wiring 700, and a discharging part 800. The electrostatic protection area A is a part of circuit components connected to the first and second gate driving circuits 200a and 200b and the ground wiring 500 through the pads 600 from the static electricity generated in the array substrate 100 Damage can be prevented.

3, a display panel of a display device according to an embodiment of the present invention includes an array substrate 100 of various embodiments, an upper substrate 1000 facing the array substrate 100, 100, and 1000, respectively. The upper substrate 1000 may include a color filter corresponding to the pixels. The configuration of the upper substrate 1000 and the like may be changed into various forms known in the art.

4 is a configuration diagram of an embodiment of a dummy wiring and a discharge unit arranged in a display device according to an embodiment of the present invention.

4, the array substrate 100 according to the present invention includes a display region 100 in which pixels are arranged for each region defined by the intersection of the gate lines GL 1 to GL n and the data lines DL 1 to DL m, (Active Area) (A / A). The array substrate 100 of the present invention is disposed on both sides of the second and fourth non-display regions 120 and 140 and is connected to the gate lines GL 1 to GL n of the display region A / And a first and a second gate driving circuits 200a and 200b for providing a scan signal to the scan lines. The array substrate 100 of the present invention is disposed outside the first and second gate driving circuits 200a of the first to fourth non-display areas 110 to 140, And a ground wiring 500 connected to the first and second gate driving circuits 200a and 200b. In addition, the array substrate 100 of the present invention includes dummy wirings 700 disposed outside the ground wirings 500 among the first to fourth non-display areas 110 to 140. The array substrate 100 of the present invention includes one or more diodes and includes a discharge unit 800 connecting the ground line 500 and the dummy line 700 and a plurality of pads 600. The non-display area is an area other than the display area (A / A). Specifically, the non-display region may include first to fourth non-display regions 110 to 140.

The gate drive circuit may be disposed on one side or both sides of the non-display area. Specifically, if the number of the gate driving circuits is one, the gate driving circuit can be disposed on one side of the second non-display area 120. [ When the number of the gate driving circuits is two, the first gate driving circuit 200a is arranged in the second non-display area 120 and the second gate driving circuit 200b is arranged in the fourth non-display area 140 . In addition, the gate driving circuit may be disposed on the array substrate 100. Therefore, the arrangement of the gate driving circuit may be changed according to the scheme of providing the scan signal of the gate driving circuit, so that the present invention is not limited to this.

The ground line 500 may be connected to the display area A / A and the first and second gate driving circuits 200a and 200b to provide a ground signal GND. The ground wiring 500 may be disposed on the array substrate 100. The ground line 500 may be disposed outside the gate driving circuits 200a and 200b and may be disposed apart from the first and second gate driving circuits 200a and 200b. Specifically, the ground wiring 500 is disposed in the first non-display area and connected to the pad 600, and is the second to fourth non-display areas, and the first and second gate driving circuits and the display area A / A < / RTI > Therefore, since the ground wiring is spaced apart from the gate driving circuit in the present invention, the influence of the static electricity introduced into the ground wiring reduces the influence on the gate driving circuit.

The plurality of pads 600 may be used to connect circuit components or a plurality of wirings arranged in the array substrate 100 to circuit components or a plurality of wirings other than the array substrate 100. The plurality of pads 600 may be disposed in the first non-display region 110.

The dummy wiring 700 is located at the outermost one of the signal wirings of the array substrate 100, and static electricity flows first. The dummy wiring 700 may be disposed on the array substrate 100. The dummy wiring 700 may be disposed outside the ground wiring 500 and may be connected to the ground wiring 500 through the discharging unit 800. More specifically, the dummy wiring 700 is a first to a fourth non-display region and is connected to the display region A / A, the first and second gate driver circuits 200a and 200b, and the ground wiring 500 And can be disposed at the outer periphery.

The dummy wiring 700 may be made of the same material as the ground wiring 500 or may be made of a material having a higher conductivity than the ground wiring 500. Therefore, the dummy wiring 700 can be supplied with static electricity before the ground wiring 500. The dummy wiring 700 may be disposed on the same layer as the ground wiring 500. The dummy wiring of the present invention may be a material for allowing static electricity to flow first than the ground wiring, or it may be a configuration, so that the material and arrangement of the dummy wiring are not limited to the embodiments.

The discharge unit 800 includes one or more diodes and uses the diode to lower the energy of the static electricity flowing into the dummy wiring 700 to flow to the ground wiring 500. That is, the discharger 800 causes the static electricity having a momentally high potential difference to pass through the diode from the dummy wiring 700. The diode causes static electricity having a potential difference within the saturation region of the diode to flow, thereby lowering the energy of the static electricity flowing to the ground line 500. Therefore, the present invention can prevent the damage of the circuit components of the display device connected to the ground wiring, since the static electricity, which has momentarily entered with a high energy, is flowed to the ground wiring by lowering the energy of the static electricity using the discharge part.

Also, the discharge unit 800 may be a plurality of discharge units. That is, the discharge unit 800 may be disposed in only a part of the first to fourth non-display areas 110 to 140, and may be disposed in all of the first to fourth non-display areas 110 to 140 . The discharge unit 800 may be arranged to connect the dummy wiring 700 with the appropriate number or the ground wiring 500 corresponding to the size of the display panel 100. The present invention is not limited to the embodiment.

5 is a view illustrating a discharge unit according to an embodiment of the present invention.

Referring to FIG. 5, the discharge unit 800 of one embodiment may arrange a plurality of diodes in parallel. More specifically, the discharge unit 800 may include a plurality of diodes connected in parallel to the ground wiring 500 and the dummy wiring 700. Therefore, the present invention can protect the circuit component of the display device from static electricity because the remaining diodes of the plurality of diodes included in the discharge unit are damaged when the static electricity is damaged.

The plurality of diodes of the discharge unit 800 may be connected to the ground wiring 500 and the dummy wiring 700 in the forward and reverse directions. More specifically, the first diode (D1) of the plurality of diodes may connect the ground wiring line (500) and the dummy wiring line (700) in a forward direction. That is, the first diode D1 may be connected to the dummy wiring line 700 in the forward direction and may be connected to the ground wiring line 500 in the reverse direction. Therefore, when positive (+) static electricity flows into the dummy wiring line 700, static electricity flows to the ground wiring line 500 through the first diode Dl. The second diode D2 of the plurality of diodes may connect the ground wiring 500 and the dummy wiring 700 in a reverse direction. The ground line 500 of the second diode D2 may be connected in a forward direction and the dummy wiring 700 may be connected in a reverse direction. Therefore, when negative (negative) static electricity flows into the dummy wiring 700, static electricity flows to the ground wiring 500 through the second diode D2. Therefore, the present invention can protect the circuit component of the display device from the static electricity that flows, regardless of the polarity of the static electricity.

6 is a view illustrating a discharge unit according to another embodiment of the present invention.

Referring to FIG. 6, the discharge unit 900 of another embodiment can arrange a plurality of transistors in parallel. In other words, the discharger 900 of another embodiment can arrange a plurality of diodes of the discharger 800 according to an embodiment by a plurality of transistors. In more detail, the discharge unit 900 may include a plurality of transistors connected in parallel to the ground wiring 500 and the dummy wiring 700. Thus, the present invention can protect the circuit components of the display device from static electricity because the remaining transistors among the plurality of transistors included in the discharge portion are damaged when the static electricity is damaged.

The plurality of transistors of the discharge unit 800 may be connected to the ground line 500 and the dummy line 700 in the forward and reverse directions in a diode connection manner. More specifically, the first transistor (T1) of the plurality of transistors may be connected in a forward direction. That is, the drain terminal 700 and the drain terminal and the gate terminal of the first transistor T1 are connected to each other, and the ground line 500 and the source terminal are connected to each other. Therefore, when positive (+) static electricity flows into the dummy wiring line 700, static electricity flows to the ground wiring line 500 through the first transistor T1. In addition, the second transistor (T2) of the plurality of transistors may be connected in a reverse direction. That is, the ground line 500 of the second transistor T2 may be connected to a drain terminal and a gate terminal, and the dummy wiring 700 may be connected to a source terminal. Therefore, when a negative (negative) static electricity flows into the dummy wiring 700, the static electricity flows to the ground wiring 500 through the second transistor T2. Therefore, the present invention can protect the circuit component of the display device from the static electricity that flows, regardless of the polarity of the static electricity.

The plurality of transistors T1 and T2 may be the same material as the transistors disposed in the pixels of the display panel 100 and may be disposed in the same layer. That is, the plurality of transistors T1 and T2 may be disposed in the same process as the transistor of the pixel. Therefore, the present invention can use the process of the conventional display device when disposing the discharge portion, so that no additional process and cost are incurred.

Therefore, in the present invention, since the ground wiring is spaced apart from the gate driving circuit in the prior art, the influence on the gate driving circuit due to the static electricity introduced into the ground wiring is reduced.

Further, in the present invention, the static electricity can be introduced before the ground wiring due to the dummy wiring.

In addition, the present invention can prevent the damage of the circuit components of the display device connected to the ground wiring, since the static electricity that has flowed into the dummy wiring at a high energy instantaneously is discharged to the ground wiring line by lowering the energy of the static electricity by using the discharge unit.

Further, in the present invention, even if any one of a plurality of diodes included in the discharge unit is damaged when static electricity is input, the remaining diodes operate normally, so that the circuit component of the display device can be protected from static electricity.

Further, the present invention can protect the circuit components of the display device from static electricity that flows, regardless of the polarity of the static electricity.

Further, the present invention can use the process of the conventional display device when disposing the discharge portion, so that no additional process and cost are incurred.

The foregoing description of the preferred embodiments of the present invention has been provided for the purposes of illustration and description. However, those skilled in the art will appreciate that various modifications, additions and substitutions are possible, without departing from the scope and spirit of the invention as disclosed in the accompanying claims. It can be understood that. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims.

10 Conventional display panel
100 display panel
110 to 140 First to fourth non-display areas
200 gate drive circuit
300 data drive circuit
400 timing controller
500 ground wiring
600 pads
700 dummy wiring
800 full charge

Claims (12)

A ground wiring to which a ground signal is applied;
A dummy wiring disposed outside the ground wiring; And
And a discharging portion including at least one diode and connecting the ground wiring and the dummy wiring. The method according to claim 1,
Wherein the discharge unit includes a plurality of diodes arranged in parallel. 3. The method of claim 2,
Wherein the plurality of diodes include a first diode for connecting the ground wiring and the dummy wiring in a forward direction, and a second diode for connecting the ground wiring and the dummy wiring in a reverse direction. The method according to claim 1,
Wherein the diode is a transistor. The method according to claim 1,
Wherein the dummy wiring and the ground wiring are made of the same material. 5. The method of claim 4,
Wherein the diode and the transistor disposed in the pixel are the same material and are disposed on the same layer. A display panel including an array substrate including pixels defined by intersecting gate lines and data lines, and an upper substrate disposed opposite the array substrate;
And
A gate driver circuit for providing a scan signal to the gate lines; a timing controller for providing a control signal for the data driver circuit and a control signal for the gate driver circuit; And a driving unit,
Wherein the array substrate includes a ground wiring to which a ground signal is applied, a dummy wiring disposed outside the ground wiring, and a discharge portion including at least one diode and connecting the ground wiring and the dummy wiring. 8. The method of claim 7,
Wherein the discharge unit arranges a plurality of diodes in parallel. 9. The method of claim 8,
Wherein the plurality of diodes includes a first diode that connects the ground wiring and the dummy wiring in a forward direction, and a second diode that connects the ground wiring and the dummy wiring in opposite directions. 8. The method of claim 7,
Wherein the diode is a transistor. 8. The method of claim 7,
Wherein the dummy wiring and the ground wiring are made of the same material. 11. The method of claim 10,
Wherein the diode and the transistor disposed in the pixel are the same material and are disposed on the same layer.

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