KR20170047199A - Solar cell module - Google Patents

Abstract

The present invention relates to a solar cell module. The solar cell module according to an exemplary embodiment of the present invention includes a plurality of solar cells including a semiconductor substrate, an emitter part forming p-n junction with the semiconductor substrate, a first electrode connected to the emitter part and a second electrode connected to the rear surface of the semiconductor substrate; and a plurality of interconnectors connected to the first electrode or the second electrode to electrically connect the plurality of solar cells to each other in series. The number of the plurality of interconnectors connected to the first electrode or the second electrode provided in one solar cell in each of the plurality of solar cells is between 10 and 18. So, the solar cell module having improved photoelectric conversion efficiency can be provided.

Description

Solar cell module {SOLAR CELL MODULE}

The present invention relates to a solar cell module.

Recently, as energy resources such as oil and coal are expected to be depleted, interest in alternative energy to replace them is increasing, and solar cells that produce electric energy from solar energy are attracting attention.

Typical solar cells have a semiconductor portion that forms a p-n junction by different conductive types, such as p-type and n-type, and electrodes connected to semiconductor portions of different conductivity types, respectively.

When light is incident on such a solar cell, a plurality of electron-hole pairs are generated in the semiconductor portion, and the generated electron-hole pairs are separated into electrons and holes, respectively, so that the electrons move toward the n- Type semiconductor portion. The transferred electrons and holes are collected by different electrodes connected to the n-type semiconductor portion and the p-type semiconductor portion, respectively, and electric power is obtained by connecting these electrodes with electric wires.

Such solar cells can be connected to each other by an interconnection.

An object of the present invention is to provide a solar cell module with improved photoelectric conversion efficiency.

A solar cell module according to an exemplary embodiment of the present invention includes a semiconductor substrate, a plurality of solar cells including a semiconductor substrate, an emitter portion forming a pn junction with the semiconductor substrate, a first electrode connected to the emitter portion, ; And a plurality of interconnectors connected to the first electrode or the second electrode for electrically connecting the plurality of solar cells to each other in series, wherein the first electrode or the second electrode provided in one solar cell in each of the plurality of solar cells The number of the plurality of interconnectors connected to the two electrodes is between 10 and 18.

Here, the widths of the plurality of interconnectors may be between 0.24 mm and 0.53 mm, and more preferably, the widths of the plurality of interconnectors may be between 0.3 mm and 0.38 mm.

Here, the plurality of first electrodes may be spaced apart from each other and extended in a first direction.

In addition, each of the plurality of solar cells may not include a bus bar electrode formed to be long in a second direction intersecting the first direction so that the plurality of first electrodes are commonly connected.

The plurality of solar cells may be arranged in a second direction intersecting with the first direction, and the plurality of interconnectors may be connected in series with each other in the second direction.

At this time, the plurality of interconnectors may have a wire shape, and the cross-section of each of the plurality of interconnectors may include a curved surface.

More specifically, the cross section of each of the plurality of interconnectors may be at least one of a circle, an ellipse, a semicircle, a rectangle, or a trapezoid.

Here, the second electrode may include a rear electrode layer positioned on the rear surface of the semiconductor substrate, and the second electrode may include a rear finger on the rear surface of the semiconductor substrate that is located in the same direction as the front finger.

The second electrode may further include a rear bus bar extending in a second direction crossing the front fingers on the rear surface of the semiconductor substrate.

The solar cell module according to the present invention is characterized in that the number of the plurality of interconnectors connected to the first electrode or the second electrode provided in one solar cell is limited to between 10 and 18, And the manufacturing cost of the module can be further reduced.

1 is a view for explaining an example of a solar cell module according to the present invention.
2 is a partial perspective view for explaining an example of a solar cell applied to the solar cell module shown in FIG.
3 is a cross-section along line CS3-CS3 in Fig.
4 is a graph showing the amount of decrease in output of the solar cell module due to the resistance of the interconnector (IC) shown in FIG.
FIG. 5 is a graph simulating the module output according to the remaining power generation area excluding the shading area covered by the interconnector (IC) shown in FIG.
Fig. 6 is a graph showing the relationship between the number (NIC) of interconnectors IC and the number of interconnection ICs when the width WIC of the interconnector IC shown in Fig. 1 is 0.25 mm in order to set the number (NIC) (NIC) of the module output.
Fig. 7 is a graph showing the relationship between the number (IC) of interconnectors (IC) when the width WIC of the interconnector IC shown in Fig. 1 is 0.3 mm in order to set the number NIC of the interconnectors IC according to the present invention. (NIC) of the module output.
Fig. 8 is a graph showing the relationship between the number (NIC) of interconnectors IC and the number of interconnectors IC when the width WIC of the interconnector IC shown in Fig. 1 is 0.2 mm, (NIC) of the module output.
9 is a graph comparing a material ratio and a shadowing area of an interconnector (IC) for setting the number (NIC) of interconnectors (IC) according to the present invention, respectively, with a comparative example.
10 is a graph of a simulation result on the output value of the module according to the width WIC of the interconnector IC when the number NIC of the interconnectors IC shown in FIG. 1 is 11. FIG.
11 is a graph showing simulation results of the output value of the module according to the width WIC of the interconnector IC when the number NIC of the interconnectors IC shown in FIG. 1 is 13. FIG.
12 is a graph of simulation results for output values of modules according to the width WIC of the interconnector IC when the number NIC of interconnectors IC shown in FIG. 1 is 15. FIG.
FIG. 13 is a graph of a simulation result on the output value of the module according to the width WIC of the interconnector IC when the number NIC of interconnectors IC shown in FIG. 1 is 17. FIG.
FIGS. 14 to 16 are views for explaining another example of a solar cell applicable to the solar cell module according to the present invention shown in FIG.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. In order to clearly illustrate the present invention, parts not related to the description are omitted, and similar parts are denoted by like reference characters throughout the specification.

In the drawings, the thickness is enlarged to clearly represent the layers and regions. When a layer, film, region, plate, or the like is referred to as being "on" another portion, it includes not only the case directly above another portion but also the case where there is another portion in between. Conversely, when a part is "directly over" another part, it means that there is no other part in the middle. Further, when a certain portion is formed as "whole" on another portion, it means not only that it is formed on the entire surface of the other portion but also that it is not formed on the edge portion.

Hereinafter, the front surface may be one surface of the semiconductor substrate to which the direct light is incident, and the rear surface may be the opposite surface of the semiconductor substrate in which direct light is not incident, or reflected light other than direct light may be incident.

In the following description, the meaning of two different components having the same length or width means that they are equal to each other within an error range of 10%.

Hereinafter, a solar cell module according to an embodiment of the present invention will be described with reference to the accompanying drawings.

1 (a) is a cross-sectional view of a solar cell module according to the present invention, and FIG. 1 (b) is a cross-sectional view of a solar cell module according to an embodiment of the present invention. (C) is a cross-section along the line CS2-CS2.

FIG. 2 is a partial perspective view for explaining an example of a solar cell applied to the solar cell module shown in FIG. 1, and FIG. 3 is a cross section along the line CS3-CS3 in FIG.

1 (A) to 1 (C), a solar cell module according to the present invention includes a plurality of solar cells C1 and C2, a plurality of interconnectors (not shown) connected to the solar cells C1 and C2, (IC).

As shown in FIGS. 2 and 3, an example of a solar cell applied to the solar cell module according to the present invention includes a semiconductor substrate 110, an emitter section 120, an antireflection film 130, An electrode 140, a back surface field (BSF) 172, and a second electrode 150.

Here, although the rear electric section 172 may be omitted, since the efficiency of the solar cell is further improved when the rear electric section 172 is provided, the following description will be made with reference to an example in which the rear electric section 172 is included.

The semiconductor substrate 110 may have a first conductivity type, for example, a p-type conductivity type. The semiconductor substrate 110 may be formed of any one of single crystal silicon, polycrystalline silicon, and amorphous silicon. In one example, the semiconductor substrate 110 may be formed of a crystalline silicon wafer.

When the semiconductor substrate 110 has a p-type conductivity type, impurity of a trivalent element such as boron (B), gallium, indium, or the like is doped in the semiconductor substrate 110. Alternatively, however, the semiconductor substrate 110 may be of the n-type conductivity type. Impurities of pentavalent elements such as phosphorus (P), arsenic (As), and antimony (Sb) may be doped into the semiconductor substrate 110 when the semiconductor substrate 110 has an n-type conductivity type.

The front surface of the semiconductor substrate 110 has a plurality of uneven surfaces. 2, only the edge portion of the semiconductor substrate 110 is shown as an uneven surface, and the emitter portion 120 placed on the emitter portion is also shown as an uneven surface. However, the entire front surface of the semiconductor substrate 110 substantially has an irregular surface, and thus the emitter section 120 located on the front surface of the semiconductor substrate 110 also has an uneven surface.

The light incident on the front surface of the semiconductor substrate 110 having a plurality of projections and depressions is reflected by the semiconductor substrate 110 while a plurality of reflection operations occur by the plurality of projections and depressions formed on the surface of the emitter section 120 and the semiconductor substrate 110, . As a result, the amount of light reflected from the front surface of the semiconductor substrate 110 decreases, and the amount of light incident into the semiconductor substrate 110 increases. In addition, due to the uneven surface, the surface area of the semiconductor substrate 110 and the emitter section 120 on which light is incident increases, and the amount of light incident on the semiconductor substrate 110 also increases.

As shown in FIGS. 2 and 3, the emitter layer 120 is formed on the entire surface of the semiconductor substrate 110 of the first conductivity type, which is the incident surface, and is of the second conductivity type opposite to the first conductivity type, For example, n-type conductive impurities may be doped in the semiconductor substrate 110 and may be located on the surface where the light is incident, that is, inside the front surface of the semiconductor substrate 110. Thus, the emitter portion 120 of the second conductivity type forms a p-n junction with the first conductive type portion of the semiconductor substrate 110.

Light incident on the semiconductor substrate 110 is separated into electrons and holes, so that the electrons move toward the n-type and the holes move toward the p-type. Therefore, when the semiconductor substrate 110 is p-type and the emitter section 120 is n-type, the separated holes move toward the back surface of the semiconductor substrate 110, and the separated electrons can move toward the emitter section 120.

Since the emitter 120 forms a pn junction with the first conductive portion of the semiconductor substrate 110, that is, the first conductive portion of the semiconductor substrate 110, unlike the present embodiment, the semiconductor substrate 110 has the n- The emitter section 120 may have a p-type conductivity type. In this case, the separated electrons may move toward the back surface of the semiconductor substrate 110, and the separated holes may move toward the emitter section 120.

When the emitter section 120 has an n-type conductivity type, the emitter section 120 may be formed by doping an impurity of a pentavalent element into the semiconductor substrate 110. Conversely, when the emitter section 120 has a p-type conductivity type, And may be formed by doping an impurity of a trivalent element into the semiconductor substrate 110.

2 and 3, when the emitter layer 120 is located on the incident surface of the semiconductor substrate 110, the antireflection layer 130 is formed on the incident surface of the semiconductor substrate 110, The antireflection film 130 may be disposed on the emitter layer 120.

The antireflection film 130 may include a hydrogenated silicon nitride film (SiNx: H), a hydrogenated silicon oxide film (SiOx: H), a hydrogenated silicon nitride oxide film (SiNxOy: H), and a hydrogenated amorphous silicon ). ≪ / RTI >

The antireflection film 130 may have a defect such as a dangling bond mainly present on the surface and the vicinity of the semiconductor substrate 110 due to the hydrogen H contained in the antireflection film 130. [ To pass through a passivation function that reduces the disappearance of the charges moving toward the surface of the semiconductor substrate 110 due to the defects. Therefore, the amount of charges lost at or near the surface of the semiconductor substrate 110 due to a defect is reduced.

When the semiconductor substrate 110 has the irregular surface, the antireflection film 130 has the irregular surface having a plurality of irregularities similar to the semiconductor substrate 110.

Since the defects are mainly present on or near the surface of the semiconductor substrate 110 in general, the passivation function is further improved if the antireflection film 130 is in direct contact with the surface of the semiconductor substrate 110 as in the case of the embodiment.

The antireflection film 130 may be formed of a hydrogenated silicon nitride film (SiNx: H), a hydrogenated silicon oxide film (SiOx: H), a hydrogenated silicon nitride oxide film (SiNxOy: H), a hydrogenated silicon oxynitride film : H), and hydrogenated amorphous silicon (a-Si: H) may be formed of a plurality of layers.

For example, the antireflection film 130 may be formed of a hydrogenated silicon nitride film (SiNx: H) in two layers.

By doing so, the passivation function of the antireflection film 130 can be further enhanced, and the photoelectric efficiency of the solar cell can be further improved.

2 and 3, the plurality of first electrodes 140 are disposed on the front surface of the semiconductor substrate 110 and are spaced apart from each other on the front surface of the semiconductor substrate 110, x). < / RTI >

As described above, the electrode spaced apart from the front surface of the semiconductor substrate 110 and extending in the first direction (x) may be referred to as a front finger.

At this time, the plurality of first electrodes 140 may be connected to the emitter section 120 through the anti-reflection film 130.

Accordingly, the plurality of first electrodes 140 may be formed of at least one conductive material, such as silver (Ag), to collect electrons, for example electrons, moving toward the emitter section 120.

At this time, the solar cell according to the present invention may not include bus bar electrodes formed in a long length in the second direction (y) intersecting the first direction (x) so that the plurality of first electrodes 140 are commonly connected.

In general, a bus bar electrode is connected to an interconnector (IC) which connects a plurality of solar cells (C1, C2) to each other. In a solar cell according to the present invention, May be directly connected to each of the plurality of first electrodes 140 described above.

The rear electric field portion 172 may be located on the rear surface opposite to the front surface of the semiconductor substrate 110 and may include a region doped with impurities of the same conductivity type as that of the semiconductor substrate 110 at a higher concentration than the semiconductor substrate 110, For example, it is a P + region.

A potential barrier is formed due to a difference in impurity concentration between the first conductive region and the rear conductive portion 172 of the semiconductor substrate 110, thereby preventing electron migration toward the rear electric field 172, On the other hand, hole transport to the rear electric field 172 is facilitated. Therefore, it is possible to reduce the amount of charge lost due to the recombination of electrons and holes at the back surface and the vicinity of the semiconductor substrate 110 and to accelerate the movement of a desired charge (e.g., a hole) .

The second electrode 150 may include a rear electrode layer 151 and a plurality of rear bus bars 152. The rear electrode layer 151 is in contact with the rear electric field portion 172 located on the rear surface of the semiconductor substrate 110 and substantially in contact with the rear surface electrode portion 151 except for the rear edge of the semiconductor substrate 110 and the portion where the rear bus bar 152 is located And may be located on the entire rear surface of the semiconductor substrate 110.

The rear electrode layer 151 contains a conductive material such as aluminum (Al).

This rear electrode layer 151 collects charge, for example, holes, moving from the rear electric field 172 side.

The rear electrode layer 151 and the rear electrode layer 151 are in contact with the rear electric field portion 172 which maintains the impurity concentration higher than that of the semiconductor substrate 110. In this case, The charge transfer efficiency from the semiconductor substrate 110 to the rear electrode layer 151 is improved.

The plurality of rear bus bars 152 are located on the rear surface of the semiconductor substrate 110 where the rear electrode layer 151 is not located and are connected to the adjacent rear electrode layer 151.

The plurality of rear bus bars 152 may collect the electric charges transferred from the rear electrode layer 151.

The plurality of rear bus bars 152 are connected to an interconnection IC so that the charges collected by the plurality of rear bus bars 152 are transmitted to other adjacent solar cells via the interconnector IC .

These plurality of rear bus bars 152 may be made of a material having a better conductivity than the back electrode layer 151 and may contain at least one conductive material such as, for example, silver (Ag).

Each of the plurality of rear bus bars 152 may be connected to each of the interconnectors (IC).

The operation of the solar cell according to this embodiment having such a structure is as follows.

When light is irradiated by a solar cell and enters the emitter section 120, which is a semiconductor part, through the emitter section 120 and the semiconductor substrate 110, electron-hole pairs are generated in the semiconductor section due to light energy. At this time, the reflection loss of light incident on the semiconductor substrate 110 is reduced by the concave-convex surface of the semiconductor substrate 110 and the emitter portion 120, so that the amount of light incident on the semiconductor substrate 110 increases.

These electron-hole pairs are separated from each other by the pn junction of the semiconductor substrate 110 and the emitter section 120, and the electrons and the holes are separated from each other by, for example, the emitter section 120 having the n-type conductivity type and the p- To the semiconductor substrate 110 having the conductive type. Electrons migrated toward the emitter section 120 are collected by the plurality of first electrodes 140 and transferred to the interconnection IC and the holes migrated toward the semiconductor substrate 110 pass through the adjacent rear electrode layer 151 Are collected by a plurality of rear bus bars 152 and transferred to the interconnector (IC).

2 and 3, the first electrode 140 is positioned on the front surface of the semiconductor substrate 110 and the second electrode 150 is positioned on the rear surface of the semiconductor substrate 110 The solar cell module according to the present invention may include a solar cell having a structure in which the first electrode 140 and the second electrode 150 are disposed on the rear surface of the semiconductor substrate 110, Can also be applied.

2 and 3 illustrate a case where the rear bus bar 152 is included on the rear surface of the semiconductor substrate 110. Alternatively, the rear bus bar 152 may be omitted. That is, the second electrode 150 may be formed only by the rear electrode layer 151.

The number and widths of the inter-connectors (ICs) applied to the solar cell module according to the present invention will be described first, and then, 14 to 16.

Hereinafter, the solar cell structure shown in FIGS. 2 and 3 will be described as an example for convenience of explanation.

1 (a), the solar cell module according to the present invention has a structure in which the longitudinal direction of the first electrode 140 of each of the plurality of solar cells C1 and C2 is the first direction x, And the plurality of solar cells C1 and C2 may be arranged in a second direction y intersecting the first direction x.

1 (a) to 1 (c), a plurality of interconnectors (IC) are connected to the first electrode 140 or the second electrode 140 to electrically connect the plurality of solar cells C1 and C2 electrically in series. And can be connected to the second electrode 150.

More specifically, as shown in FIG. 1 (b), in the solar cell module according to the present invention, a plurality of interconnectors (IC) are arranged long in the second direction (y) The electrode 140 and the second electrode 150 of the second solar cell may be connected in series with each other.

At this time, the plurality of interconnectors (IC) according to the present invention may have a wire form. At this time, as shown in Fig. 1 (a), the cross-section of each of the plurality of interconnectors (IC) may include a curved surface. 1 (a), the cross-section of each of the plurality of interconnectors (IC) is circular. However, the cross-section of each of the plurality of interconnectors (IC) may be any of elliptical, semicircular, rectangular, or trapezoidal. One can be included.

Accordingly, the light incident from the outside is reflected by the inclined surface of the interconnection IC and is incident on the semiconductor substrate 110, is reflected again on the transparent substrate located on the front surfaces of the plurality of solar cells C1 and C2, (110), thereby maximizing the amount of light incident on the solar cell.

In such a plurality of interconnectors (ICs), a solder paste or conductive metal particles containing a metal material such as tin (Sn) is contained in the insulating resin to the first electrode 140 or the second electrode 150 of the solar cell A conductive material such as a conductive paste or a conductive adhesive film or the like may be used.

Meanwhile, in the solar cell module of the present invention, the number (NIC) and width (WIC) of the plurality of interconnectors (IC) can be limited to specific values.

That is, considering the resistance of a plurality of interconnectors (IC), the shading area covered by a plurality of interconnectors (IC), and the output of the solar cell, a plurality of solar cells The number NIC of the plurality of interconnectors IC connected to the first electrode 140 or the second electrode 150 provided in one solar cell is between 10 and 18, And the width (WIC) of the interconnector (IC) may be between 0.24 mm and 0.53 mm.

Hereinafter, the reason why the number NIC of the interconnectors (IC) is limited in the solar cell module according to the present invention will be described.

For reference, the output values of the modules shown in the graphs of FIGS. 4 to 5 are illustrative and not absolute values, and are based on the assumption that they may vary depending on the configuration of each solar cell, the number of solar cells applied to the module, do.

4 is a graph showing the amount of decrease in output of the solar cell module due to the resistance of the interconnector (IC) shown in FIG.

4, the resistance of the interconnector (IC) and the output reduction amount of the output of the solar cell module are reduced without consideration of the shading area where the semiconductor substrate 110 is covered by the interconnector The results of simulating the relationship are shown.

Referring to FIG. 4, it can be seen that as the width (WIC) and the number (NIC) of the interconnector (IC) increase, the power reduction amount of the solar cell module decreases.

More specifically, as the number NIC and the width WIC of the interconnection IC are decreased, the resistance of the interconnection IC is increased, and accordingly, the amount of decrease in the output of the solar cell module is increased. That is, it can be seen that as the number NIC and width WIC of the interconnection ICs increase, the resistance by the interconnection IC increases and the amount of output reduction decreases.

In addition, even if the number (NIC) and the width (WIC) of the interconnector (IC) increase to some extent, the output reduction of the solar cell module converges to about 0.05W.

As a result, it can be seen that as the number (NIC) and the width (WIC) of the interconnector (IC) increase, the resistance decreases and the output of the solar cell module increases. In addition, It can be seen that the output increase of the module is slowed down after the width (WIC) increases more than a certain amount.

This is because as the number NIC and width WIC of the interconnection IC increase, the resistance of the interconnection IC decreases and the resistance of the interconnection IC improves to a certain level or less. It can be interpreted that the output reaches the maximum value of the output possible by each solar cell.

At this time, when the width WIC of the interconnector IC is relatively small (for example, the width WIC is 0.15 mm), the difference in the amount of output reduction due to the number NIC of the interconnectors IC is relatively small And when the width WIC of the interconnector IC is relatively large (for example, the width WIC is 0.4 mm), the difference in the output reduction amount due to the number NIC of the interconnectors ICs Is relatively small.

FIG. 5 is a graph simulating the module output according to the remaining power generation area excluding the shading area covered by the interconnector (IC) shown in FIG.

Such a graph shown in Fig. 5 is a value excluding the influence by the resistance of the interconnector (IC).

5, the number (NIC) and the width (WIC) of the interconnectors (ICs) applied to the module in the state where the maximum output of each cell in the solar cell module is 5 W is set as an example, ) Was adjusted to simulate the output value of the solar cell to be outputted.

As shown in FIG. 5, as the number (NIC) and the width (WIC) of the interconnector (IC) increase, the shading area by the interconnector (IC) increases and the output of the solar cell decreases.

At this time, when the width WIC of the interconnection IC is small, the amount of change in the output of the solar cell is relatively small even if the number NIC of the interconnection ICs is large or small, When the width WIC increases, the influence of the number of interconnects (IC) (NIC) is relatively large, and the output of the solar cell largely varies.

That is, as the number NIC of the interconnection ICs increases, the influence of the width WIC of the interconnection IC relatively increases and the output of the solar cell relatively decreases.

Therefore, when the width WIC of the interconnection IC is 0.15 mm, even if the number NIC of the interconnection ICs changes from 7 to 21, the increase of the shading area covered by the interconnection IC The output of the solar cell is not greatly reduced.

However, when the width (WIC) of the interconnector (IC) is 0.4 mm and the number of interconnectors (IC) NIC increases from 7 to 21, the shading area And the output of the solar cell is greatly reduced.

As can be seen from the simulation results shown in FIGS. 4 and 5, when the number NIC and the width WIC of the interconnection IC increase, the resistance by the interconnection IC decreases, In the case where the number of interconnection ICs (NIC) and width (WIC) decreases, the resistance is increased but the shading area is relatively large, because the shading area covered by the connector IC increases and affects the output of the solar cell. And it is confirmed that it affects the output of the solar cell.

Therefore, it can be confirmed that the output of each solar cell applied to the module can be maximized by appropriately determining the number (NIC) and the width (WIC) of the interconnectors (IC).

Therefore, in the present invention, first, the width (WIC) of the interconnector (IC) is arbitrarily set in advance to find the number (NIC) of the appropriate interconnectors (IC) (NIC) of the module output.

Fig. 6 is a graph showing the relationship between the number (NIC) of interconnectors IC and the number of interconnection ICs when the width WIC of the interconnector IC shown in Fig. 1 is 0.25 mm in order to set the number (NIC) (WIC) of the interconnector (IC) shown in FIG. 1 to set the number (NIC) of interconnectors (IC) according to the present invention. Fig. 8 is a graph showing the result of simulating the module output according to the number (NIC) of interconnectors (ICs) when the number of interconnectors (ICs) In the case where the width WIC of the interconnector IC shown in FIG. 5A is 0.2 mm, the module output according to the number NIC of the interconnectors IC is simulated.

For reference, the output values of the modules shown in the graphs of FIGS. 6 to 8 are illustrative, and are not absolute values. It is presumed that the output values may vary depending on the configuration of each solar cell or the number of solar cells applied to the module or other conditions do.

6 to 8 show an example in which the allowable maximum output power of each solar cell is 5W and 60 solar cells are applied to one solar cell module. Therefore, the maximum output power of one solar cell module is 300W.

6 to 8, when the number NIC of the interconnectors IC is 3 and the width WIC is 1.5 mm in the solar cell module as shown in FIG. 1, The output is simulated. At this time, the output of the solar cell module is 285.4W.

6 to 8, the module output according to the number (NIC) of interconnectors (IC) is a simulation result in which both the resistance and the shading area of the interconnector (IC) are considered.

6, when the width (WIC) of the interconnector (IC) is 0.25 mm, the number of interconnectors (IC) NICs is one to nine and has an output value lower than that of the comparative example , 10 to 28 outputs have higher output than the comparative example, and more than 29 outputs have lower output values than the comparative example. At this time, the highest output of the module was when the number of interconnectors (IC) (NIC) was 17, and the output value was 287.5 W which is about 2 W higher than the output value of the comparative example.

7, when the width WIC of the interconnector IC is 0.3 mm, an output value lower than that of the comparative example is obtained from 1 to less than 7 NICs of the interconnectors IC 7 to 26 have a higher output than the comparative example, and more than 27 have an output value lower than that of the comparative example. At this time, the highest output of the module was when the number of interconnectors (ICs) (NIC) was 13, and the output value was 288.6 W which was about 3.2 W higher than the output value of the comparative example.

8, when the width (WIC) of the interconnector IC is 0.2 mm, the output value lower than the comparative example is from 1 to less than 19 in the number of interconnectors IC The output power is higher than that of the comparative example from 19 to 32, and the output power is lower than that of the comparative example. At this time, the highest output of the module was when the number (NIC) of the interconnectors (IC) was 24, and the output value was 286.03 W, which was approximately 0.63 W higher than the output value of the comparative example.

As a result of the simulation, when the width (WIC) of the interconnector (IC) is 0.2 mm, the maximum output value is less than 1 W as compared with the comparative example, (NIC) is set on the basis of FIGS. 6 and 7.

6 and 7, it can be seen that the number (NIC) of interconnectors (IC) having always higher output values than the comparative example is between 10 and 26.

In addition, in the range of the number of interconnectors (ICs) having a higher output value than the comparative example, the material ratio and the shadow area of the interconnector (IC) are compared with the comparative example.

9 is a graph comparing a material ratio and a shadowing area of an interconnector (IC) for setting the number (NIC) of interconnectors (IC) according to the present invention, respectively, with a comparative example.

Here, the comparative example is a case where the number NIC of the interconnection ICs is 3, the width WIC is 1.5 mm, and the case where the width WIC of the IC is 0.25 mm For example.

As shown in FIG. 9A, it can be seen that the material cost of the interconnector (IC) consumes the same material cost as the comparative example when the number of interconnectors (IC) (NIC) per cell is 32.

Therefore, when the number of interconnectors (IC) is 32 or less, it can be confirmed that the material ratio of the interconnector (IC) according to the present invention is further reduced as compared with the comparative example.

In addition, as shown in FIG. 9B, when the width (WIC) is 0.25 mm, when the number NIC of interconnectors (IC) is 18, it can be seen that it has the same shadow area as the comparative example , And the number of interconnectors (IC) (NIC) exceeds 18, the shadow area increases as compared with the comparative example.

Therefore, considering the simulation results of FIGS. 6 to 8 and the graph of FIG. 9, when the number of interconnectors (ICs) NIC is not more than 18, the material cost of the interconnector (IC) It can be seen that the shadow area is below the comparative example.

Therefore, considering 10 to 26 and FIG. 9 derived from FIGS. 6 and 7, it can be seen that the number of interconnection ICs (NIC) is between 10 and 18 is more efficient and inexpensive.

6 to 9, it has been determined that the number NIC of interconnectors (IC) in the solar cell module according to the present invention is between 10 and 18.

In addition, the width (WIC) of the interconnector (IC) according to the present invention is determined by simulating several cases in the state where the number of interconnectors (IC) The width (WIC) of the connector (IC) was set.

10 to 13, the simulation result graph shows a module output (IC) according to the width (WIC) of the interconnector (IC) when the number (NIC) of the interconnection ICs is 11, 13, 15, In the graph of FIG.

More specifically, FIG. 10 is a graph of simulation results for the output value of the module according to the width WIC of the interconnector IC when the number NIC of interconnectors IC shown in FIG. 1 is 11. FIG. 12 is a graph showing a simulation result on the output value of the module according to the width WIC of the interconnector IC when the number NIC of the interconnectors IC shown in FIG. 1 is 13. FIG. FIG. 13 is a graph showing the simulation result of the output value of the module according to the width (WIC) of the interconnector (IC) when the number of interconnection ICs (NIC) (IC) width (WIC) when the number (NIC) of the ICs is 17.

The output values of the modules shown in the graphs of FIGS. 10 to 13 are illustrative and not absolute values, and are assumed to be different depending on the configuration of each solar cell, the number of solar cells applied to the module, and other conditions.

In Figs. 10 to 13, an example is shown in which a maximum permissible output power of each solar cell is 5W and 60 solar cells are applied to one solar cell module. Therefore, the maximum output power of one solar cell module is 300W.

Here, the comparative example is a case where the number NIC of interconnectors (IC) is three and the width WIC is 1.5 mm, and the output value of the solar cell module according to the comparative example is 285.4W.

10, when the number NIC of interconnectors IC is 11, and the width WIC of the interconnector IC is 0.24 mm to 0.85 mm, The output of the solar cell module according to the present invention is 288 W when the width WIC of the interconnection IC is 0.3 mm to 0.67 mm. Or more.

At this time, the maximum output of the solar cell module is when the width (WIC) of the interconnector (IC) is 0.4 mm and the output value is 289.4 W, which is about 4 W higher than the output value of the comparative example.

11, when the width (WIC) of the interconnector (IC) is 0.24 mm to 0.72 mm when the number NIC of the interconnectors (IC) is 13, The output of the solar cell module according to the present invention is 288 W when the width WIC of the interconnector IC is 0.28 mm to 0.54 mm. Or more.

At this time, the maximum output of the solar cell module is when the width (WIC) of the interconnector (IC) is 0.38 mm and the output value is 289.3 W, which is higher than the output value of the comparative example by 3.9 W.

12, when the width (WIC) of the interconnector (IC) is 0.22 mm to 0.62 mm when the number NIC of interconnectors (IC) is 15, The output of the solar cell module according to the present invention is 288 W when the width (WIC) of the interconnector (IC) is 0.28 mm to 0.45 mm. Or more.

At this time, the maximum output of the solar cell module is when the width (WIC) of the interconnector (IC) is 0.35 mm and the output value is 288.7 W, which is higher than the output value of the comparative example by 3.3 W.

13, when the width (WIC) of the interconnector (IC) is 0.21 mm to 0.53 mm when the number NIC of interconnectors (IC) is 17, The output of the solar cell module according to the present invention is 288 W when the width (WIC) of the interconnector (IC) is 0.28 mm to 0.38 mm. Or more.

At this time, the maximum output of the solar cell module is when the width (WIC) of the interconnector (IC) is 0.3 mm and the output value is 288.7 W, which is higher than the output value of the comparative example by 3.3 W.

Therefore, considering the simulation result graph according to Figs. 10 to 13, when the number NIC of the interconnectors IC is between 10 and 18, the width WIC ) Is between 0.24 mm and 0.53 mm, it can be confirmed that the output value of the solar cell module is better than that of the comparative example.

In addition, when the number (NIC) of interconnectors (IC) is between 10 and 18, the width (WIC) of the interconnector (IC) according to the present invention according to the present invention can be between 0.3 mm and 0.38 mm . At this time, as shown in Figs. 10 to 13, it can be seen that the output value of the solar cell module is much better than that of the comparative example.

14 to 16, another example of a solar cell applicable to the solar cell module according to the present invention shown in FIG. 1 will be described.

In the following Figs. 14 to 16, the detailed description of the contents overlapping with those in Figs. 2 and 3 will be omitted, and different points will be mainly described.

As shown in FIG. 14, in another example of the solar cell that can be applied to the solar cell module according to the present invention shown in FIG. 1, the first electrode 140 is arranged in the first direction x And a front bus bar 142 extending in a second direction y which is a direction intersecting the longitudinal direction of the front fingers 141. [

In such a case, the above-described interconnectors (IC) in FIGS. 1 and 4 to 13 can be connected to the front bus bar 142.

At this time, the number of the front bus bars 142 is the same as the number of the interconnection ICs, and the width of the front bus bar 142 may be equal to or smaller than the width of the interconnection IC. That is, for example, when fifteen interconnectors (IC) are connected to the front surface of the semiconductor substrate 110 with a width of 0.3 mm, fifteen front bus bars 142 are connected to the semiconductor substrate 110 with a width of 0.3 mm. May be formed on the front surface.

In this way, when the front bus bar 142 is formed, the contact area between the interconnector IC and the first electrode 140 is increased, and the contact resistance and contact force can be further improved.

In addition, the number of rear bus bars 152 may be the same, and the width of the rear bus bars 152 may be equal to or less than the width of the interconnectors ICs. However, it is also possible to omit the rear bus bar 152, as described above in FIGS. 2 and 3.

15, the rear bus bar 152 is elongated in the second direction y and connected to each of the front fingers 141 and spaced apart from each other between the front fingers 141 It is also possible to have the shape of an island structure.

The second electrode 150 may have a rear finger 151 'instead of the rear electrode layer 151 and may be disposed on the rear surface of the semiconductor substrate 110 in the same direction as the front finger 141 The rear bus bar 152 may be provided.

In this case, when the solar cell has a bi-facial structure, light can be received even on the rear surface of the semiconductor substrate 110, and the efficiency of the solar cell can be further improved.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed exemplary embodiments, It belongs to the scope of right.

Claims (8)

A first electrode connected to the emitter portion, a rear electric portion positioned on a rear surface of the semiconductor substrate, and a second electrode electrically connected to the rear surface of the semiconductor substrate, First and second solar cells including a second electrode connected to the electric system and positioned adjacent to each other; And
And a plurality of interconnectors connected to a first electrode of the first solar cell and a second electrode of the second solar cell and serially connecting the first and second solar cells,
Wherein the number of the plurality of interconnectors connected to the first electrode of the first solar cell and the second electrode of the second solar cell is between 7 and 32 and has a circular cross section and is between 0.24 mm and 0.53 mm Width,
Wherein the first electrode includes a front finger extending in a first direction on the emitter and a front bus bar formed in a second direction intersecting the front finger,
Wherein the second electrode includes a rear electrode positioned on the rear electric field portion and a rear bus bar connected to the rear electrode and disposed in a direction parallel to the front bus bar. The method according to claim 1,
Wherein the number of the plurality of interconnectors is between 10 and 26. The solar cell module of claim 1, The method according to claim 1,
Wherein the number of the plurality of interconnectors is between 10 and 18. The method according to claim 1,
Wherein a width of the plurality of interconnectors is between 0.30 mm and 0.38 mm. The method according to claim 1,
Wherein the first and second solar cells are arranged in a second direction intersecting with the first direction,
Wherein the plurality of interconnectors connect the plurality of solar cells in series in the second direction. The method according to claim 1,
Wherein the front bus bar is continuously formed in the second direction and connected to a plurality of the front fingers. The method according to claim 1,
Wherein the front bus bar is discontinuously formed in the second direction and is connected to each of the front fingers. The method according to claim 1,
Wherein the rear electrode comprises a rear finger which is located on the rear electric field portion and has a plurality of long extending electrodes extending in parallel with each other in the first direction.

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