KR20160055539A - Printed circuit board and method for manufacturing thereof - Google Patents

Abstract

Disclosed are a printed circuit board and a manufacturing method thereof. The printed circuit board according to an embodiment of the present invention comprises: a core layer made of the metal of the printed circuit board; and a build-up layer which is formed by successively stacking an insulation layer and a circuit pattern layer on both sides of the core layer with the core layer as a center. The printed circuit board according to an embodiment of the present invention can secure hardness of the core layer, and effectively discharge heat generated in a terminal formed in a build-up layer. wherein the step part is provided by a metal member coupled to the slider.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a printed circuit board (PCB)

The present invention relates to a printed circuit board and a manufacturing method thereof.

As slimmer electronic devices and higher performance have been required, printed circuit boards have also become demanded to be smaller, thinner, and more sophisticated.

Although the thickness of the entire substrate can be reduced by lowering the number of layers of the substrate in order to realize miniaturization and thinning of the printed circuit board, if the number of layers of the substrate is reduced, there is a problem that the substrate is warped or warped.

A related art is disclosed in Korean Patent Registration No. 10-1044117 (registered on Jun. 17, 2011, a method of manufacturing a printed circuit board).

According to an aspect of the present invention, a printed circuit board formed of a metal is provided to secure rigidity to the core layer.

The printed circuit board may further include a side plating layer connected to the core layer to increase the heating efficiency.

The printed circuit board may form a via connecting the element and the core layer in order to efficiently discharge heat generated in the element formed in the build-up layer.

1 is a cross-sectional view of a printed circuit board according to an embodiment of the present invention.
2 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention.
3 to 6 are views showing major steps in a method of manufacturing a printed circuit board according to an embodiment of the present invention.
7 to 10 are views showing major steps in a method of manufacturing a printed circuit board according to another embodiment of the present invention.

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a perspective view of a printed circuit board according to a first embodiment of the present invention; Fig. A duplicate description will be omitted.

In addition, the term " coupled " is used not only in the case of direct physical contact between the respective constituent elements in the contact relation between the constituent elements, but also means that other constituent elements are interposed between the constituent elements, Use them as a concept to cover each contact.

1 is a cross-sectional view illustrating a printed circuit board according to an embodiment of the present invention. 1, a printed circuit board 100 includes a buildup layer 110, a side plating layer 120, a via 130 including a core layer 105, an insulating layer 112 and a circuit pattern layer 114, And the element 1 coupled to the upper surface of the buildup layer 110 are included.

The core layer 105 may be made of any one material selected from the group consisting of iron, nickel, magnesium, cobalt, tungsten, titanium and aluminum so that the buildup layer 110 can be laminated on both sides.

The core layer is generally made of an insulating material, and typically glass fibers can be used. However, when glass fibers are formed on the core layer, warping phenomena such as warping or twisting due to thinning of the substrate may occur have.

The warpage phenomenon is a phenomenon that occurs when a device, a molding resin, a printed circuit board, or the like has a different thermal expansion coefficient, which means that a printed circuit board or the like is bent.

Conventionally, the glass fiber formed on the core layer of the substrate has a problem that a WARPAGE phenomenon occurs due to a difference in thermal expansion coefficient from the buildup layer stacked above and below the core layer.

In addition, the glass fiber formed on the core layer has poor heat dissipation properties, which increases the warpage phenomenon of the printed circuit board and causes peeling and cracking of the printed circuit board due to warpage.

When the core layer 105 according to an embodiment of the present invention is formed of a metal, the difference in thermal expansion coefficient between the build-up layer 110 of the printed circuit board and the build-up layer 110 of the printed circuit board is small, The number of layers of the substrate can be reduced and warping phenomena can be reduced.

When the core layer 105 is formed of a metal, a high heat dissipation property of a metal can be imparted, and problems such as adhesion failure such as delamination between layers can be reduced owing to a high heat dissipation property.

The core layer 105 formed of a metal may be formed with an element or the like, and various electronic components may be inserted by forming a cavity or the like.

When the electronic component is inserted into the core layer 105, heat generated in the device can be more directly transmitted and received.

The buildup layer 110 may be formed by sequentially laminating an insulating layer 112 and a circuit pattern layer 114 on both sides of the core layer 105 as a center.

The insulating layer 112 may be a prepreg coated with a thermosetting resin composition as a means for insulating the printed circuit board 100 from one another.

As the insulating composition of the insulating layer 112, an epoxy resin can be used, and by using a bisphenol-based epoxy resin, excellent adhesion strength to the metal surface can be secured.

The insulating layer 112 according to an embodiment of the present invention may have a thermal expansion coefficient of 5 ppm / 占 폚 or less by laminating a polyester resin composition and may be laminated on both surfaces of a metal core substrate to improve the warpage phenomenon .

The build-up layer 110 may include an inner layer insulating layer or an outer layer insulating layer. The outer layer insulating layer may be formed of a material having a higher elastic modulus than the inner layer insulating layer to minimize the warpage phenomenon can do.

The circuit pattern layer 114 is a conductive pattern formed on a substrate using a conductive material such as copper, and has a signal circuit pattern layer for signal transmission, a power layer for power supply, and a ground layer for power supply stop.

The side plating layer 120 may be formed on the printed circuit board 100 by forming the printed circuit board 100 on both sides of the buildup layer 110 to be connected to the core layer 105 to effectively dissipate heat generated from the circuit pattern layer 114, It is possible to further improve the heat dissipation effect of the heat sink.

When the core layer is formed of glass fiber, since the peripheral pre-flip for forming the insulating layer is also an insulating material, the heat generated inside the substrate can be discharged through the thermal via formed in the substrate, And the area is limited.

The core layer 105 and the side plating layer 120 are connected to each other and the heat transferred to the core layer 105 can be transferred to the side plating layer 120 so that the flow of heat is cut off It is possible to form and discharge continuously, and it is possible to discharge by using a larger surface area.

The vias 130 formed in the build-up layer 110 may be formed by through-holes or stacked vias formed by processing a hole of a substrate for interlayer connection of a printed circuit board, have.

The through-via can be formed by via laser machining or CNC drilling to connect the pads and pads of the part while making the interlayer connection.

On the other hand, a stacked via may be formed such that a via hole is formed in a printed circuit layer or an insulating layer, and then a conductive plating layer is formed on the inner wall of the via hole to stack two or more vias.

The stacked via may be formed by inserting a via formed in the upper layer into a via hole formed in a lower layer, and it is possible to design the circuit layer to be connected only to a necessary circuit layer, not a whole layer hole processing method, thereby increasing the wiring density.

The via 130 may be filled with a conductive material or coated with an inner surface to electrically connect the circuit pattern layer 114 formed on both sides of the core layer 105 with each other.

The circuit pattern layer 114 of each layer may be electrically connected to the circuit pattern layer 114 formed on the other surface of the core layer 105 through the via 130. [

According to an embodiment of the present invention, the heat emitted from the device 1 is coupled from the via 130 formed through the buildup layer 110 to the core layer 105 connected to the via 130, In addition, it can be transmitted to the core layer 105 having a large area, which is advantageous in expanding the heat radiation area.

Furthermore, the core layer 105 and the side plating layer 120 are connected to each other in a secondary manner, thereby various heat release paths can be secured.

The via 130 connected to the device 1 can simultaneously serve as a thermal via for heat dissipation, thereby improving the degree of substrate integration.

When the via 130 connecting the element 1 and the core layer 105 is formed, heat emitted from the element 1 mounted on the build-up layer 110 is transferred to the side plating layer 120 formed at both ends of the substrate The heat radiation efficiency can be further increased.

The device 1 includes an active element and a passive element as respective components mounted on the printed circuit board 100. For example, an application processor related to driving various application programs in the mobile communication terminal, An RF communication part, a front end part, a phasor measurement unit (PMU) for performing data compression transmission, and the like.

FIG. 2 is a flowchart illustrating a method of manufacturing a printed circuit board according to an embodiment of the present invention, and FIGS. 3 to 6 show major steps in a method of manufacturing a printed circuit board according to an embodiment of the present invention .

7 to 10 are views showing major steps in a method of manufacturing a printed circuit board according to another embodiment of the present invention.

Referring to FIGS. 2 to 10, a method of manufacturing a printed circuit board includes the steps of preparing a core layer made of a metal (S300), stacking a buildup layer on both sides of the core layer (S305) And forming a side plating layer on the side surface (S310).

The step (S300) of preparing a core layer made of a metal may include selecting and preparing at least one material selected from the group consisting of iron, nickel, magnesium, cobalt, tungsten, titanium and aluminum capable of stacking the build- Lt; / RTI >

In addition, the step (S300) of preparing the core layer made of metal may include the step of forming irregularities for attaching the insulating layer or the like, and the step of physically and chemically surface-treating the core layer for adhesion.

Next, the step (S305) of laminating the build-up layer 110 on both sides of the core layer 105 with the core layer 105 as the center can be performed, and rigidity can be ensured by using metal as the core layer The number of layers of the build-up layer 110 may be selected and stacked as required.

The step S305 of forming the buildup layer 110 may be performed by sequentially forming an insulating layer 112 and a circuit pattern layer 114 on both surfaces of the core layer 105 with the core layer 105 as a center have.

The step S305 of forming the buildup layer 110 may include forming the via 130 to connect the buildup layer 110 and the element 1 formed on the upper surface of the buildup layer 110. [

The step of forming the vias 105 may be formed before the build-up layer 110 is laminated, or may be formed after the build-up layer 110 is laminated.

The step of forming the vias 105 may include forming through vias to penetrate the build-up layer 110.

In the step of forming the vias 105, a via hole is formed in the insulating layer 112 or the printed circuit layer 114, a conductive plating layer is formed on the inner wall of the via hole to a predetermined thickness, And forming a via.

The side plating layer 120 may be formed on the side surface of the buildup 110 so that the core layer 200 is formed on the side surface of the buildup layer 110. [ As shown in FIG.

Since the multilayer printed circuit board of this embodiment can manufacture a substrate having a coefficient of thermal expansion similar to that of the buildup layer 110, the side plating layer 120 and the element 1, it is possible to prevent a warpage phenomenon of the printed circuit board And it is possible to reduce the stress caused by the temperature change to prevent cracking or peeling of the printed circuit board, thereby securing the connection reliability.

The present embodiment is characterized in that a metal core layer is used for a printed circuit board and a side plating layer is formed so as to be connected to the metal core layer, thereby increasing the degree of freedom in circuit design and realizing circuit density and thinning.

While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

100: printed circuit board
105: core layer
110: buildup layer
112: insulating layer
114: circuit pattern layer
120: side plating layer
130: Via

Claims (8)

A core layer formed of a metal; And
A buildup layer formed by sequentially laminating an insulating layer and a circuit pattern layer on both surfaces of the core layer with the core layer as a center;
And a printed circuit board.
The method according to claim 1,
A side plating layer formed on a side surface of the buildup layer and connected to the core layer;
And a printed circuit board.
The method according to claim 1,
An element mounted on the buildup layer; And
A via formed to connect the element and the core layer;
And a printed circuit board.
The method of claim 3,
The vias
And a via hole is formed in the insulating layer or the circuit pattern layer, and then the via hole is stacked.
Preparing a core layer made of a metal; And
Stacking a build-up layer on both sides of the core layer with the core layer as a center;
And a step of forming the printed circuit board.
6. The method of claim 5,
After the step of laminating the buildup layer,
Forming a side plating layer on a side surface of the buildup layer,
The step of forming the side plating layer on the side surface of the build-
And forming the side plating layer to be connected to the core layer.
6. The method of claim 5,
The step of forming the build-
And forming a via by connecting the build-up layer and the core layer so as to connect the elements formed in the build-up layer.
6. The method of claim 5,
The step of forming the build-
Forming via holes in each of the insulating layer and the circuit pattern layer and forming stack vias so that the via holes are stacked.

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