KR20160010967A - Power Rectifier Device - Google Patents

Abstract

An embodiment of the present invention relates to a power rectifier device. The technical objective of the present invention is to provide the power rectifier device which can reduce a forward turn-on voltage, and can improve a switching speed and reverse recovery time, by improving current efficiency per unit area by forming a vertical current flow structure like a MOSFET of a floating gate structure. For this, according to the present invention, disclosed is the power rectifier device comprising: a first conduction type substrate; a first conduction type area which is formed on the first conduction type substrate, and has a trench along a downward direction; a gate electrode embedded in the trench; a second conduction type area which is protruded upward at an outer side of the trench of the first conduction type area; a first conduction type source area which is formed between the trench and the second conduction type area; an anode electrode which is connected to the gate electrode, the second conduction type area and the first conduction type source area; and a cathode electrode connected to the first conduction type substrate. Depth of the trench is larger than depth of the second conduction type area.

Description

[0001] Power rectifier device [0002]

One embodiment of the present invention relates to a power rectifying device.

BACKGROUND OF THE INVENTION Power rectifiers for high voltage and large power are being applied in various fields such as power supply and / or power converter. The power rectifying element uses a P-N junction diode or the like.

In one example, the P-N junction diode device has low leakage current characteristics and good reliability at high temperatures. However, the PN junction diode device has a high forward turn-on voltage (about 0.7 V) and also has current conduction characteristics due to minority carriers, and the switching of the PN junction diode Speed, e.g., reverse recovery time is slow.

One embodiment of the present invention improves the current efficiency per unit area by forming a vertical current flow structure such as a MOSFET having a floating gate structure, thereby lowering the forward turn-on voltage, improving the switching speed and the reverse recovery time Power rectification device.

A power rectifying device according to an embodiment of the present invention includes a first conductive type substrate; A first conductive type region formed in the first conductive type substrate and having a trench in a downward direction; A gate electrode embedded in the trench; A second conductive type region formed on the outer side of the trench of the first conductive type region so as to protrude upward; A first conductive type source region formed between the trench and the second conductive type region; An anode electrode connected to the gate electrode, the second conductivity type region, and the first conductivity type source region; And a cathode electrode connected to the first conductive type substrate, wherein a depth of the trench is larger than a depth of the second conductive type region.

The gate electrode may be a polysilicon of a first conductive type or a second conductive type, and a gate insulating film may be interposed between the gate electrode and the trench.

Wherein the first conductive type source region is formed between the second conductive type region and the trench, and the first conductive type source region and a portion of the second conductive type region form the same plane, and the sidewalls of the trench Can be achieved.

When a forward voltage is applied between the anode electrode and the cathode electrode, a channel region is formed in a direction perpendicular to the second conductivity type region, so that the forward turn-on voltage of the power rectification device can be lowered.

The protrusion height of the second conductivity type region may be greater than the protrusion height of the gate electrode.

The width of the trench may be less than the pitch between the second conductivity type regions.

The width of the trench may be less than the width of the second conductivity type region.

The first conductive type may be an N type, and the second conductive type may be a P type.

The first conductivity type may be P type, and the second conductivity type may be N type.

The second conductive type region having a lower region connected to a sidewall of the trench; An inclined region connected to the first conductive type source region and extending obliquely upward from the lower region; And an upper region extending upward from the inclined region and having a width smaller than the width of the lower region.

The second conductive type region being connected to the trench and the first conductive type source region, the second conductive type first region having a first concentration; And a second conductive type second region formed inside the second conductive type first region and connected to the first conductive type region and the anode electrode, the second conductive type second region having a second concentration higher than the first concentration can do.

One embodiment of the present invention improves the current efficiency per unit area by forming a vertical current flow structure such as a MOSFET having a floating gate structure, thereby lowering the forward turn-on voltage, improving the switching speed and the reverse recovery time Power rectification device.

1 is a cross-sectional view illustrating a power rectifying device according to an embodiment of the present invention.
FIG. 2 illustrates a state in which a forward voltage is applied to a power rectifying device according to an embodiment of the present invention. Referring to FIG.
FIG. 3 illustrates a state in which a reverse voltage is applied to the power rectifying device according to an embodiment of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are described in order to more fully explain the present invention to those skilled in the art, and the following embodiments may be modified in various other forms, The present invention is not limited to the embodiment. Rather, these embodiments are provided so that this disclosure will be more faithful and complete, and will fully convey the scope of the invention to those skilled in the art.

In the following drawings, thickness and size of each layer are exaggerated for convenience and clarity of description, and the same reference numerals denote the same elements in the drawings. As used herein, the term "and / or" includes any and all combinations of one or more of the listed items.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a," "an," and "the" include singular forms unless the context clearly dictates otherwise. Also, " comprise "and / or" comprising "when used herein should be interpreted as specifying the presence of stated shapes, numbers, steps, operations, elements, elements, and / And does not preclude the presence or addition of one or more other features, integers, operations, elements, elements, and / or groups.

Although the terms first, second, etc. are used herein to describe various elements, components, regions, layers and / or portions, these members, components, regions, layers and / It is obvious that no. These terms are only used to distinguish one member, component, region, layer or section from another region, layer or section. Thus, a first member, component, region, layer or section described below may refer to a second member, component, region, layer or section without departing from the teachings of the present invention.

Referring to Figure 1, a cross-sectional view of a power rectifying device 100 in accordance with one embodiment of the present invention is shown.

1, a power rectifying device 100 according to the present invention includes a first conductive type substrate 110, a first conductive type region 120, a gate electrode 130, a second conductive type region 140, A first conductive type source region 150, an anode electrode 160, and a cathode electrode 170.

The first conductive type substrate 110 is a substrate doped with a first conductive type dopant. In one embodiment, the first conductive type substrate 110 may be a semiconductor substrate, and may be a concept including a first conductive type region 120 formed as an epitaxial layer on the upper surface of the semiconductor substrate . For example, the semiconductor substrate may be a silicon substrate, and the epitaxial layer may be a silicon layer. The semiconductor substrate is doped with a dopant of the first conductivity type, and the epitaxial layer is also doped with a dopant of the first conductivity type. At this time, the dopant concentration of the semiconductor substrate may be higher than the dopant concentration of the epitaxial layer. However, the present invention is not limited to the substrate including the semiconductor substrate and the epitaxial layer. The first conductive type substrate 110 according to another embodiment may be a bulk semiconductor substrate doped with a first conductive type dopant, or may be implemented in another form. Hereinafter, for convenience of explanation, the substrate including the semiconductor substrate and the epitaxial layer will be described as an example.

The first conductive type region 120 may be formed as an epitaxial layer on the first conductive type substrate 110 as described above. In the first conductive type region 120, a trench 121 having a predetermined depth is formed. That is, the first conductive type region 120 is formed with a trench 121 having a certain depth downward by a normal photo / etching method.

The gate electrode 130 is embedded in the trench 121 of the first conductivity type region 120. The gate electrode 130 may be polysilicon or its equivalent (metal, metal silicide, and conductive metal nitride) doped with a dopant of a first conductivity type or a second conductivity type, but the present invention is not limited thereto. In addition, the gate electrode 130 protrudes slightly upward from the trench 121, thereby increasing the contact area with the anode electrode 160 to be formed. Of course, a gate insulating film 131 is interposed between the gate electrode 130 and the trench 121. The gate insulating film 131 may be a silicon oxide film or a silicon nitride film.

The second conductive type region 140 is formed outside the trench 121 of the first conductive type region 120 and protruding upward. The depth of the second conductive type region 140 may be smaller than the depth of the trench 121. Conversely, the depth of the trench 121 may be greater than the depth of the second conductivity type region 140.

Substantially, the trenches 121 are formed closer to the first conductive type substrate 110 than the second conductive type regions 140. Accordingly, the length of the gate electrode 130 embedded in the trench 121 is also longer than the length of the second conductive region 140 in the lower direction. That is, the gate electrode 130 is formed closer to the first conductive type substrate 110 than the second conductive type region 140.

The protrusion height of the second conductivity type region 140 may be greater than the protrusion height of the gate electrode 130. Conversely, the protrusion height of the gate electrode 130 may be smaller than the protrusion height of the second conductivity type region 140.

In addition, the pitch between the second conductivity type regions 140 may be larger than the width of the trenches 121. Conversely, the width of the trenches 121 may be smaller than the pitch between the second conductive regions 140. In addition, the width of the second conductivity type region 140 may be greater than the width of the trench 121. Conversely, the width of the trench 121 may be smaller than the width of the second conductive region 140.

The second conductivity type region 140 includes a lower region 141, an inclined region 142, and an upper region 143 when defined in the vertical direction. That is, the second conductive type region 140 is connected to the first conductive type source region 150 to be connected to the lower region 141 connected to the side wall of the trench 121, and is inclined upward from the lower region 141 And an upper region 143 extending upwardly from the tapered region 142 and having a width smaller than the width of the lower region 141. The upper region 143 may be defined as an upper region 143, Here, the width of the upper region 143 is relatively smaller than the width of the lower region 141 by the inclined region 142.

The second conductive type region 140 includes a second conductive type first region 144 and a second conductive type second region 145 when defined in the horizontal direction. That is, the second conductive type region 140 is connected to the first conductive type region 120, the trench 121, and the first conductive type source region 150 to be described below. The second conductive type region 140 has a first concentration, A second conductive type first region 144 connected to the first conductive type first region 144 and a second conductive type first region 144 connected to the first conductive type first region 144 and the second conductive type first region 144, 144 and a second conductive type second region 145 connected to the anode electrode 160 and having a second concentration higher than the first concentration.

Here, the longitudinal length of the second conductive type second region 145 is relatively longer than the length of the second conductive type first region 144. In other words, the upper surface of the second conductive type second region 145 is flush with the upper surface of the second conductive type first region 144 while the lower surface of the second conductive type second region 145 is the same And extends in the lower direction relative to the lower surface of the conductive first region 144.

The first conductive type source region 150 is formed by doping a side portion of the second conductive type region 140 with a first conductive type dopant. In other words, a first conductive type source region 150 is formed between the trench 121 and the second conductive type region 140. In other words, a portion of the first conductivity type source region 150 forms a sidewall of the trench 121. In addition, a portion of the second conductivity type region 140 (i.e., a portion of the second conductivity type second region 145) also forms a sidewall of the trench 121. In addition, a portion of the first conductive type source region 150 and a portion of the second conductive type region 140 form a sidewall of the trench 121 while forming the same plane. In addition, since the first conductivity type source region 150 has a substantially rhombic shape in the longitudinal section, the contact area with the second conductivity type region 140 is increased, and contact with the anode electrode 160 The area also increases.

In this manner, the gate electrode 130, the gate insulating film 131, the first conductive type source region 150, the second conductive type region 140 (i.e., the second conductive type second region 145) 1 conductive region 120 (i.e., an epitaxial layer) forms a field effect transistor structure. In other words, the first conductive type source region 150 is the source region and the second conductive type region 140 (i.e., the second conductive type second region 145) is the channel region 146 ), And the first conductive type region 120 (i.e., the epitaxial layer) becomes the drain region. Of course, such a drain region is electrically connected to the first conductive type substrate 110.

However, since the gate electrode 130 is electrically connected to the anode electrode 160, the trade-off between the withstand voltage and the on-resistance of the power rectifying device 100 according to the present invention is optimally controlled. Particularly, in the case of reducing the resistance of increasing the concentration of the first conductivity type region 120, it is preferable to connect the gate electrode 130 to the anode electrode 160 and fix it to the anode potential as described above. In some cases, the gate electrode 130 may not be electrically connected to the anode electrode 160.

The anode electrode 160 includes the gate electrode 130, the second conductive type region 140 (i.e., the second conductive type first region 144 and the second conductive type second region 145) And is connected to the upper surface of the conductive type source region 150. The anode electrode 160 may be formed of a metal such as tungsten, aluminum, copper, titanium, and / or tantalum, a conductive metal nitride such as titanium nitride, tantalum nitride, and / or tungsten nitride, And a metal-semiconductor compound (e.g., a metal silicide).

The cathode electrode 170 is connected to the lower surface of the first conductive type substrate 110. The cathode electrode 170 may also include a metal (e.g., tungsten, aluminum, copper, titanium, and / or tantalum), a conductive metal nitride (e.g., titanium nitride, tantalum nitride, and / or tungsten nitride) And a metal-semiconductor compound (e.g., a metal silicide).

One of the first conductive type and the second conductive type described above is an N type and the other is a P type. When the first conductivity type is the N-type and the second conductivity type is the P-type, the transistor structure may be a trench type NMOS transistor structure wherein the top electrode may be the anode and the bottom electrode may be the cathode .

Alternatively, when the first conductivity type is P-type and the second conductivity type is N-type, the transistor structure may be a trench type PMOS transistor, the upper electrode may be a cathode, and the lower electrode may be an anode .

For example, when the first conductivity type is N-type and the second conductivity type is P-type, a forward current may flow from the upper anode electrode 160 to the lower cathode electrode 170. Alternatively, when the first conductivity type is P-type and the second conductivity type is N-type, a forward current may flow from the lower anode electrode to the upper cathode electrode.

Referring to FIG. 2, a forward voltage is applied to the power rectifying device 100 according to an exemplary embodiment of the present invention.

2, when a positive voltage is applied to the anode electrode 160 of the power rectification device 100 and a negative voltage is applied to the cathode electrode 170, in other words, when a forward voltage is applied, The PN junction structure of the conductive type region 140 and the first conductive type region 120 is turned on and the channel region 146 of the transistor structure is turned on. Therefore, since the forward current flows simultaneously through the PN junction structure between the second conductive type region 140 and the first conductive type region 120 and the channel region 146 of the transistor structure, the forward turn- . Since the length of the channel region 146 is relatively short between the first conductive type source region 150 and the first conductive type region 120 which are the side walls of the trench 121, Electrical resistance also decreases.

Moreover, since this power rectifying device 100 is a current conducting device using multiple carriers of the above-described transistor structure, the reverse recovery time of the power rectifying device 100 is shortened. As a result, the power rectification device has a fast switching speed and low leakage current.

That is, the present invention provides a power rectification device capable of reducing the forward turn-on voltage, improving the switching speed and the reverse recovery time by improving the current efficiency per unit area by forming a vertical current flow structure such as a trench type MOSFET structure (100).

Referring to FIG. 3, a reverse voltage is applied to the power rectifying device 100 according to an exemplary embodiment of the present invention.

3, when a negative voltage is applied to the anode electrode 160 of the power rectification device 100 and a positive voltage is applied to the cathode electrode 170, in other words, when a reverse voltage is applied, The PN junction structure of the conductive type region 140 and the first conductive type region 120 is turned off and the channel region 146 (see FIG. 2) of the transistor structure is also turned off. The depletion region is extended from the PN junction structure of the second conductivity type region 140 and the first conductivity type region 120 to the second conductivity type region 140 from the first conductivity type region 120. In other words, An electric field is formed in the direction of the current to completely block the flow of current.

Here, the depletion region is formed in the first conductive region 120 separated from the second conductive type region 140 and the electric field is uniformly distributed without being concentrated in the channel region 146 (see FIG. 2) The internal pressure of the region 146 (see FIG. 2) is secured.

In addition, by properly adjusting the distance and depth of the second conductivity type region 140, the electric field strength of the channel region 146 can be further reduced, thereby further increasing the internal pressure of the power rectifying device 100.

As described above, the power rectification device 100 according to the present invention includes the trench 121 having a predetermined depth in the first conductivity type region 120, and the anode electrode 160 and the anode electrode 160 are formed in the trench 121, An electrically connected gate electrode 130 is buried.

Generally, when the concentration of the first conductivity type region 120 (i.e., the drift layer) is high, a relatively small depletion layer tends to generate a large amount of space charge. Thus, by increasing the cathode voltage (or drain voltage), the electric field becomes relatively strong, and when this electric field exceeds the threshold, the power rectifying device is destroyed.

However, as described above, in the power rectifying device 100 according to the present invention, the positive charges (holes) injected into the first conductivity type region 120 and the negative charges (electrons) generated on the surface of the gate electrode 130 A relatively large depletion layer can be formed in the first conductivity type region 120. [ Therefore, even if the concentration of the first conductivity type region 120 is increased, a high breakdown voltage can be realized. As a result, the power rectifying device 100 having a low on-resistance can be realized while maintaining a high withstand voltage. Furthermore, since the energy consumed by the power rectifying device 100 during the current flow is reduced in this way, the power efficiency can also be improved.

It is to be understood that the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment of the invention, It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

100; Power rectifying device 110; The first conductive type substrate
120; A first conductivity type region 121; Trench
130; A gate electrode 131; Gate insulating film
140; A second conductivity type region 141; Lower region
142; Inclined region 143; Upper region
144; A second conductive type first region 145; The second conductive type second region
146; A channel region 150; The first conductive type source region
160; Anode electrode 170; Cathode electrode

Claims (11)

A first conductive type substrate;
A first conductive type region formed in the first conductive type substrate and having a trench in a downward direction;
A gate electrode embedded in the trench;
A second conductive type region formed on the outer side of the trench of the first conductive type region so as to protrude upward;
A first conductive type source region formed between the trench and the second conductive type region;
An anode electrode connected to the gate electrode, the second conductivity type region, and the first conductivity type source region; And
And a cathode electrode connected to the first conductive type substrate,
Wherein the depth of the trench is greater than the depth of the second conductivity type region. The method according to claim 1,
Wherein the gate electrode is a polysilicon of a first conductivity type or a second conductivity type, and a gate insulating film is interposed between the gate electrode and the trench. The method according to claim 1,
Wherein the first conductive type source region is formed between the second conductive type region and the trench, and the first conductive type source region and a portion of the second conductive type region form the same plane, and the sidewalls of the trench The power rectifying device comprising: The method according to claim 1,
Wherein when a forward voltage is applied between the anode electrode and the cathode electrode, a channel region is formed in a direction perpendicular to the second conductivity type region, whereby a forward turn-on voltage of the power rectifying device is lowered. The method according to claim 1,
Wherein a protrusion height of the second conductivity type region is greater than a protrusion height of the gate electrode. The method according to claim 1,
Wherein the width of the trench is less than the pitch between the second conductivity type regions. The method according to claim 1,
Wherein the width of the trench is less than the width of the second conductivity type region. The method according to claim 1,
Wherein the first conductivity type is N-type and the second conductivity type is P-type. The method according to claim 1,
Wherein the first conductivity type is P-type and the second conductivity type is N-type. The method according to claim 1,
The second conductivity type region
A lower region connected to a side wall of the trench;
An inclined region connected to the first conductive type source region and extending obliquely upward from the lower region; And
And an upper region extending upward from the sloped region and having a width less than the width of the lower region. The method according to claim 1,
The second conductivity type region
A second conductive type first region coupled to the trench and the first conductive type source region and having a first concentration; And
And a second conductive type second region formed inside the second conductive type first region and connected to the first conductive type region and the anode electrode and having a second concentration higher than the first concentration, A power rectifying device characterized by:

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