KR20120127226A - Pixel circuit, display device, electronic apparatus, and method for driving pixel circuit - Google Patents

Abstract

PURPOSE: A pixel circuit, a display device, an electronic device and a driving method of the pixel circuit are provided to suppress display unevenness due to the turn-on of an electro-optic device by controlling the opening and closing a current path of a display unit. CONSTITUTION: A pixel circuit includes a display unit and a storage capacitor(120). A write transistor records a driving voltage in the storage capacitor. The driving voltage is corresponded to an image signal. A driving transistor(121) drives the display unit based on the recorded driving voltage in the storage capacity. Opening and closing of a current path in the display unit are controlled. [Reference numerals] (104) Record scanning unit; (105) Drive scanning unit; (106) Horizontal driver(horizontal selector, data line driver); (109) (Drive transistor->n-channel type)

Description

Pixel circuit, display device, electronic device, and driving method of pixel circuit {PIXEL CIRCUIT, DISPLAY DEVICE, ELECTRONIC APPARATUS, AND METHOD FOR DRIVING PIXEL CIRCUIT}

The technology disclosed in this specification relates to a pixel circuit, a display device, an electronic device, and a driving method of a pixel circuit (display device).

In recent years, display devices having pixel circuits (also called pixels) including display elements (also referred to as electro-optical elements) and electronic devices including display devices are widely used. As a display element of a pixel, there is a display device using an electro-optical element whose luminance is changed by an applied voltage or a flowing current. For example, a liquid crystal display element is a representative example of an electro-optical element whose luminance changes due to an applied voltage, and an organic electro luminescence (organic EL) as an electro-optical element whose luminance changes due to a flowing current. Organic Light Emitting Diode, OLED; hereinafter referred to as organic EL). An organic EL display device using the latter organic EL element is a so-called self-luminous display device using an electro-optical element that is a self-luminous element as a display element of a pixel.

By the way, in the display device using a display element, a simple (passive) matrix method and an active matrix method can be adopted as the driving method. However, the simple matrix display device has a simple structure, but has a problem that it is difficult to realize a large and precise display device.

For this reason, in recent years, a pixel element supplied to a display element inside a pixel is similarly provided in an active element such as an insulated gate field effect transistor (typically a thin film transistor (TFT)). The development of the active matrix system which controls by using a transistor as a switching transistor is actively performed.

In the conventional active matrix display device, the threshold voltage and mobility of the transistor driving the display element are disturbed due to process variations. In addition, the characteristics of the display element fluctuate over time. Such characteristic disturbances of the driving transistors and characteristic fluctuations of the elements constituting the pixel circuit such as the display element affect light emission luminance. That is, when the video signals of the same level are supplied to each pixel, all the pixels emit light with the same brightness, and the screen can obtain a uniformity (uniformity), but the characteristics of the driving transistor are disturbed or the characteristics of the display element are changed. By doing so, the uniformity of the screen is impaired. Therefore, in order to uniformly control the luminescence brightness over the entire screen of the display device, a technique of correcting display irregularities caused by characteristic variations of elements constituting pixel circuits such as transistors or display elements in each pixel circuit, etc. is an example. For example, Japanese Patent No. 4240059 and Japanese Patent No. 4240068 are proposed.

Patent Document 1: Japanese Patent No. 4240059 Patent Document 2: Japanese Patent No. 4240068

However, when the process of supplying a current to the storage capacitor via the driving transistor while writing the driving voltage corresponding to the video signal to the storage capacitor is performed, the uniformity of the screen is impaired due to the turning on of the electro-optical element. I knew it was.

Accordingly, an object of the present disclosure is to suppress the display unevenness caused by the electro-optical element turning on when a process of supplying current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal in the storage capacitor. It is to provide the possible technology.

A pixel circuit according to the first aspect of the present invention includes a display portion, a storage transistor, a write transistor for writing a drive voltage corresponding to a video signal into a storage capacitor, and a display portion based on a drive voltage recorded in the storage capacitor. A driving transistor is provided. Then, the opening and closing of the current path of the display unit can be controlled in conjunction with the processing for recording the driving voltage corresponding to the video signal into the storage capacitor. Each pixel circuit described in the dependent claims of the pixel circuit according to the first aspect of the present disclosure defines an advantageous specific example of a further layer of the pixel circuit according to the first aspect of the present disclosure.

A display device according to the second aspect of the present disclosure includes a display unit, a storage transistor, a write transistor for recording a drive voltage corresponding to a video signal in a storage capacitor, and a drive for driving the display unit based on the driving voltage recorded in the storage capacitor. A display element having a transistor is arranged, and a control unit capable of controlling opening and closing of a current to the display unit in conjunction with a process of writing a driving voltage corresponding to a video signal into a storage capacitor. As for the display apparatus which concerns on a 2nd aspect, each technique and the method described in the subclaim of the pixel circuit which concerns on a 1st aspect are similarly applicable, and the structure to which it is applied is advantageous of the further further of the display apparatus which concerns on a 2nd aspect. Prescribe specific examples.

The electronic device according to the third aspect of the present disclosure includes a display unit, a storage transistor, a write transistor for recording a drive voltage corresponding to a video signal in a storage capacitor, and a drive for driving the display unit based on the driving voltage recorded in the storage capacitor. A display element having a transistor is arranged, and further comprising a signal generator for generating a video signal supplied to the pixel portion, and a process of writing a drive voltage corresponding to the video signal into a storage capacitor to a current of the display portion. The control part which can control opening and closing is provided. As for the electronic device which concerns on a 3rd aspect, each technique and the method described in the subclaim of the pixel circuit which concerns on a 1st aspect are similarly applicable, and the structure to which it is applied is more advantageous of the further of an electronic device which concerns on a 3rd aspect. Prescribe specific examples.

A driving method of a pixel circuit according to the fourth aspect of the present invention is a method of driving a pixel circuit having a driving transistor for driving a display unit, the display unit being in cooperation with a process of writing a drive voltage corresponding to an image signal into a storage capacitor. To control the opening and closing of the current. As the driving method of the pixel circuit according to the fourth aspect, the respective techniques and techniques described in the dependent claims of the pixel circuit according to the first aspect are similarly applicable, and the configuration to which the pixel circuit is applied is the Further advantageous specific examples of the drive method are defined.

In short, in the technique disclosed in the present specification, the opening and closing of the current to the display unit is controlled in conjunction with a process of writing the driving voltage corresponding to the video signal into the storage capacitor. The current path of the display portion can be closed (blocked) during a certain period of time corresponding to the process of supplying a current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal to the storage capacitor. The current path of the display unit can be closed for a certain period so that the display unit does not turn on. Even if a current flows to the display unit in this period, the "constant period" may be determined so that the display unit does not turn on. By using this technique in the process of recording the drive voltage corresponding to the video signal in the storage capacitor, display unevenness caused by the display unit turning on can be prevented.

According to the driving method of the pixel circuit according to the first aspect, the display device according to the second aspect, the electronic apparatus according to the third aspect, and the pixel circuit according to the fourth aspect, the driving voltage corresponding to the video signal is preserved. When performing a process of supplying a current to the storage capacitor via the driving transistor while writing to the capacitor, display unevenness caused by the electro-optical element turning on can be suppressed.

1 is a block diagram showing an outline of one configuration example of an active matrix display device.
2 is a block diagram showing an outline of an example of a configuration of an active matrix display device for color image display.
3 is a diagram illustrating a light emitting element (substantially a pixel circuit).
4 is a diagram illustrating one embodiment of a pixel circuit of a comparative example.
5 is a diagram illustrating an entire outline of a display device provided with a pixel circuit of a comparative example.
Fig. 6 is a diagram showing one form of the pixel circuit of the first embodiment.
FIG. 7 is a diagram showing an overall outline of a display device including the pixel circuit according to the first embodiment (first example). FIG.
FIG. 8 is a diagram showing an overall outline of a display device including a pixel circuit according to the first embodiment (second example). FIG.
9 is a timing chart illustrating a method of driving the pixel circuit of the comparative example.
10A to 10G illustrate equivalent circuits and operating states in a main period of the timing chart shown in FIG. 9.
FIG. 11 is a timing chart for explaining a driving method of a pixel circuit of Embodiment 1 focusing on countermeasures against display unevenness caused by the turn-on phenomenon of organic EL elements during a mobility correction period. FIG.
FIG. 12 is a diagram showing one form of a pixel circuit according to a second embodiment. FIG.
FIG. 13 is a diagram showing an overall outline of a display device including a pixel circuit according to a second embodiment. FIG.
14 is a diagram showing one form of the pixel circuit of the third embodiment;
FIG. 15 is a diagram showing an overall outline of a display device including a pixel circuit according to a third embodiment; FIG.
FIG. 16 is a timing chart for explaining a driving method of the pixel circuit of Example 3 focusing on countermeasures against display unevenness caused by the turn-on phenomenon of organic EL elements during the mobility correction period; FIG.
17A to 17E illustrate a fourth embodiment (electronic device).

EMBODIMENT OF THE INVENTION Hereinafter, with reference to drawings, embodiment of the technique disclosed by this specification is described in detail. When distinguishing each functional element by type, a reference letter of alphabet or " _n " (n is a number) or a combination thereof is added and described. The same applies to the drawings.

The description is made in the following order.

1. Overall Overview

2. Overview of display device

3. Light emitting element

4. Driving way: basic

5. Specific application examples:

Responding to display irregularities caused by turning on of the electro-optical device (control of opening and closing of the electro-optic device into a current)

Example 1 Controlling the opening and closing of a transistor in series with a write driving pulse

Example 2 Example 1 + Supplemental Dose

Example 3: A transistor is connected in series between the source of the driving transistor and the display portion + open / close control + auxiliary capacitance independently of the write drive pulse

Example 4 Application Example to Electronic Devices

<Overview>

In the configuration of the present embodiment, the pixel circuit, the display device, or the electronic device includes a display unit, a storage transistor, a write transistor for recording a drive voltage corresponding to the video signal in the storage capacitor, and a drive voltage recorded in the storage capacitor. In accordance with the present invention, a driving transistor for driving the display unit is provided. Then, the opening and closing of the current path of the display unit is controlled in conjunction with the processing for recording the driving voltage corresponding to the video signal into the storage capacitor.

In controlling the opening and closing of the current path of the display unit, the display unit is not turned on in a predetermined period corresponding to the process of supplying current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal to the storage capacitor. To control the opening and closing of the current. The display unit may not be turned on in the period, in other words, the current may not flow in the display unit in the period, or even if it flows, it may be stopped before turning on. It is good to decide. This prevents the display unit from turning on during the processing period of supplying current to the storage capacitor through the driving transistor while recording the driving voltage corresponding to the video signal in the storage capacitor, and causes display unevenness due to the display unit turning on. Can be prevented.

Preferably, as a member capable of controlling the opening and closing of the current to the display unit, it is preferable to use the transistor as the control transistor as the current. The control transistor may be disposed on the current path of the display unit. That is, the control transistor may be provided for each display element with a current capable of controlling the opening and closing of the current path of the display unit. The connection point with the capacitor and one end of the display unit may be connected in series, or may be connected in series between the other end of the display unit and the reference potential point.

In the on / off control of the control transistor with a current, the control transistor may be controlled in conjunction with a write drive pulse for controlling the write transistor, or may be controlled independently of the write drive pulse for controlling the write transistor. As a function section for turning on / off the control transistor with a current, a control scan section with a current may be provided. The transistor forming the control transistor with the current may be either an n-channel type or a p-channel type, and the polarity of the control pulse may be set in accordance with the polarity thereof.

Preferably, the storage capacitor may be provided, and one end thereof may be connected to a connection point between the other end of the storage capacitor and one main electrode end of the driving transistor, and the other end thereof may be connected to a predetermined reference potential point. The "predetermined reference potential point" may be, for example, the main electrode end on the power supply line side of the driving transistor, or the reference potential point on the other end side of the display portion.

Preferably, the capacitance of the storage capacitor may be about the same value as the capacitance of the parasitic capacitance of the display unit.

Preferably, the connection of the storage capacitor may be configured to be cut off in conjunction with a process of recording the drive voltage corresponding to the video signal in the storage capacitor. As a member which can control the connection of the storage capacitor, it is preferable to use a transistor.

Preferably, a process of supplying a current to the storage capacitor through the driving transistor while supplying the video signal to the control input terminal and the storage capacitor end of the driving transistor through the write transistor, and the mobility correction processing of correcting the mobility of the driving transistor It is good to use as.

Preferably, it is good to use together with the correction process of the threshold voltage of a drive transistor. In this case, after the threshold voltage correction process of the drive transistor, it is preferable to perform the process of supplying a current to the storage capacitor through the drive transistor, that is, the mobility correction after the threshold value correction. Preferably, the current path of the display unit is not interrupted in the threshold voltage correction process.

The device configuration may be one pixel circuit (display section) or may include a pixel section in which the display section is arranged in a line or two-dimensional matrix. In the case of a configuration including the pixel portion, preferably, the control portion for blocking and controlling the current path of the display portion in conjunction with a process of supplying a current to the storage capacitance through the driving transistor while writing the driving voltage corresponding to the video signal in the storage capacitance. It is good to provide. It is preferable to provide the scanning part which forms a part of a control part separately from a display part (display element), and when a display part is equipped with the pixel part arrange | positioned in the two-dimensional matrix form, it is the current of a display part for every row by a scanning process. It can take the configuration to block the control.

As the display portion, for example, a light emitting element including self-luminous light emitting portions such as an organic electroluminescent light emitting portion, an inorganic electro luminescent light emitting portion, an LED light emitting portion, and a semiconductor laser light emitting portion can be used. The organic electroluminescent light emitting unit may be used.

<Overview of display device>

In the following description, in order to make understanding of a correspondence relationship easy, the resistance value, capacitance value (capacitance, capacitance), etc. of a circuit structural member may be shown with the code | symbol same as the code | symbol attached to the member.

[basic]

First, the outline | summary of the display apparatus provided with the light emitting element is demonstrated. In the following description of the circuit configuration, "electrical connection" is simply referred to as "connection", and unless otherwise specified, the "electrical connection" is not limited to being directly connected, and other transistors (such as switching transistors) Typical examples include those connected via other electric elements (not only active elements but also passive elements).

The display device includes a plurality of pixel circuits (or may be referred to only as pixels). Each pixel circuit has a display element (electro-optical element) provided with a light emission part and a drive circuit which drives a light emission part. As the display portion, for example, a light emitting element including self-emissive light emitting portions such as an organic electro luminescence light emitting portion, an inorganic electro luminescence light emitting portion, an LED light emitting portion, and a semiconductor laser light emitting portion can be used. In addition, although the constant current drive type | mold is employ | adopted as a method of driving the light emitting part of a display element, in principle, it is not limited to a constant current drive type | mold, A constant voltage drive type | mold may be sufficient.

In the example described below, it demonstrates as a case where the organic electroluminescent light emitting part is provided as a light emitting element. More specifically, the light emitting element is an organic electroluminescent element (organic EL element) having a structure in which a driving circuit and an organic electroluminescent light emitting portion (light emitting portion ELP) connected to the driving circuit are laminated. .

As a driving circuit for driving the light emitting section ELP, there are various circuits, but the pixel circuit includes a driving circuit such as a 5Tr / 1C type, a 4Tr / 1C type, a 3Tr / 1C type, or a 2Tr / 1C type. You can to Α in the &quot; α Tr / 1C type &quot; means the number of transistors, and &quot; 1C &quot; means that the capacitor section includes one storage capacitor C _cs (capacitor). Preferably, each transistor constituting the driving circuit is composed of all n-channel transistors, but it is not limited to this. In some cases, some transistors may be p-channel type. . It is also possible to have a structure in which a transistor is formed in a semiconductor substrate or the like. The structure of the transistor constituting the driving circuit is not particularly limited, and an insulated gate field effect transistor (typically, a thin film transistor TFT) using a MOS type FET as a representative example can be used. Further, the transistor constituting the drive circuit may be either an enhancement type or a progression type, or may be either a single gate type or a dual gate type.

In any configuration, the display device is basically the light emitting unit ELP, the driving transistor TR _D , and the writing transistor TR _W (also referred to as a sampling transistor) as the smallest component, similar to the 2Tr / 1C type. At least a vertical scanning unit having a write scanning unit, a horizontal drive unit having a function of a signal output unit, and a storage capacitor C _cs . Preferably, in order to construct a bootstrap circuit, a storage capacitor (between the control input terminal (gate terminal) of the driving transistor TR _D and one of the main electrode terminals (source / drain regions) (typically the source terminal) C _cs ) is connected. In the driving transistor TR _D , one side of the main electrode terminal is connected to the light emitting unit ELP, and the other side of the main electrode terminal is connected to the power supply line PWL. The power supply line PWL is supplied with a power supply voltage (normal voltage or pulse voltage) from a power supply circuit or a scanning circuit for the power supply voltage.

The horizontal driver is configured to display a wide image signal V _s representing a video signal V _sig for controlling the luminance in the light emitting unit ELP, or a reference potential (not limited to one type) used for threshold correction or the like. Supply to the signal line DTL (also called a data line). In the write transistor TR _W , one side of the main electrode terminal is connected to the video signal line DTL, and the other side of the main electrode terminal is connected to the control input terminal of the driving transistor TR _D. Writing scanning unit is supplied to the control input terminal of the write transistor (TR _W) to on / off control of the control pulse (write pulse drive (WS)) record scanning line write transistor (TR _W) through (WSL) for that. The connection point between the other end of the main electrode terminal of the write transistor TR _{W and} the control input terminal of the driving transistor TR _D and one end of the storage capacitor C _cs is called the first node ND ₁ , and the driving transistor TR _D is referred to as a first node ND ₁ . The connection point between one end of the main electrode terminal and the other end of the storage capacitor C _cs is referred to as a second node ND ₂ .

[Configuration example]

1 and 2 are block diagrams showing an outline of an example of a configuration of an active matrix display device which is one embodiment of the display device according to the present disclosure. FIG. 1 is a block diagram showing an outline of a configuration of a general active matrix display device, and FIG. 2 is a block diagram showing an outline in the case of corresponding color image display.

As shown in FIG. 1, the display device 1 has an aspect ratio in which the pixel circuit 10 (also referred to as a pixel) having an organic EL element (not shown) as a plurality of display elements has a display aspect ratio of X: Y ( For example, a drive signal generation unit that is an example of a display panel unit 100 arranged to form an effective image area of 9: 16 and a panel control unit that emits various pulse signals for driving control of the display panel unit 100. 200 (so-called timing generator) and a video signal processing unit 220 are provided. The drive signal generation unit 200 and the video signal processing unit 220 are embedded in a single chip integrated circuit (IC), and are disposed outside the display panel unit 100 in this example.

In addition, as a product form, as shown in the figure, the display apparatus 1 of the module (composite component) form which comprises all the display panel part 100, the drive signal generation part 200, and the video signal processing part 220 is shown. The present invention is not limited to being provided as, but may be provided as the display device 1 only with the display panel unit 100, for example. In addition, the display device 1 includes a module-shaped one having a sealed configuration. For example, the display module may be formed by being attached to the pixel array unit 102 on an opposite side such as transparent glass. A color filter, a protective film, a light shielding film, etc. may be provided in the transparent opposing part. The display module may be provided with a circuit portion for inputting and outputting video signals V _sig and various driving pulses to the pixel array unit 102 from the outside, an FPC (Flexible Print Circuit), and the like.

Such a display device 1 is used for various electronic devices, for example, a portable music player using a recording medium such as a semiconductor memory, a mini disk (MD), a cassette tape, a digital camera, a notebook personal computer, a mobile phone, or the like. A video signal input to an electronic device such as a portable terminal device, a video camera, or a video signal generated in the electronic device can be used as a display part of electronic equipment in all fields for displaying as a still picture or a moving picture (video).

The display panel unit 100 scans the pixel array unit 102 and the pixel circuit 10 in a vertical direction on the substrate 101 in which the pixel circuits 10 are arranged in a matrix of M rows by N columns. The vertical driver 103, a horizontal driver 106 (also called a horizontal selector or a data line driver) for scanning the pixel circuit 10 in the horizontal direction, and each driver (vertical driver 103 and the horizontal driver 106). ) And an interface portion 130 (IF) for interfacing with an external circuit, a terminal portion 108 (pad portion), and the like for external connection. That is, peripheral drive circuits such as the vertical drive unit 103, the horizontal drive unit 106, and the interface unit 130 are formed on the same substrate 101 as the pixel array unit 102. The light emitting element (pixel circuit 10) positioned in the mth row (m = 1, 2, 3, ..., M) and the nth column (n = 1, 2, 3, ..., N) is shown in FIG. n and m are shown.

The interface unit 130 includes a vertical IF unit 133 that interfaces with the vertical driver 103 and an external circuit, and a horizontal IF unit 136 that interfaces with the horizontal driver 106 and an external circuit.

As the vertical drive unit 103 and the horizontal drive unit 106, a control unit 109 is configured to control the recording of the signal potential into the storage capacitance, the threshold correction operation, the mobility correction operation, and the bootstrap operation. A drive control circuit including the control unit 109 and the interface unit 130 (vertical IF unit 133 or horizontal IF unit 136) for driving control of the pixel circuit 10 of the pixel array unit 102. It consists.

In the case of 2Tr / 1C type, the vertical drive unit 103 may include a drive scanning unit (drive scanner DS) that functions as a write scanning unit (light scanner WS; Write Scan) or a power scanner having a power supply capability; Drive Scan). As an example, the pixel array unit 102 is driven by the vertical driver 103 at one or both sides in the left and right directions shown, and is driven by the horizontal driver 106 at one or both sides in the illustrated up and down directions. .

The terminal unit 108 is supplied with various pulse signals from the drive signal generation unit 200 disposed outside the display device 1. Similarly, the image signal V _sig is supplied from the image signal processor 220. For the color display in correspondence with, saekbyeol video signal (V _{sig_R)} of (in this example, R (red), G (green), B (blue three primary colors)), the video signal (V _{sig_G),} the video signal (V _{sig_B} ) Is supplied.

As an example, as a pulse signal for vertical driving, a shift start pulse SP (two types of SPDS and SPWS in the drawing) or a vertical scan clock CK (FIG. Necessary pulse signals such as vertical scan clock xCK (two types of xCKDS and xCKWS in the figure) and enable pulses instructing pulse output at a specific timing are supplied. As a pulse signal for horizontal driving, a horizontal start pulse SPH or a horizontal scan clock CKH which is an example of a horizontal scan start pulse, a horizontal scan clock xCKH phase-inverted as necessary, and a pulse output at a specific timing Necessary pulse signals, such as enable pulses, are supplied.

Each terminal of the terminal part 108 is connected to the vertical drive part 103 or the horizontal drive part 106 via the wiring 109. For example, each pulse supplied to the terminal section 108 internally adjusts the voltage level in a level shifter section (not shown) as needed, and then, through the buffer, each part of the vertical driver section 103 or the horizontal drive section ( 106).

Although the pixel array unit 102 omits the illustration (the details will be described later), the pixel circuit 10 provided with the pixel transistors for the organic EL element as the display element is two-dimensionally arranged in a matrix, and the rows are arranged for the pixel array. Each vertical scan line SCL is wired, and each video signal line DTL is wired. That is, the pixel circuit 10 is connected to the vertical driver 103 through the vertical scanning line SCL and to the horizontal driver 106 via the video signal line DTL. Specifically, for each pixel circuit 10 arranged in a matrix shape, n vertical rows (SCL_1 to SCL_n) of n rows driven by driving pulses by the vertical driver 103 are wired for each pixel row. The vertical driver 103 is constituted by a combination of logic gates (including latches, shift registers, and the like), and selects each pixel circuit 10 of the pixel array unit 102 in units of rows, that is, generates drive signals. Based on the pulse signal of the vertical driving system supplied from the unit 200, each pixel circuit 10 is sequentially selected through the vertical scanning line SCL. The horizontal driver 106 is constituted by a combination of logic gates (including latches, shift registers, and the like), and selects each pixel circuit 10 of the pixel array unit 102 in units of columns, that is, generates drive signals. Based on the pulse signal of the horizontal driving system supplied from the unit 200, the predetermined potential (for example, the image signal V _sig ) of the image signal V _s is transmitted to the selected pixel circuit 10 through the image signal line DTL. Level) is sampled and recorded in the storage capacity (C _cs ).

The display device 1 of the present embodiment is capable of linear sequential driving and point sequential driving, and the write scanning unit 104 and the driving scanning unit 105 of the vertical driving unit 103 are arranged in a linear order (that is, While scanning the pixel array unit 102 in rows, the horizontal drive unit 106 synchronizes the image signal with one horizontal line simultaneously (in case of linear order) or in pixel units (dot order). Is written into), the pixel array unit 102 writes.

To take a color image display correspondence, the pixel array unit 102 includes, for example, color classification (three primary colors of R (red), G (green), and B (blue) in this example), as shown in FIG. of a pixel circuit (10 _{_R),} the pixel circuit (10 _{_G),} the pixel circuit (10 _{_B)} as a sub-pixel is arranged in a vertical stripe shape in a predetermined arrangement order. One pixel of color is formed by one set of subpixels for each color. Here, as an example of the subpixel layout, a stripe structure in which subpixels of each color are arranged in a vertical stripe shape is shown. However, the subpixel layout is not limited to such an arrangement example. A form in which the subpixels are shifted in the vertical direction may be adopted.

In addition, although the structure which arrange | positions the vertical drive part 103 (in detail its components) is shown only in one side of the pixel array part 102 in FIG. 1 and FIG. 2, each element of the vertical drive part 103 is a pixel. It is also possible to adopt a configuration in which the array unit 102 is sandwiched and disposed on both left and right sides. Moreover, you may employ | adopt the structure which arrange | positions one side and the other of each element of the vertical drive part 103 separately for each of right and left. Similarly, although FIG. 1 and FIG. 2 show the structure which arrange | positions the horizontal drive part 106 only to one side of the pixel array part 102, the horizontal drive part 106 is inserted on both sides of the pixel array part 102 in the upper and lower sides. The arrangement to deploy may also be adopted. In this example, a pulse signal such as a vertical shift start pulse, a vertical scan clock, a horizontal start pulse, or a horizontal scan clock is input from the outside of the display panel unit 100. However, these various timing pulses are generated. The driving signal generator 200 may be mounted on the display panel 100.

The illustrated configuration is merely an example of a display device, and may be any other form as a product form. That is, the display device includes a pixel array unit in which elements constituting the pixel circuit 10 are arranged in a matrix form, and a control unit including a scan unit arranged around the pixel array unit and connected to scan lines for driving each pixel. And a drive signal generator or video signal processor for generating various signals for operating the controller, the entire apparatus may be configured. As a product form, the form shown in figure which separates the display panel part, a drive signal generation part, and the image signal processing part which mounted the pixel array part and a control part on the same base (for example, a glass substrate) is called a panel-positioned arrangement. In addition to the display panel unit, a pixel array unit is mounted, and a peripheral circuit such as a control unit, a drive signal generator, or an image signal processor is mounted on a separate substrate (for example, a flexible substrate) (outside the peripheral circuit panel). Can be adopted). In the case of the arrangement on the panel which mounts the pixel array unit and the control unit on the same base and constitutes the display panel unit, the control unit (a driving signal generation unit or an image signal processing unit as necessary) simultaneously with the step of generating TFTs of the pixel array unit. For generating a transistor (called a transistor integrated configuration) and a controller on a substrate on which a pixel array unit is mounted by a COG (Chip On Glass) mounting technique (also a driving signal generation unit or an image signal processing unit as required) May be adopted in which the semiconductor chip is directly mounted (called a COG mounting configuration). Alternatively, the display device may be provided as a display device only by the display panel portion (with at least the pixel array portion).

<Light emitting element>

FIG. 3 is a diagram illustrating a light emitting element 11 (substantially a pixel circuit 10) including a drive circuit. 3 is a schematic partial cross-sectional view of a part of light emitting element 11 (pixel circuit 10). In FIG. 3, the insulated gate field effect transistor is referred to as a thin film transistor (TFT). Although not shown, a so-called back gate thin film transistor or an MOS transistor may be used.

Each transistor and the capacitor portion (storage capacitor C _cs ) constituting the driving circuit of the light emitting element 11 are formed on the holder 20, and the light emitting portion ELP is, for example, an interlayer insulating layer ( Through 40), it is formed above each transistor and the storage capacitor C _cs constituting the driving circuit. One source / drain region of the driving transistor TR _D is connected to the anode electrode provided in the light emitting portion ELP via a contact hole. In FIG. 3, only the driving transistor TR _{D is} shown. The write transistor TR _W and the other transistors are hidden and are not visible. The light emitting part ELP has a well-known structure and structure, such as an anode electrode, a hole transport layer, a light emitting layer, an electron carrying layer, a cathode electrode, etc., for example.

Specifically, the driving transistor TR _D includes the gate electrode 31, the gate insulating layer 32, the semiconductor layer 33, the source / drain region 35 provided in the semiconductor layer 33, and the source / The portion of the semiconductor layer 33 between the drain regions 35 is composed of the corresponding channel formation region 34. The storage capacitor C _cs is composed of the other electrode 36, the dielectric layer composed of the extending portion of the gate insulating layer 32, and one electrode 37 (corresponding to the second node ND ₂ ). . The gate electrode 31, a part of the gate insulating layer 32, and the other electrode 36 constituting the storage capacitor C _cs are formed on the holder 20. One source / drain region 35 of the driving transistor TR _D is connected to the wiring 38, and one source / drain region 35 is connected to one electrode 37. The driving transistor TR _D , the storage capacitor C _cs , and the like are covered with the interlayer insulating layer 40, and the anode electrode 51, the hole transport layer, the light emitting layer, the electron transport layer, and the like are disposed on the interlayer insulating layer 40. The light emitting part ELP which consists of the cathode electrodes 53 is provided. In FIG. 3, the hole transport layer, the light emitting layer, and the electron transport layer are shown as one layer 52. A second interlayer insulating layer 54 is provided on the portion of the interlayer insulating layer 40 without the light emitting portion ELP, and a transparent substrate (on the second interlayer insulating layer 54 and the cathode electrode 53) 21 is disposed, and light emitted from the light emitting layer passes through the substrate 21 and is emitted to the outside. One electrode 37 and the anode electrode 51 are connected by a contact hole provided in the interlayer insulating layer 40. The cathode electrode 53 is provided on the extending portion of the gate insulating layer 32 through the second interlayer insulating layer 54, the contact hole 56 provided in the interlayer insulating layer 40, and the contact hole 55. It is connected to (39).

[How to drive]

The driving method of the light emitting portion will be described below. For ease of understanding, it is explained that each transistor constituting the pixel circuit 10 is composed of an n-channel transistor. It is assumed that the light emitting portion ELP has an anode end connected to the second node ND ₂ , and the cathode end connected to a cathode wiring cath (the potential of which is referred to as the cathode potential V _cath ). Furthermore, the light emission state (luminance) in the light emitting part ELP is controlled by the magnitude of the value of the drain current I _ds . In the light emitting state of the light emitting element, one of the two main electrode terminals (source / drain region) of the driving transistor TR _D (the anode side of the light emitting portion ELP) acts as the source terminal (source region), and the other It acts as a drain stage (drain region). The display device is composed of pixel circuits 10 corresponding to color display and arranged in (N / 3) × M two-dimensional matrix shapes, and one pixel circuit forming one unit of color display includes three parts. It is _assumed that it is composed of a pixel circuit (a red light emitting pixel circuit 10 _{_ R} emitting red, a green light emitting pixel circuit 10 _{_ G} emitting green, and a blue light emitting pixel circuit 10 _{_B} emitting blue). The light emitting elements constituting each pixel circuit 10 are assumed to be linearly driven, and the display frame rate is FR (times / second). That is, each of the (N / 3) pixel circuits 10 arranged in the m-th row (where m = 1, 2, 3, ..., M), more specifically, each of the N pixel circuits 10 The light emitting element which comprises is driven simultaneously. In other words, in each light emitting element constituting one row, the timing of the light emission / non-emission is controlled in units of rows to which they belong. In addition, the process of recording a video signal with respect to each pixel circuit 10 which comprises one row may be the process (also called simultaneous write process) which simultaneously records a video signal with respect to all the pixel circuits 10, or a pixel It may be a process (also called a sequential write process) of sequentially recording video signals for each circuit 10. What kind of recording process is to be selected may be appropriately selected depending on the configuration of the driving circuit.

Here, the driving operation with respect to the light emitting element (pixel circuit 10) positioned in the mth row and the nth column (where n = 1, 2, 3, ..., N) will be described. In this regard, the light emitting elements positioned in the mth row and the nth column are referred to as (n, m) th light emitting elements or (n, m) th light emitting element pixel circuits. Various processes (threshold value correction process, recording process, mobility correction process, etc.) are performed until the horizontal scanning period (the mth horizontal scanning period) of each light emitting element arranged in the mth row ends. . In addition, the recording process and the mobility correction process need to be performed within the mth horizontal scanning period. On the other hand, depending on the type of the drive circuit, the threshold correction processing or preprocessing accompanying it can be performed before the mth horizontal scanning period.

After all the above-mentioned various processes are completed, the light emitting part constituting each light emitting element arranged in the mth row is made to emit light. In addition, the light emitting part may be made to emit light immediately after all the various processes are completed, or the light emitting part may be made to emit light after a predetermined period of time (for example, a horizontal scanning period of a predetermined number of rows) elapses. What is necessary is just to set a "predetermined period" according to the specification of a display apparatus, the structure of the pixel circuit 10 (namely, a drive circuit), etc. In the following, for convenience of explanation, the light emitting part is made to emit light immediately after completion of various processes. Light emission of the light emitting portion constituting each light emitting element arranged in the mth row is continued until immediately before the start of the horizontal scanning period of each light emitting element arranged in the (m + m ') th row. What is necessary is just to determine "m '" by the design specification of a display apparatus. That is, the light emission of the light emitting portion constituting each light emitting element arranged in the mth row of a display frame continues until the (m + m'-1) th horizontal scanning period. On the other hand, from the timing of the (m + m ') th horizontal scanning period, until the recording process or mobility correction processing is completed within the mth horizontal scanning period in the next display frame, The light emitting portion constituting each of the light emitting elements arranged on the m-th line maintains a non-light emitting state as a rule. By providing a period in the non-light emitting state (also referred to as a non-light emitting period), the afterimage blurring associated with the active matrix driving can be reduced, and the moving picture quality can be made better. However, the light emitting state / non-light emitting state of each pixel circuit 10 (light emitting element) is not limited to the state demonstrated above. The length of time of the horizontal scanning period is less than (1 / FR) x (1 / M) seconds. When the value of (m + m ') exceeds M, the horizontal scanning period for the excess portion is processed in the next display frame.

When the transistor is in an on state (conductive state), it means a state in which a channel is formed between the main electrode ends (between the source / drain regions), and whether or not current flows from one main electrode end to the other main electrode end. Does not ask. The fact that the transistor is in an off state (non-conducting state) means that a channel is not formed between the main electrode terminals. The main electrode terminal of one transistor connected to the main electrode terminal of another transistor includes a form in which the source / drain region of one transistor and the source / drain region of another transistor occupy the same region. Furthermore, the source / drain regions can be made of a conductive material such as polysilicon or amorphous silicon containing impurities, but also made of metals, alloys, conductive particles, laminated structures thereof, and organic materials (conductive polymers). It can consist of layers. In addition, in the timing chart used by the following description, the length (time length) of the horizontal axis which shows each period is typical, and does not show the ratio of the time length of each period.

The driving method of the pixel circuit 10 includes a preprocessing step, a threshold value correction step, a video signal recording process step, a mobility correction step, and a light emitting step. The preprocessing step, the threshold value correction step, the video signal recording processing step, and the mobility correction step are collectively referred to as a non-luminescence step. Depending on the configuration of the pixel circuit 10, the video signal recording processing step and the mobility correction step may be performed simultaneously. Each process is outlined.

In this regard, the driving transistor TR _D is driven to flow the drain current I _ds in accordance with the following formula (1) in the light emitting state of the light emitting element. The light emitting part ELP emits light when the drain current I _ds flows through the light emitting part ELP. Furthermore, the light emission state (luminance) in the light emitting part ELP is controlled by the magnitude of the value of the drain current I _ds . In the light-emitting state of the light emitting element, one of the two main electrode terminals (source / drain region) of the driving transistor TR _D (the anode end side of the light emitting portion ELP) acts as the source terminal (source region), and the other. It acts as a drain stage (drain region). For convenience of explanation, in the following description, one main electrode end of the driving transistor TR _D may be referred to only as a source end, and the other main electrode end may be referred to as only a drain end. Also, the effective mobility is μ, the channel length is L, the channel width is W, and the potential difference between the potential of the control electrode terminal (gate potential V _g ) and the potential of the source terminal (source potential V _s ) (gate- The source voltage) is V _gs , the threshold voltage is V _th , and the equivalent capacitance is C _ox ((dielectric constant of gate insulating layer) × (dielectric constant of vacuum) / (thickness of gate insulating layer)), and the coefficient (k) ( Let it be (1/2) * (W / L) * _Cox .

I _ds = _kμ (V _gs -V _th ) ² (1)

In the following description, a capacitance (C _el) of the parasitic capacitance of the light emitting portion (ELP) unless otherwise lead is, parasitic capacitance (C _cs) and the driving transistor (TR _D) of the storage capacitor (C _cs) one example the gate of the dose-compared and the source capacitance (C _gs) that a sufficiently large value, the potential of the gate terminal of the driving transistor (TR _D) a drive based on the change of the (gate voltage (V _g)) the transistor (TR _D The change of the potential (source potential V _s ) of the source region (second node ND ₂ ) of the () is not taken into account.

[Pretreatment Administration]

The potential difference between the first node ND ₁ and the second node ND ₂ exceeds the threshold voltage V _th of the driving transistor TR _D , and the second node ND ₂ and the light emitting part ELP. The first node initializing voltage V _ofs is applied to the first node ND ₁ so that the potential difference between the cathode electrode provided at the _Nr ) does not exceed the threshold voltage V _thEL of the light emitting unit ELP, The second node initialization voltage V _ini is applied to the second node ND ₂ . For example, the image signal V _sig for controlling the luminance in the light emitting part ELP is 0 to 10 volts, the power supply voltage V _cc is 20 volts, and the threshold voltage V _th of the driving transistor TR _D. ) Is 3V, the cathode potential (V _cath ) is 0 volts, and the threshold voltage (V _thEL ) of the light emitting part ELP is 3 volts. In this case, the potential V _ofs for initializing the potential of the control input terminal of the driving transistor TR _D (the gate potential V _g , that is, the potential of the first node ND ₁ ) is 0 volt, and the driving transistor TR The potential V _ini for initializing the potential (source potential V _s , ie, potential of the second node ND ₂ ) of the source terminal of _D ) is -10 volts.

[Threshold correction processing stroke]

A first threshold voltage while maintaining the potential of the node (ND ₁₎ state, the driving transistor (TR _D) the drain current (I _ds) of spills, the first driving transistor (TR _D) from the potential of the node (ND ₁₎ to The potential of the second node ND ₂ is changed toward the potential after subtracting V _th . At this time, a voltage exceeding the voltage of applying the threshold voltage V _th of the driving transistor TR _D to the potential of the second node ND ₂ after the preprocessing stroke (for example, a power supply voltage at the time of light emission) is obtained. It is applied to the (TR _D) in the (opposite to the second node (ND ₂₎₎ the other extreme of weeks. In this threshold correction process, the potential difference (in other words, the gate-source voltage V _gs of the driving transistor TR _D ) between the first node ND ₁ and the second node ND ₂ is the driving transistor TR. _The degree of approaching the threshold voltage V _th of _D ) depends on the time of the threshold correction process. Therefore, for example, if the time for the threshold correction processing is sufficiently long, the potential of the second node ND ₂ is obtained by subtracting the threshold voltage V _th of the driving transistor TR _D from the potential of the first node ND ₁ . At the potential, the driving transistor TR _D is turned off. On the other hand, for example, when it is necessary to shorten the time of the threshold correction process, the potential difference between the first node ND ₁ and the second node ND ₂ is the threshold voltage V _th of the driving transistor TR _D. ), The driving transistor TR _D may not be turned off. As a result of the threshold correction processing, the driving transistor TR _D does not necessarily need to be turned off. In the threshold correction process, preferably, the potential is selected and determined so as to satisfy Expression (2) so that the light emitting portion ELP does not emit light.

(V _ofs -V _th ) <(V _thEL + V _cath ) (2)

[Video signal recording processing stroke]

The image signal V _sig is applied to the first node ND ₁ from the image signal line DTL through the write transistor TR _W turned on by the write driving pulse WS from the write scan line WSL. The potential of the first node ND ₁ is raised to V _sig . The charge based on the potential change (V _in = V _sig -V of _s ) of the first node ND ₁ includes the storage capacitor C _cs , the parasitic capacitance C _el of the light emitting part ELP, and the driving transistor. Parasitic capacitance (TR _D ) (e.g., gate-source capacitance C _gs , etc.). According to source capacitance (C _gs) capacitance if a sufficiently large value as compared with the (C _gs), the potential change in minutes (V _sig -V _ofs) of-capacitance (C _el) a capacitance (C _cs) and the gate The change in potential of one second node ND ₂ is small. In general, the capacitance (C _el), the capacitance (C _cs) and the gate of the storage capacitor (C _cs) of the parasitic capacitance (C _el) of the light emitting portion (ELP) - capacitance of the source capacitance (C _gs) ( _Greater than C _gs ). In view of this, except for the case where it is necessary to be special, the potential change of the second node ND ₂ caused by the potential change of the first node ND ₁ is not considered. In this case, the gate-source voltage V _gs can be expressed by equation (3).

V _g = V _sig

V _s ≒ V _ofs -V _th

_{V gs ≒ V sig - (V} ofs -V th) (3)

[Mobility Correction Processing Stroke]

While it is supplying a video signal (V _sig) through a write transistor (TR _W) to one end of the storage capacitor (C _cs) (i.e., while the recording on the video signal (V _sig) and the corresponding driving voltage retention capacity (C _cs)) The current is supplied to the storage capacitor C _cs through the driving transistor TR _D. For example, the first node ND ₁ receives the image signal V _sig from the image signal line DTL through the write transistor TR _W turned on by the write driving pulse WS from the write scan line WSL. ), While supplying power to the driving transistor TR _D and flowing a drain current I _ds to change the potential of the second node ND ₂ , and after a predetermined period of time, the write transistor TR _W ) Off. The potential change of the second node ND _{2 at} this time is ΔV (= potential correction value, negative feedback amount). The predetermined period for performing the mobility correction process may be determined in advance as a design value when the display device is designed. In this case, the mobility correction period is preferably determined so as to satisfy Expression (2A). In this way, the light emitting portion ELP does not emit light in the mobility correction period.

(V _ofs -V _th + △ V) <(V _thEL + V _cath ) (2A)

When the value of the mobility μ of the driving transistor TR _D is large, the potential correction value ΔV becomes large, and when the value of the mobility μ is small, the potential correction value ΔV decreases. The gate-source voltage V _gs (that is, the potential difference between the first node ND ₁ and the second node ND ₂ ) of the driving transistor TR _{D at} this time can be expressed by equation (4). The gate-source voltage V _gs defines the luminance at the time of light emission. The potential correction value _ΔV is proportional to the drain current I _ds of the driving transistor TR _D , and the drain current I _ds is the mobility. Since it is proportional to (μ), as a result, since the potential correction value (ΔV) becomes larger as the mobility (μ) is larger, the variation in the mobility (μ) for each pixel circuit 10 can be eliminated.

_{V gs ≒ V sig - (V} ofs -V th) - △ V (4)

[Light Emitting Process]

By turning off the write transistor TR _W by the write drive pulse WS from the write scan line WSL, the first node ND ₁ is made floating and power is supplied to the drive transistor TR _D. Thus, the current I corresponding to the gate-source voltage V _gs (potential difference between the first node ND ₁ and the second node ND ₂ ) of the driving transistor TR _D through the driving transistor TR _{D. ds} ) is driven to the light emitting portion ELP to drive the light emitting portion ELP to emit light.

[High points by the structure of the drive circuit]

Here, the differences between the typical 5Tr / 1C type, 4Tr / 1C type, 3Tr / 1C type, and 2Tr / 1C type, respectively, are as follows. In the 5Tr / 1C type, the first transistor TR ₁ (light emission control transistor) connected between the main electrode terminal on the power supply side of the driving transistor TR _D and the power supply circuit (power supply unit) and the second node initialization voltage are applied. The second transistor TR ₂ and the third transistor TR ₃ to which the first node initialization voltage is applied are provided. The first transistor TR ₁ , the second transistor TR ₂ , and the third transistor TR ₃ are all switching transistors. The first transistor TR ₁ is left in the light emission period, is turned off, enters the non-light emission period, and is turned on once in the subsequent threshold correction period, and again after the mobility correction period (next light emission). The period is also turned on. The second transistor TR ₂ is turned on only during the initialization period of the second node, and is otherwise turned off. The third transistor TR ₃ is turned on only from the initialization period of the first node to the threshold correction period, and is otherwise turned off. The write transistor TR _W is turned on from the video signal write processing period to the mobility correction processing period, and is otherwise turned off.

In the 4Tr / 1C type, the third transistor TR ₃ that applies the first node initialization voltage is omitted from the 5Tr / 1C type, and the first node initialization voltage is connected to the image signal V _sig from the image signal line DTL. It is supplied in time division. In order to supply the first node initialization voltage from the image signal line DTL to the first node in the initialization period of the first node, the write transistor TR _W is also turned on in the initialization period of the first node. Typically, the write transistor TR _W is turned on from the initialization period of the first node to the mobility correction processing period, and is otherwise turned off.

In the 3Tr / 1C type, the second transistor TR ₂ and the third transistor R3 are omitted from the 5Tr / 1C type, and the first node initialization voltage and the second node initialization voltage are obtained from the video signal line DTL. (V _sig ) and time division are supplied. The potential of the video signal line DTL is to set the second node to the second node initialization voltage in the initialization period of the second node, and to set the first node to the first node initialization voltage in the subsequent initialization period of the first node. For this purpose, the voltage V _{ofs_H} corresponding to the second node initialization voltage is supplied, and then the first node initialization voltage V _{ofs_L} (= V _ofs ) is set. Correspondingly, the write transistor TR _W is turned on in the initialization period of the first node and the initialization period of the second node. Typically, the write transistor TR _W is turned on from the initialization period of the second node to the mobility correction processing period, and is otherwise turned off.

In this regard, in the 3Tr / 1C type, the potential of the second node ND ₂ is changed using the video signal line DTL. For this reason, the capacitance C _{cs of the} storage capacitance C _cs is set to a value larger than other driving circuits (for example, the capacitance C _cs ) by about 1/4 of the capacitance C _el . To about 1/3). Therefore, it is considered that the degree of potential change of the second node ND ₂ caused by the potential change of the first node ND ₁ is greater than that of other driving circuits.

In the 2Tr / 1C type, the first transistor TR ₁ , the second transistor TR ₂ , and the third transistor TR ₃ are omitted from the 5Tr / 1C type, and the first node initialization voltage is the image signal line DTL. from being supplied to the video signal (V _sig) with a time division, a second node initialization voltage is a starting extreme of the power source side of the driving transistor (TR _D), the first potential _{(V cc_H) (= 5Tr /} 1C type of V _cc), and It is given by pulse driving at the second potential V _{cc_L} (V _{ini of} type = 5Tr / 1C). The main electrode terminal on the power supply side of the driving transistor TR _D becomes the first potential V _{cc_H} in the light emission period and becomes the second potential V _{cc_L} to enter the non-light emission period and after the threshold correction period thereafter (the next light emission). Period 1) becomes the first potential V _{cc_H} . In order to supply the first node initialization voltage from the image signal line DTL to the first node in the initialization period of the first node, the write transistor TR _W is also turned on in the initialization period of the first node. Typically, the write transistor TR _W is turned on from the initialization period of the first node to the mobility correction processing period, and is otherwise turned off.

In addition, although the case where the correction process was performed regarding both the threshold voltage and the mobility as a characteristic deviation of a drive transistor was demonstrated here, you may make it correct only about any one.

As mentioned above, although demonstrated based on the preferable example, it is not limited to these examples. The processes in the configuration, structure, and driving method of the light emitting portion of the various components constituting the display device, display element, and driving circuit described in each example are examples and can be changed as appropriate.

In the operations of 5Tr / 1C type, 4Tr / 1C type, and 3Tr / 1C type, the recording process and the mobility correction may be performed separately, and like the 2Tr / 1C type, the mobility correction processing is performed in the recording process. In addition, you may carry out. Specifically, the video signal V _Sig is transmitted from the data line DTL to the first node through the write transistor TR _W while the first transistor TR ₁ (light emission control transistor) is turned on. It is good to apply.

<Specific Application Example>

Hereinafter, the specific application example of the technique which suppresses the display unevenness which arises when an electro-optical element turns on is demonstrated. In addition, in the display device using the active matrix organic EL panel, for example, various gate signals (control pulses) supplied to the control input terminal of the transistor are produced by vertical scanning units arranged on both sides or one side of the panel. The signal is applied to the pixel circuit 10. Furthermore, in the display apparatus using such an organic EL panel, the 2Tr / 1C type pixel circuit 10 may be used for element count reduction and high precision. In view of this point, the following description will be given as an example of application to the configuration of the 2Tr / 1C type.

Example 1

[Pixel circuit]

4 and 5 are diagrams illustrating one embodiment of a display device including the pixel circuit 10Z of the comparative example for each embodiment and the pixel circuit 10Z. The display device including the pixel circuit 10Z of the comparative example in the pixel array unit 102 is referred to as the display device 1Z of the comparative example. 4 shows a basic configuration (for one pixel), and FIG. 5 shows a specific configuration (the whole of the display device). 6 to 8 are diagrams illustrating one embodiment of a display device including the pixel circuit 10A of the first embodiment and the pixel circuit 10A. The display device having the pixel circuit 10A of the first embodiment in the pixel array unit 102 is referred to as the display device 1A of the first embodiment. FIG. 6 shows a basic configuration (for one pixel), and FIGS. 7 to 8 show specific configurations (the whole of the display device). In each of Comparative Examples and Embodiments 1, the vertical driver 103 and the horizontal driver 106 provided on the periphery of the pixel circuit 10 on the substrate 101 of the display panel unit 100 are also shown. The same applies to other embodiments described later.

First, the reference | standard A and the reference | standard Z are abbreviate | omitted, and the part which is common in a comparative example and Example 1 is demonstrated. The display device 1 is an electro-optical element in the pixel circuit 10 (in this example, an organic EL element (e.g., a light emitting portion ELP)) based on the image signal V _sig (in detail, the signal amplitude V _in ). 127) is used to emit light. For this reason, the display device 1 includes at least a driving transistor 121 (drive transistor TR _D ) for generating a driving current in the pixel circuit 10 arranged in a matrix in the pixel array unit 102, The storage capacitor 120 (the storage capacitor C _cs ) connected between the control input terminal (the gate terminal is a typical example) and the output terminal (the source terminal is a typical example) of the driving transistor 121 and the output terminal of the driving transistor 121. Sampling transistor 125 (recording) for recording the information corresponding to the signal amplitude V _{in the} organic EL element 127 (light emitting part ELP) which is an example of the electro-optical element connected to the storage capacitor 120 Transistor TR _W ). In the pixel circuit 10, a shedding in the storage capacity of information that the driving current (I _ds), the one example of organic EL device 127 of the electro-optical element to generate at the driving transistor 121 according to maintain a 120 by The organic EL element 127 emits light.

In order to record the information corresponding to the signal amplitude V _{in the} storage capacitor 120 _{in the} sampling transistor 125, the sampling transistor 125 has a signal potential V _{ofs at} its input terminal (one of the source terminal and the drain terminal). + V _in ) is received and the information corresponding to the signal amplitude V _in is recorded _in the storage capacitor 120 connected to the output terminal (the other of the source terminal or the drain terminal). Of course, the output terminal of the sampling transistor 125 is also connected to the control input terminal of the driving transistor 121.

In addition, the connection structure of the pixel circuit 10 shown here showed the most basic structure, and the pixel circuit 10 should just contain each component mentioned above at least, and it is other than these components (that is, another component). ) May be included. In addition, "connection" is not limited to the case where it is connected directly, and may be connected through other components. For example, a change may be added between connections, such as interposing a switching transistor, a function part which has a certain function, etc. as needed. Typically, a switching transistor is driven between the output terminal of the driving transistor 121 and the electro-optical element (organic EL element 127) or in order to dynamically control the display period (in other words, no light emission time). The transistor 121 may be disposed between a power supply terminal (a drain terminal is a typical example) and a power supply line PWL (power supply line 105DSL in this example) that is a wiring for power supply. Even in the pixel circuit of such a modified embodiment, as long as the configuration and operation described in Embodiment 1 (or other embodiments) can be realized, those modified embodiments also realize one embodiment of the display device according to the present disclosure. Is the pixel circuit 10.

In the peripheral portion for driving the pixel circuit 10, for example, by sequentially controlling the sampling transistor 125 in a horizontal period, the pixel circuit 10 is sequentially scanned, and the storage capacitor 120 for each row is stored. The write scanning unit 104 for recording information corresponding to the signal amplitude V _in of the video signal V _sig , and each drive transistor 121 for one row in accordance with the linear sequential scanning of the write scanning unit 104. The control unit 109 is provided with a drive scanning unit 105 for outputting a scan drive pulse (power drive pulse DSL) for controlling the power supply applied to the power supply terminal. The control unit 109 further includes a video signal V _sig which is switched between the reference potential V _ofs and the signal potential V _ofs + V _in within each horizontal period in accordance with the linear sequential scanning of the recording scanning unit 104. ) Is provided with a horizontal driver 106 to control the sampling transistor 125 to be supplied to the sampling transistor 125.

Preferably, the control unit 109 puts the sampling transistor 125 in a non-conductive state when the information corresponding to the signal amplitude V _in is recorded in the storage capacitor 120, and controls the input terminal of the driving transistor 121. It is preferable to stop the supply of the video signal V _sig to control the bootstrap operation in which the potential of the control input terminal is linked to the potential variation of the output terminal of the driving transistor 121. The control unit 109 preferably executes the bootstrap operation even at the beginning of light emission start after the end of the sampling operation. That is, the driving transistor 121 is brought into a non-conductive state after the sampling transistor 125 is turned on while the signal potential V _ofs + V _in is supplied to the sampling transistor 125. Make sure that the potential difference between the control input terminal and the output terminal is maintained constant.

In addition, the control unit 109 preferably controls the bootstrap operation so as to realize a time-varying correction operation of the electro-optical element (organic EL element 127) in the light emission period. For this reason, the control part 109 continues the sampling transistor 125 for the period which the drive current I _ds based on the information hold | maintained in the storage capacitor 120 is flowing to the electro-optical element (organic EL element 127). By making the non-conducting state, the voltage at the control input terminal and the output terminal can be kept constant, so that the time-varying correction operation of the electro-optical element can be realized. The storage capacitor which bootstraps the potential difference between the control input terminal and the output terminal of the driving transistor 121 even when the current-voltage characteristic of the organic EL element 127 changes over time by the bootstrap operation of the storage capacitor 120 at the time of light emission. By keeping constant by 120, constant luminescence brightness is always maintained. Further, preferably, the control unit 109 includes a sampling transistor at a time period when a reference potential (= first node initialization voltage V _ofs ) is supplied to an input terminal (a source terminal is a typical example) of the sampling transistor 125. By conducting 125, control is performed to perform a threshold correction operation for maintaining the voltage corresponding to the threshold voltage V _th of the driving transistor 121 in the storage capacitor 120.

This threshold correction operation may be repeatedly performed at a plurality of horizontal periods prior to recording the information corresponding to the signal amplitude V _in into the storage capacitor 120 as necessary. Here, "as required" means a case where the storage capacitor 120 cannot sufficiently maintain a voltage corresponding to the threshold voltage of the driving transistor 121 in the threshold correction period within one horizontal period. By the plural times of execution of the threshold correction operation, the storage capacitor 120 reliably maintains a voltage corresponding to the threshold voltage V _th of the driving transistor 121.

More preferably, the control unit 109 conducts the sampling transistor 125 to conduct the threshold correction during the time period when the reference potential V _ofs is supplied to the input terminal of the sampling transistor 125 before the threshold correction operation. Control to execute the preparation operation (discharge operation or initialization operation). The potentials of the control input terminal and the output terminal of the driving transistor 121 are initialized before the threshold correction operation. More specifically, by storing the storage capacitor 120 between the control input terminal and the output terminal, the potential difference between both ends of the storage capacitor 120 is set to be equal to or greater than the threshold voltage V _th .

In the threshold correction in the 2Tr / 1C drive configuration, the control unit 109 supplies the drive current I _ds to each pixel circuit 10 for one row in accordance with the linear sequential scanning of the write scanning unit 104. a unit driving the scan to print by switching the electro-optical element (the organic EL element 127), the first potential (V _{cc_H)} and the first potential (V _{cc_H)} different from the second potential (V _{cc_L)} used for shedding on ( 105 is provided, a voltage corresponding to the first potential V _{cc_H} is supplied to the power supply terminal of the driving transistor 121, and a signal potential V _ofs + V _in is supplied to the sampling transistor 121. It is preferable to control the threshold transistor to perform the threshold correction operation by conducting the sampling transistor 125 at a certain time. In the preparation operation of the threshold correction in the 2TR driving configuration, a voltage corresponding to the second potential V _{cc_L} (= second node initialization voltage V _ini ) is supplied to the power supply terminal of the driving transistor 121. In addition, the sampling transistor 125 is turned on during the time period when the reference potential V _ofs is supplied to the sampling transistor 125 to thereby supply the potential of the control input terminal (ie, the first node ND ₁ ) of the driving transistor 121. to the reference potential (V _ofs), or may be output (i.e., the second node (ND ₂₎₎ to initialize the potential of the second potential (V _{cc_L).}

More preferably, the control unit 109 is supplied with a voltage corresponding to the first potential V _{cc_H} to the driving transistor 121 after the threshold correction operation, and the signal potential V _ofs + to the sampling transistor 125. Correction of the mobility μ of the driving transistor 121 when the information of the signal amplitude V _in is recorded _in the storage capacitor 120 by conducting the sampling transistor 125 while the V _in is supplied. The minute is controlled to be added to the information recorded in the storage capacity 120. At this time, the sampling transistor 125 may be turned on for a period shorter than the time slot at a predetermined position within the time zone where the signal potential V _ofs + V _in is supplied to the sampling transistor 125. Hereinafter, an example of the pixel circuit 10 in the 2Tr / 1C driving configuration will be described in detail.

In the pixel circuit 10, a driving transistor is basically composed of an n-channel thin film field effect transistor. Further, a circuit for suppressing fluctuations in driving current I _ds to the organic EL element due to deterioration of the organic EL element over time, that is, a change in the current-voltage characteristic of the organic EL element as an example of an electro-optical element is corrected. A drive signal constant circuit 1 for keeping the drive current I _ds constant, and a threshold correction function that prevents drive current fluctuation due to characteristic variations (threshold voltage variation or mobility variation) of the drive transistor; It is characterized by adopting a drive system that realizes the mobility correction function and keeps the drive current I _ds constant.

As a method of suppressing the influence on the driving current I _ds due to the characteristic variation of the driving transistor 121 (for example, variation or variation in threshold voltage or mobility, etc.), the driving circuit of the 2TR configuration can be used as it is. It employs as a circuit (1), and copes by devising the drive timing of each transistor (drive transistor 121 and sampling transistor 125). Since the pixel circuit 10 has the configuration of 2TR driving and has a small number of elements and wirings, in addition to high definition, the pixel circuit 10 can be sampled without deterioration of the video signal V _sig , so that good image quality can be obtained.

In addition, the pixel circuit 10 is characterized by a connection state of the storage capacitor 120, and is a circuit for preventing the drive current fluctuation due to deterioration of the organic EL element 127 over time. An example of the bootstrap circuit is configured. A driving signal constant circuit (No. 2) that realizes a bootstrap function that makes the drive current constant (prevents drive current fluctuations) even when there is a change over time in the current-voltage characteristic of the organic EL element. Have

Each transistor including the driving transistor is a FET (field effect transistor). In this case, as for the driving transistor, the gate terminal is treated as the control input terminal, and either one of the source terminal and the drain terminal (here, the source terminal) is treated as the output terminal, and the other is the power supply terminal (here, the drain terminal). It is handled as).

Specifically, as shown in FIGS. 4 and 5, the pixel circuit 10 includes an n-channel driving transistor 121 and a sampling transistor 125, respectively, and an electro-optical element that emits light as current flows. It has the organic electroluminescent element 127 which is an example. In general, the organic EL element 127 is represented by a symbol of a diode because of its rectifying property. In addition, the parasitic capacitance C _el exists in the organic EL element 127. In the figure, this parasitic capacitance C _el is shown in parallel with the organic EL element 127 (on the diode).

The driving transistor 121 has a drain terminal D connected to a power supply line 105DSL for supplying a first potential V _{cc_H} or a second potential V _{cc_L} , and the source terminal S is an organic EL element. Connected to the anode terminal A of 127 (the connection point is the second node ND ₂ and is called the node ND122), and the cathode terminal K of the organic EL element 127 supplies a reference potential. All the pixel circuits 10 are connected to a common cathode line (the potential is the cathode potential V _cath , for example, GND). In addition, the cathode wiring (cath) may be only a single layer wiring (upper wiring) for it, for example, the auxiliary wiring for cathode wiring is provided in the anode layer in which the wiring for anode is formed, The resistance value of the cathode wiring may be reduced. This auxiliary wiring is wired in a lattice shape, column or row shape in the pixel array section 102 (display area), and has a fixed potential as the upper layer wiring and the coin head.

In the sampling transistor 125, the gate terminal G is connected to the write scanning line 104WS from the write scanning unit 104, and the drain terminal D is connected to the video signal line 106HS (video signal line DTL). The source terminal S is connected to the gate terminal G of the driving transistor 121 (the connection point is a first node ND ₁ and is referred to as a node ND121). The write drive pulse WS of the active H is supplied from the write scan unit 104 to the gate terminal G of the sampling transistor 125. The sampling transistor 125 can also be set as the connection mode which inverted the source terminal S and the drain terminal D. FIG.

The drain terminal D of the drive transistor 121 is connected to a power supply line 105DSL from the drive scanning unit 105 which functions as a power scanner. The power supply line 105DSL is characterized in that the power supply line 105DSL itself has a power supply capability to the drive transistor 121. The driving scan section 105 has a low voltage side for the drain terminal D of the driving transistor 121 which is used for the preparation operation prior to the threshold correction and the first potential V _{cc_H} on the high voltage side corresponding to the power supply voltage, respectively. The second potential V _{cc_L} (also referred to as an initialization voltage or initial voltage) is switched.

The threshold value is corrected by driving the drain terminal D side (power supply circuit side) of the driving transistor 121 with a power supply driving pulse DSL taking two values of the first potential V _{cc_H} and the second potential V _{cc_L} . It is possible to perform the preparation operation prior to the above. The second potential V _{cc_L} is a potential sufficiently lower than the reference potential V _ofs of the video signal V _sig in the video signal line 106HS. Specifically, the gate-source voltage V _gs (the difference between the gate potential V _g and the source potential V _s ) of the driving transistor 121 becomes larger than the threshold voltage V _th of the driving transistor 121. The second potential V _{cc_L} on the low potential side of the power supply line _105DSL is set. The reference potential V _ofs is also used for the initialization operation prior to the threshold correction operation and also for pre-charging the video signal line 106HS.

In such a pixel circuit 10, when driving the organic EL element 127, the first potential V _{cc_H} is supplied to the drain terminal D of the driving transistor 121, and the source terminal S is organic. The source follower circuit is formed as a whole by being connected to the anode end A side of the EL element 127.

In the case of employing such a pixel circuit 10, a 2TR driving configuration using one switching transistor (sampling transistor 125) for scanning in addition to the driving transistor 121 is adopted, and each switching transistor is controlled. By setting the on / off timing of the power supply driving pulse DSL and the write driving pulse WS, the deterioration of the organic EL element 127 and the characteristic variation of the driving transistor 121 (for example, the threshold voltage and the shift) are set. The influence on the driving current I _ds by the deviation or the fluctuation of the degree, etc. is prevented.

[Configuration Specific to Example 1]

Here, in the pixel circuit 10A of the first embodiment, the current of the organic EL element 127 (light emitting portion ELP) is linked to the process of writing the driving voltage corresponding to the video signal into the storage capacitor 120. It is equipped with the structure which can control the opening and closing of an electrodynamic path. Specifically, the electrical connection between the node ND122 (second node) and the anode end A (one end of the electro-optical element) of the organic EL element 127 is performed for a certain period corresponding to mobility correction. A blockable configuration is provided for each pixel circuit 10A. For example, as shown in FIGS. 6 and 7, the source terminal ND122 of the driving transistor 121 (the second node) and one end of the organic EL element 127 (the anode terminal A in the drawing). The control transistor 612 is connected in series with a current between them. Here, an n-channel transistor is used as the control transistor 612 as a current, and a control pulse NDS in which the write drive pulse WS is inverted logic is supplied to the control input terminal (gate terminal).

Various configurations can be taken as the configuration in which the write driving pulse WS is logically inverted and supplied to the gate terminal of the control transistor 612 as a current. However, as shown in FIGS. 7 and 8, the pixel array unit ( In the input terminal of 102, a configuration is provided in which an inverter 616 is provided for each row. In other words, since the write drive pulses WS are commonly supplied to the sampling transistors 125 on the same row, the inverter 616 inverts the write drive pulses WS for each row based on this point. The pulse NDS is generated, and the control pulse NDS is supplied to the control transistor 612 in common with the current in the same row through the control scan line 612DS as the current. By the control transistor 612 and the inverter 616 as current, the current path of the display unit is cut off in conjunction with a process of supplying current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal into the storage capacitor. The controlling unit is configured. The inverter 616 of each row functions as a control scan part by the electric current which controls ON / OFF the control transistor 612 by electric current.

In the first example shown in FIG. 7, the inverter 616 is provided outside the pixel array unit 102. However, as in the second example shown in FIG. 8, a current path is provided inside the pixel array unit 102. The control transistor 612 may be provided. In any case, the configuration is not limited as long as the control transistor 612 is provided with a current obtained by logically inverting the write drive pulse WS for each row. For example, the write scanning unit 104 is arranged on both sides of the pixel array unit 102 to supply write drive pulses WS from both sides (in this case, the charge is divided in the middle of the rough pixel array unit 102). In this case, the control transistor 612 may also be arranged on both sides of the pixel array unit 102 with current. Although not shown in the drawing, an inverter 616 may be provided for each pixel circuit 10A (whether inside or outside the pixel circuit 10A) to generate a control pulse NDS separately. The circuit scale is larger than that of the first embodiment shown in FIG.

In the pixel circuit 10A of the first embodiment, since the control pulse NDS becomes L (low level) when the write drive pulse WS is active H (that is, the sampling transistor 125 is in an on state). The control transistor 612 is turned off by the current. On the other hand, when the write drive pulse WS is inactive L (that is, the sampling transistor 125 is off), the control pulse NDS becomes H (high level), so that the control transistor 612 is driven by current. It turns on. That is, since the write driving pulse WS and the control pulse NDS are linked to control the corresponding transistor, the control transistor 612 logically performs the complementary operation with the current added to the sampling transistor 125 and the first embodiment. It is supposed to be. In the period where the write drive pulse WS is at the L level (for example, the light emission period), the control transistor 612 is turned on by the current, so that the source terminal ND122 of the driving transistor 121 and the organic EL element ( The anode end of 127 is electrically connected, and the drive current I _ds from the drive transistor 121 flows through the organic EL element 127. On the other hand, in the period in which the write drive pulse WS is at the H level (for example, the threshold correction period, the signal write period, or the mobility correction period), the control transistor 612 is turned off by the current, so that the driving transistor 121 is turned off. The source terminal ND122 and the anode terminal of the organic EL element 127 are electrically separated from each other, and a current from the driving transistor 121 does not flow through the organic EL element 127. That is, the current path of the organic EL element 127 is controlled to open and close in conjunction with the write drive pulse. Details of the significance and advantages of the pixel circuit 10A of the first embodiment will be described later. However, the mobility correction operation can be normally performed by preventing the turn-on of the organic EL element 127 during mobility correction.

[Operation of Pixel Circuit]

9 is a timing chart illustrating an operation when recording information of the signal amplitude V _in to the storage capacitor 120 _{in a} line-sequential manner as an example of the driving timing of the pixel circuit 10 (above (理想) state. FIG. 10 is a diagram illustrating an equivalent circuit and an operating state in the main period of the timing chart shown in FIG. 9. In FIG. 9, the potential change of the recording scan line 104WS, the potential change of the power supply line 105DSL, and the potential change of the video signal line 106HS are shown in common with the time axis. In parallel with these potential changes, changes in the gate potential V _g and the source potential V _s of the driving transistor 121 are also shown. Basically, every one row of the recording scan line 104WS and the power supply line 105DSL is delayed by one horizontal scanning period to perform the same driving. Hereinafter, although the pixel circuit 10Z of a comparative example is demonstrated, the thing demonstrated here is similarly applied to the matter which does not have a special clue in each Example mentioned later.

As in the signal in Fig. 9, the current value flowing through the organic EL element 127 is controlled by the timing of each pulse. In the timing example of Figure 9, then by the power-on pulse (DSL) to a second potential (V _{cc _L)} initialize the quencher and the node (ND122), a first node initialization voltage (V _ofs) for the video signal lines (106HS) The node ND121 is initialized with the sampling transistor 125 turned on when being applied to the threshold _voltage , and the threshold correction is performed by _{setting the} power supply driving pulse DSL to the first potential V _{cc_H} in that state. Thereafter, the sampling transistor 125 is turned off and the video signal V _sig is applied to the video signal line 106HS. By turning on the sampling transistor 125 in this state, the signal is recorded and mobility correction is performed. After the signal is written, light emission starts when the sampling transistor 125 is turned off. Thus, driving is controlled by the phase difference of a pulse, such as mobility correction and threshold correction.

The operation will be described in detail below with attention to threshold correction and mobility correction. In the pixel circuit 10, as the driving timing, first, the sampling transistor 125 conducts in response to the write drive pulse WS supplied from the write scan line 104WS, and the video signal supplied from the video signal line 106HS ( V _sig ) is sampled and maintained in the storage capacitor 120. First, hereinafter, in order to facilitate explanation or understanding, assuming that the recording gain is 1 (outlier) unless there is a special clue, the information of the signal amplitude (V _in ) is recorded _{in the} storage capacitor 120, The description will be briefly described by retaining or sampling. If the gain is less than one recording, storage capacitor 120, the multiplied information by a gain corresponding to the magnitude of the size itself, not the amplitude of the signal (V _in), the amplitude signal (V _in) is maintained.

The driving timing for the pixel circuit 10 is that when the information of the signal amplitude V _in of the video signal V _sig is recorded in the storage capacitor 120, the video signal for one row is simultaneously viewed from the viewpoint of sequential scanning. Line sequential driving to the video signal line 106HS of each column is performed. In particular, in a basic way of thinking about threshold correction and mobility correction at the driving timing in the pixel circuit 10 having the 2TR configuration, first, the image signal V _sig is _converted into the reference potential V _ofs and the signal potential ( V _ofs + V _in ) is assumed to be time-division within 1H period. Specifically, the period in which the video signal V _sig is in the reference potential V _ofs which is an invalid period is set to the first half of the horizontal period, and is in the signal potential V _sig = V of _s + V _in which is the effective period. The period is the latter half of one horizontal period. When dividing one horizontal period into the first half and the second half, it is not usually necessary to divide the half-by-half period, and the latter half may be longer than the first half, and conversely, the latter half is shorter than the first half. Also good.

The write drive pulse WS used for signal recording is also used for threshold correction and mobility correction. The sampling transistor 125 is turned on with the write drive pulse WS being activated twice within a 1H period. Then, threshold correction is performed at the first on timing, and signal voltage recording and mobility correction are simultaneously performed at the second on timing. Thereafter, the driving transistor 121 receives a current supply from the power supply line 105DSL at the first potential (high potential side) and holds the signal potential (the video signal V _sig valid period) held in the storage capacitor 120. The driving current I _ds flows through the organic EL element 127 in response to the potential corresponding to the potential of. In addition, the write drive pulse WS is not activated twice within the 1H period, and the potential of the video signal line 106HS is kept at the organic EL element 127 while the ON state of the sampling transistor 125 is maintained. The signal potential (= V of _s + V _in ) for controlling the luminance of the light may be set.

For example, the light emitting state of the organic EL element 127 is that the power supply line 105DSL is the first potential V _{cc _ H} and the sampling transistor 125 is in the off state (see A in FIG. 10). At this time, since the driving transistor 121 is set to operate in the saturation region, the current I _ds flowing through the organic EL element 127 is the gate-source voltage V _gs of the driving transistor 121 (node ( It becomes the value shown by Formula (1) determined according to the voltage between ND121 and the node ND122). Thereafter, the vertical driving unit 103 has the power supply line 105DSL at the first potential V _{cc _} H and the video signal line 106HS at the reference potential V _ofs which is an ineffective period of the video signal V _sig . The write drive pulse WS is outputted as a control signal for conducting the sampling transistor 125 at a time in a certain time, and the voltage corresponding to the threshold voltage V _th of the drive transistor 121 is maintained in the storage capacitor 120. (See FIG. 10D). This operation realizes the threshold correction function. By this threshold correction function, the influence of the threshold voltage V _th of the driving transistor 121 which is disturbed for every pixel circuit 10 can be canceled.

The vertical driver 103 repeatedly executes the threshold correction operation in a plurality of horizontal periods preceding the sampling of the signal amplitude V _in to reliably preserve the voltage corresponding to the threshold voltage V _th of the driving transistor 121. It is preferable to maintain the dose 120. By executing the threshold correction operation a plurality of times, a sufficiently long recording time is ensured. In this way, the voltage corresponding to the threshold voltage V _th of the driving transistor 121 can be reliably held in advance in the storage capacitor 120.

Voltage corresponding to the held threshold voltage (V _th) is used to cancel the threshold voltage (V _th) of the drive transistor 121. Therefore, even if the threshold voltage V _th of the driving transistor 121 is disturbed for each pixel circuit 10, the pixel voltage 10 is completely canceled for each pixel circuit 10, so that the uniformity of the image, that is, the light emission luminance across the entire screen of the display device. The uniformity of is high. In particular, it is possible to prevent luminance unevenness that is likely to appear when the signal potential is low gradation.

Preferably, the vertical driving unit 103 has a reference potential V _{ofs in} which the video signal line 106HS is an invalid period of the video signal V _sig while the power supply line 105DSL is at the second potential before the threshold correction operation. ), The sampling transistor 125 conducts with the write drive pulse WS active (H level in this example), after which the power supply line with the write drive pulse WS active (H). Set (105DSL) to the first potential.

By doing so, the source end (S) to the reference potential set at a sufficiently low second potential (V _{cc _L)} than (V _ofs) and (discharge period (C) = a second node initialization period) (refer to B in FIG. 10) Further, after setting the gate terminal G of the driving transistor 121 to the reference potential V _ofs (initialization period D = first node initialization period) (see FIG. _10C ), the threshold correction operation is performed. Start (threshold correction period E). By such a reset operation (initialization operation) of the gate potential and the source potential, the subsequent threshold correction operation can be reliably executed. The discharge period C and the initialization period D are also referred to as a threshold correction preparation period (= preprocessing period) for initializing the gate potential V _g and the source potential V _s of the driving transistor 121. In this regard, in the illustrated example, the initialization operation (initialization period D) to the node ND121 which is the first node is repeated three times, and the last initialization period D is performed from the start of the discharge period C. Is a threshold correction preparation period until this is completed.

Threshold value correction period (E) in the source potential of the power source supply lines (105DSL) is by a transition from the second potential (V _{cc_L)} on the low potential side to the first potential (V _{cc_H)} the high potential side, the driving transistor 121, the potential of the (V _s ) starts to rise. That is, the gate terminal G of the driving transistor 121 is maintained at the reference potential V _ofs of the image signal V _sig , and the gate terminal G of the driving transistor 121 is connected to the potential V _s of the source terminal S of the driving transistor 121. Due to the rise, the drain current tries to flow until the driving transistor 121 is cut off. When the cut-off voltage source (V _s) of the driving transistor 121 is the "V _ofs -V _th". In the threshold correction period E, the organic EL element 127 cuts off so that the drain current flows only to the storage capacitor 120 side (when C _cs << C _el ) and does not flow to the organic EL element 127 side. The potential V _cath of the ground wiring cath common to all the pixels is set to be.

Since the equivalent circuit of the organic EL element 127 is represented by the parallel circuit of the diode and the parasitic capacitance C _el , the leakage current of the organic EL element 127 as long as "V _el ≤ V _cath + V _thEL " is used. The drain current I _ds of the driving transistor 121 is used to charge the storage capacitor 120 and the parasitic capacitance C _el as long as is much smaller than the current flowing through the driving transistor 121. As a result, the voltage Vel of the anode end A of the organic EL element 127, that is, the potential of the node ND122 rises with time. Then, the driving transistor 121 is located where the potential difference between the potential of the node ND122 (source potential V _s ) and the voltage of the node ND121 (gate potential V _g ) becomes exactly the threshold voltage V _th . ) Turns from the on state to the off state, the drain current I _ds does not flow, and the threshold correction period ends. That is, after a predetermined time elapses, the gate-source voltage V _gs of the driving transistor 121 takes the value of the threshold voltage V _th .

Here, the threshold correction operation may be performed only once, but this is not essential. The threshold correction operation may be repeated a plurality of times (shown in FIG. 4 times) with one horizontal period as the processing cycle. For example, in practice, a voltage corresponding to the threshold voltage V _th is recorded in the storage capacitor 120 connected between the gate terminal G and the source terminal S of the driving transistor 121. . However, the threshold value correction period E is from the timing at which the write drive pulse WS is made active (H) to the timing at which the inactive L is returned. Throw it away. In order to solve this problem, it is preferable to repeat the threshold correction operation a plurality of times.

In the case where the threshold correction operation is executed plural times, one horizontal period becomes a processing cycle of the threshold correction operation, prior to the threshold correction operation, through the video signal line 106HS in the first half of the horizontal period, the reference potential V _ofs . This is because it supplies via and an initialization operation of setting the source potential to the second potential V _{cc_L} . Inevitably, the threshold correction period is shorter than one horizontal period. Therefore, due to the magnitude relationship between the capacitance C _cs of the storage capacitor 120 and the second potential V _{cc_L} or other factors, the voltage corresponding to the threshold voltage V _th is applied in this short threshold correction operation period. Cases may occur where the correct voltage cannot be maintained completely in the storage capacitor 120. It is because of this countermeasure that the threshold correction operation is performed a plurality of times. That is, by repeatedly executing the threshold correction operation in a plurality of horizontal periods prior to sampling (signal writing) of the signal amplitude V _in to the storage capacitor 120, the threshold voltage V _th of the driving transistor 121 is reliably ensured. It is desirable to maintain a corresponding voltage in the storage capacitor 120.

For example, in the first threshold correction period E _{_1} , when the gate-source voltage V _gs becomes V _x1 (> V _th ), that is, the source potential V _s of the driving transistor 121 is low. discard ends when a "V _ofs -V _x1" from the second potential of the voltage supply source (V _{cc _L)} (see D in Fig. 10). Therefore, when the first threshold correction period E _{_1} is completed, V _x1 is recorded in the storage capacitor 120.

Next, in the second half of one horizontal period, the drive scanning unit 105 switches the write driving pulse WS to the inactive L, and the horizontal driving unit 106 changes the potential of the video signal line 106HS. The image signal V _sig (= V of _s + V _in ) is switched from the reference potential V _ofs (see E of FIG. 10). As a result, the video signal line 106HS changes to the potential of the video signal V _sig , while the potential of the write scan line 104WS (the write drive pulse WS) becomes a low level.

At this time, the sampling transistor 125 is in a non-conducting (off) state, and a drain current corresponding to V _x1 held in the storage capacitor 120 previously flows to the organic EL element 127, whereby the source potential V _s ) rises slightly. Speaking of the rise _a1 V, the source potential (V _s) is the _{"V ofs -V x1 + V a1} ". In addition, the storage capacitor 120 is connected between the gate terminal G and the source terminal S of the driving transistor 121, and the driving transistor 121 is affected by the effect of the storage capacitor 120. by the gate potential of the source potential variation (V _g) to (V _s) interworking, the gate potential (V _g) is a "V _ofs + V _a1".

In the next second threshold correction period E _{_2} , the same operation as the first threshold correction period E _{_1} is performed. Specifically, first, the gate terminal G of the driving transistor 121 is maintained at the reference potential V _ofs of the image signal V _sig , and the gate potential V _g is immediately before " V _g = reference. Instantly switches from potential V _ofs + V _a1 ″ to reference potential V _ofs . The storage capacitor 120 is connected between the gate terminal G and the source terminal S of the driving transistor 121, and the gate potential of the driving transistor 121 is affected by the effect of the storage capacitor 120. Since the source potential V _s is interlocked with the variation of (V _g ), the source potential V _s is lowered by V _a1 from the immediately preceding "V of _s -V _x1 + V _a1 ", so that "V of _s -V _x1 ". Thereafter, the potential V _s of the source terminal S of the driving transistor 121 rises, and the drain current tries to flow until the driving transistor 121 cuts off. However, the gate-source voltage (V _gs) is V _x2 when it is (> V _th), that is, discarded ends when the source potential (V _s) of the drive transistor 121 when the "V _ofs -V _x2", When the second threshold correction period E _{_2} is completed, V _x2 is recorded in the storage capacitor 120. Immediately before the next third threshold correction period E _{_3} , the drain current corresponding to V _x2 held in the storage capacitor 120 flows to the organic EL element 127, _{whereby the} source potential V _s is " V of _s . -V _x2 + V _a2 ", and the gate potential V _g becomes" V _ofs + V _a2 ".

Similarly, in the next third threshold correction period E _{_3} , when the gate-source voltage V _gs becomes V _x3 (> V _th ), that is, the source potential V _s of the driving transistor 121. the "V _ofs -V _x3" discarded ends when a third threshold value correcting period (E _{_3)} is completed at the time is written in the storage capacitor is V _x3 120. Immediately before the next fourth threshold correction period E _{_4} , the drain current corresponding to V _x3 held in the storage capacitor 120 flows to the organic EL element 127, _{whereby the} source potential V _s is " V of _s . -V _x3 + V _a3 ", and the gate potential V _g becomes" V _ofs + V _a3 ".

In the next fourth threshold correction period E _{_4} , the drain current flows until the potential V _s of the source terminal S of the driving transistor 121 rises and the driving transistor 121 cuts off. When cut-off is a "V _ofs -V _th" source potential (V _s) of the driver transistor 121, the gate-source voltage (V _gs) is the same as the threshold voltage (V _th). When the fourth threshold correction period E _{_4} is completed, the threshold voltage V _th of the driving transistor 121 is maintained in the storage capacitor 120.

In the pixel circuit 10, in addition to the threshold correction function, a mobility correction function is provided. That is, the vertical driver 103 makes the sampling transistor 125 conduction at a time when the video signal line 106HS is at the signal potential V _ofs + V _in which is the valid period of the video signal V _sig . The write drive pulse WS supplied to the write scan line 104WS is made active (H level in this example) for a period shorter than the time period described above. In this period, the parasitic capacitance C _el and the storage capacitance of the organic EL element 127 through the driving transistor 121 in the state of supplying the signal potential V _ofs + V _in to the control input terminal of the driving transistor 121. Charge 120 (see F in FIG. 10). By appropriately setting the active period (which is neither the sampling period nor the mobility correction period) of the write drive pulse WS, the drive transistors simultaneously hold information _{in accordance} with the signal amplitude V _{in the} storage capacitor 120. Correction may be made for the mobility μ of 121. The horizontal drive section 106 actually supplies the signal potential V _ofs + V _in to the video signal line 106HS, and the signal to the storage capacitor 120 has a period during which the write drive pulse WS is made active (H). This is called a recording period (also called a sampling period) of the amplitude V _in .

In particular, at the drive timing in the pixel circuit 10, within the time zone where the power supply line 105DSL is at the first potential V _{cc_H on} the high potential side and the video signal V _sig is in the effective period (signal amplitude (In the period of V _in ), the write drive pulse WS is made active. That is, as a result, the mobility correction time (sampling period diagram) is recorded with the time width at which the potential of the video signal line 106HS is at the signal potential V _ofs + V _in of the effective period of the video signal V _sig . Both active periods of the drive pulse WS are determined in the overlapped range. In particular, since the active period width of the write drive pulse WS is narrowed so that the video signal line 106HS falls within the time width at the signal potential, the mobility correction time is determined as the write drive pulse WS as a result. Accurately, the mobility correction time (sampling period diagram) is similar to that after the write drive pulse WS rises and the sampling transistor 125 turns on, similarly, the write drive pulse WS falls and the sampling transistor 125 turns off. It is time to In that regard, in the drawing, the write drive pulse WS is set to the inactive L once after the fourth threshold correction period E _{_4} , but this is not essential, but remains active (H). The signal V _sig may be _switched from the reference potential V _ofs to the signal potential V _ofs + V _in of the effective period.

Specifically, in the sampling period, the sampling transistor 125 is turned on (on) with the gate potential V _g of the driving transistor 121 at the signal potential V _ofs + V _in . Therefore, in the write & mobility correction period H, the drive current I _{ds is} applied to the drive transistor 121 while the gate terminal G of the drive transistor 121 is fixed to the signal potential V _ofs + V _in . ) Flows. The information of the signal amplitude V _in is maintained in the form of being added to the threshold voltage V _th of the driving transistor 121. As a result, since the variation of the threshold voltage V _th of the drive transistor 121 is always canceled, threshold correction is performed. By this threshold correction, the gate-source voltage V _gs held in the storage capacitor 120 becomes "V _sig + V _th " = V _in + V _th ". At the same time, since the mobility correction is performed in this sampling period, the sampling period also serves as the mobility correction period (recording & mobility correction period H).

Here, when the threshold voltage of the organic EL elements 127 in _thEL V, as set by placing a _{"V ofs -V th <V thEL} ", the organic EL element 127, is placed in a reverse bias state, the cut-off Since it is in a state (high impedance state), it does not emit light and shows simple capacitance characteristics instead of diode characteristics. Therefore, the drain current (driving current I _ds ) flowing in the driving transistor 121 is equal to the capacitance C _cs of the storage capacitor 120 and the parasitic capacitance (equivalent capacitance C _el ) of the organic EL element 127. capacitance (C _el) goes is recorded in a dose "C = C + C _{cs el"} combines both the. As a result, the drain current of the driving transistor 121 flows into the parasitic capacitance C _el of the organic EL element 127 and starts charging. As a result, the source potential V _s of the driving transistor 121 rises.

In the timing chart of FIG. 9, this increase is represented by ΔV. This increase, that is, the potential correction value ΔV which is the mobility correction parameter, is subtracted from the gate-source voltage "V _gs = V _in + V _th " held in the storage capacitor 120 by the threshold correction, and "V _gs = V _in + V _th -DELTA V ", which results in negative feedback. At this time, the source potential V _s of the driving transistor 121 subtracts the voltage "V _gs = V _in + V _{th -ΔV} " held at the storage capacitor from the gate potential V _g (= V _in ). It becomes one value "-V _th + ΔV".

In this way, the driving timing of the pixel circuit 10, the recording and mobility in the correction period (H), the signal amplitude (V _in) △ V (negative feedback amount for correcting the sampled and the mobility (μ) of, Mobility correction parameter) is adjusted. The recording scanning unit 104 can adjust the time width of the recording & mobility correction period H, thereby optimizing the negative feedback amount of the drive current I _ds with respect to the storage capacitor 120.

The potential correction value? V is? V? I _ds t / C _el . As is apparent from this equation, the larger the driving current I _ds , which is the drain-source current of the driving transistor 121, the larger the potential correction value ΔV. Conversely, when the drive current I _ds of the drive transistor 121 is small, the potential correction value ΔV decreases. In this way, the potential correction value ΔV is determined in response to the drive current I _ds . The larger the signal amplitude V _in , the larger the drive current I _ds , and the greater the absolute value of the potential correction value ΔV. Therefore, mobility correction according to the emission luminance level can be realized. At that time, the recording & mobility correction period H does not necessarily need to be constant, and in some cases, it is desirable to adjust it in response to the drive current I _ds . For example, when the drive current I _ds is large, the mobility correction period t is slightly shortened, and conversely, when the drive current I _ds becomes small, the write & mobility correction period H is slightly long. It is good to set.

In addition, the potential correction value ΔV is I _ds t / C _el and corresponds to the respective cases even when the driving current I _ds is disturbed due to the variation in mobility μ for each pixel circuit 10. Since the potential correction value DELTA V is obtained, the deviation of the mobility μ for each pixel circuit 10 can be corrected. That is, when the signal amplitude V _in is made constant, the greater the mobility μ of the driving transistor 121, the larger the absolute value of the potential correction value ΔV. In other words, since the potential correction value [Delta] V increases as the mobility [mu] increases, the variation in the mobility [mu] for each pixel circuit 10 can be eliminated.

The pixel circuit 10 also has a bootstrap function. That is, the recording scanning unit 104 releases the application of the recording drive pulse WS to the recording scanning line 104WS at the stage where the information of the signal amplitude V _in is maintained _{in the} storage capacitor 120 (that is, Active (L) (low) makes the sampling transistor 125 non-conductive, and electrically separates the gate terminal G of the drive transistor 121 from the video signal line 106HS (light emission period I). : See G of FIG. 10). Proceeding to the light emission period I, the horizontal driver 106 returns the potential of the video signal line 106HS to the reference potential V _ofs at a suitable time _thereafter .

The light emitting state of the organic EL element 127 is continued until the (m + m'-1) th horizontal scanning period. By the above, the operation | movement of the light emission of the organic electroluminescent element 127 which comprises the (n, m) th subpixel is completed. After that, it moves to the next frame (or field), and again, the threshold correction preparation operation, the threshold correction operation, the mobility correction operation, and the light emission operation are repeated.

In the light emission period I, the gate terminal G of the driving transistor 121 is separated from the video signal line 106HS. Since the application of the signal potential V _ofs + V _{in to} the gate terminal G of the driving transistor 121 is released, the gate potential V _g of the driving transistor 121 can be raised. The storage capacitor 120 is connected between the gate terminal G and the source terminal S of the driving transistor 121, and the bootstrap operation is performed by the effect of the storage capacitor 120. When the bootstrap gain is assumed to be 1 (outlier), the gate potential V _g is interlocked with the variation of the source potential V _s of the driving transistor 121, and the gate-source voltage V _gs ) Can be kept constant. At this time, the driving current I _ds flowing through the driving transistor 121 flows through the organic EL element 127, and the anode potential of the organic EL element 127 rises in response to the driving current I _ds . This increase is called V _el . Since the reverse bias state of the organic EL element 127 is eliminated with the rise of the source potential V _s , the organic EL element 127 actually starts emitting light due to the inflow of the driving current I _ds . do.

Here, the relationship between the drive current I _ds and the gate voltage V _gs is represented by "V _sig + V _{th -ΔV} " or "V _in + V _{in the} formula (1) which showed the transistor characteristic mentioned above. By substituting _th -ΔV ", it can be represented as Formula (5A) or Formula (5B) (The two formulas are combined and described as Formula (5).).

I_ds= k 占 占 (V_sig-V_ofs-△ V)² (5A)

I_ds= k 占 占 (V_in-V_ofs-△ V)² (5B)

From this equation (5), the term of the threshold voltage V _th is canceled, and the driving current I _ds supplied to the organic EL element 127 is the threshold voltage V _th of the driving transistor 121. You can see that it does not depend on). That is, the current I _ds flowing through the organic EL element 127 is a video signal (V _sig ) for controlling the luminance in the organic EL element 127, for example, when V _ofs is set to 0 volts. ) Is obtained by subtracting the value of the potential correction value ΔV at the second node ND ₂ (source terminal of the driving transistor 121) due to the mobility μ of the driving transistor 121. Proportional to the second power. In other words, the current I _ds flowing through the organic EL element 127 does not depend on the threshold voltage V _thEL of the organic EL element 127 and the threshold voltage V _th of the driving transistor 121. That is, the light emission amount (luminance) of the organic EL element 127 is not affected by the threshold voltage V _thEL of the organic EL element 127 and the threshold voltage V _th of the driving transistor 121. The luminance of the (n, m) -th organic EL element 127 is a value corresponding to the current I _ds .

In addition, since the potential correction value DELTA V becomes larger for the drive transistor 121 having a larger mobility μ, the value of the gate-source voltage V _gs becomes smaller. Therefore, in the formula (5), the value of the mobility μ is large, but the value of (V _sig -V of s _-ΔV ) ² is small. As a result, the drain current I _ds can be corrected. That is, even in the driving transistor 121 having different mobility μ, if the value of the video signal V _sig is the same, the drain current I _ds becomes almost the same, resulting in the flow of the organic EL element 127 and the organic EL. The current I _ds for controlling the luminance of the element 127 is uniformized. That is, the dispersion | variation in the brightness | luminance of the organic electroluminescent element 127 resulting from the dispersion | variation (moving, k's deviation) of mobility (micro) can be correct | amended.

In addition, the storage capacitor 120 is connected between the gate terminal G and the source terminal S of the driving transistor 121, and due to the effect of the storage capacitor 120, it is booted at the beginning of the light emission period. The strap operation is performed and the gate potential V _g and the source of the drive transistor 121 are kept constant while the gate-source voltage "V _gs = V _in + V _{th -ΔV} " of the drive transistor 121 is kept constant. The potential V _s rises. The source potential (V _s) of the driving transistor 121 is "-V _th + △ V _el + V" being the gate voltage (V _g) is a "V _in + V _el". At this time, since the gate-source voltage V _{gs of the} driving transistor 121 is constant, the driving transistor 121 flows a constant current (driving current I _ds ) to the organic EL element 127. As a result, the electric current of the drive current I _ds in the saturated state can flow in the potential (= potential of the node ND122) of the anode end A of the organic EL element 127 to the organic EL element 127. Rise up to the voltage.

Here, the IV characteristics of the organic EL element 127 change when the light emission time becomes long. Therefore, the potential of the node ND122 also changes with time. However, even if the anode potential fluctuates due to deterioration of the organic EL element 127 over time, the gate-source voltage V _gs held in the storage capacitor 120 is always " V _in + V _{th -ΔV.} Is kept constant. Since the driving transistor 121 operates as a constant current source, the IV characteristic of the organic EL element 127 changes over time, and consequently, even if the source potential V _s of the driving transistor 121 changes. Since the gate-source potential V _gs of the driving transistor 121 is kept constant (V _in + V _{th -ΔV} ) by the 120, the current flowing through the organic EL element 127 does not change, Therefore, the light emission luminance of the organic EL element 127 is also kept constant. Since the bootstrap gain is actually smaller than "1", the gate-source potential V _gs becomes smaller than "V _in + V _{th -ΔV} ", but the gate-source potential V _gs corresponding to the bootstrap gain is There is no difference in being maintained.

As described above, in the pixel circuit 10 of the comparative example and the first embodiment, the threshold correction circuit and the mobility correction circuit are automatically configured by devising the driving timing, and the characteristic deviation of the driving transistor 121 (in this example, since prevent the influence on the drive current (I _ds) according to the deviation of the threshold voltage (V _th), and the carrier mobility (μ)), threshold voltage (V _th), and the carrier mobility to correct the influence of the (μ) It serves as a drive signal constant circuit for keeping the drive current constant. Since not only the bootstrap operation but also the threshold correction operation and the mobility correction operation are performed, the gate-source voltage V _gs maintained in the bootstrap operation is for the voltage and mobility correction corresponding to the threshold voltage V _th . Since the light emission luminance of the organic EL element 127 is not influenced by the variation in the threshold voltage Vth and the mobility μ of the driving transistor 121, since the light emission luminance of the organic EL element 127 is adjusted. The degradation of the organic EL element 127 with time is also not affected. A stable gradation corresponding to the input video signal V _sig (signal amplitude V _in ) can be displayed and a high quality image can be obtained.

In addition, since the pixel circuit 10 can be configured by the source follower circuit using the n-channel driving transistor 121, even if the organic EL elements of the anode and cathode electrodes in the current state are used as they are, The EL element 127 can be driven. In addition, the pixel circuit 10 can be configured by using an n-channel transistor including the driving transistor 121 and the sampling transistor 125 at the periphery thereof, and the cost can be reduced even in transistor fabrication.

[Cause of Display Smudges]

As described above, at the drive timing shown in FIG. 9, the potential correction value ΔV is ΔV ≒ I _ds t / C _el . As is apparent from this equation, the larger the driving current I _ds , which is the drain-source current of the driving transistor 121, the larger the potential correction value ΔV. Conversely, when the drive current I _ds of the drive transistor 121 is small, the potential correction value ΔV decreases. In this way, the potential correction value ΔV is determined in response to the drive current I _ds . The larger the signal amplitude V _in , the larger the drive current I _ds , and the greater the absolute value of the potential correction value ΔV. Therefore, mobility correction according to the emission luminance level can be realized. At that time, the recording & mobility correction period H does not necessarily need to be constant, and in some cases, it is desirable to adjust it in response to the drive current I _ds . For example, when the drive current I _ds is large, the mobility correction period t is slightly shortened, and conversely, when the drive current I _ds becomes small, the write & mobility correction period H is slightly long. It is good to set.

As described above, the mobility correction is a process of supplying a current to the storage capacitor 120 through the driving transistor 121 while writing the driving voltage corresponding to the video signal V _sig to the storage capacitor 120. In this mobility correction, the source potential V _s (potential of the second node) is increased by flowing a current through the driving transistor 121 while recording the video signal V _sig as described above, but the source potential V _s is increased. ) _May reach the threshold voltage V _thEL of the light emitting portion ELP of the organic EL element 127, and the organic EL element 127 may be turned on. As a result, the rise of the source potential V _s reflecting the mobility μ of the driving transistor 121 is disturbed, and the correction operation is not normally performed, which causes the deterioration of uniformity. For example, when the driving transistor 121 with an excessively large μ is used, the mobility correction is too long, resulting in a distortion of the gate-source voltage V _gs immediately before light emission, resulting in significant A decrease in luminance and a decrease in uniformity occur. In order to suppress this damage, it is necessary to make a mobility correction pulse narrow, for example. However, in practice, it is difficult to set and manage the pulse width in terms of circuit configuration, delay, and the like in operating the narrow width mobility correction pulse. For example, in the MOSFET, since the mobility μ is high, the mobility correction pulse should be about several nanoseconds so that the mobility correction is too long and the luminance is not lowered. Control of such narrow pulses is difficult. Based on this point, it is desirable to solve the problem without keeping the mobility correction pulse at a narrow width (mainly maintaining the current state).

[Measures against staining phenomenon]

FIG. 11 is a timing chart illustrating a method of driving the pixel circuit of Embodiment 1 focusing on countermeasures against display irregularity caused by the turn-on phenomenon of the organic EL element 127 during the mobility correction period. In this regard, the illustrated example is an example in which the initialization operation (initialization period D) is performed only once for the node ND121 which is the first node, and the threshold correction operation is repeated three times.

In the present embodiment, a method of solving the display unevenness caused by the turn-on phenomenon of the electro-optical element during the mobility correction period is solved by cutting off the current path of the electro-optical element at a certain period corresponding to the mobility correction. do. With this configuration, it is possible to prevent the electro-optical element from turning on by the potential change of the second node during the mobility correction period, without narrowing the mobility correction pulse (mainly maintaining the current state). . The "constant correction period corresponding to the mobility correction" may be to prevent the turn-on of the electro-optical element by blocking the electric current path of the electro-optical element during the roughly "mobility correction period", and there may be some deviations. In other words, the electro-optical element may not be turned on at the time of mobility correction. Therefore, the electro-optical element may not be flowed at all during the mobility correction, or even if it is flowed, it may be stopped before turning on. As long as the electro-optical element does not turn on at the time of correction, a current may flow in the electro-optical element for some period during the mobility correction period.

For example, in Example 1, the node ND122 (second node) and the anode end A (one end of the electro-optical element) of the organic EL element 127 and the "during fixed period corresponding to mobility correction" The solution is to cut off the electrical connection. By such a configuration, it is possible to prevent the potential change of the node ND122 during the mobility correction period from being transmitted to the anode end A of the organic EL element 127, and the organic EL element 127 during mobility correction. Can prevent the turn-on. For example, as shown in Figs. 6 and 7, the pixel circuit 10A of the first embodiment includes the source terminal (ND122: second node) of the driving transistor 121 and one end of the organic EL element 127. (In the drawing, the control transistor 612 is provided with a current between the anode terminal A and the control pulse NDS in which the write drive pulse WS is logically inverted by the inverter 616 at the control input terminal. Supply. In the first embodiment, the "constant correction period corresponding to mobility correction" has a form in which there is little "shift" with the mobility correction period, and the anode of the node ND122 and the organic EL element 127 almost simultaneously with the start of mobility correction. The electrical connection with stage A can be interrupted, and the anode stage A of the node ND122 and the organic EL element 127 almost simultaneously with the start of the subsequent light emission period I (mobility correction end). ) Can be electrically connected.

With the write drive pulse WS active H, the sampling transistor 125 is turned on and the drive voltage corresponding to the image signal V _sig is written into the storage capacitor 120 while the write transistor pulse WS is turned on. In the period of mobility correction processing, which is a process of supplying current to the storage capacitor 120, the control pulse NDS is at L level and the control transistor 612 is turned off by the current. Therefore, the mobility correction period (the figure is recorded & mobility correction period (H)) while, the source potential (V _s) even if the rising (the potential of the second node), which turns on the organic EL elements 127 It does not become a state, and the phenomenon that mobility correction becomes inadequate and causes deterioration of uniformity can be eliminated.

In this regard, the potential (source potential V _s ) of the node ND122 immediately before the control transistor 612 is turned on by a current is different from that of the anode terminal A of the organic EL element 127. In this case, immediately after the connection in which the control transistor 612 is turned on with a current, the potential (source potential V _s ) and the node of the node ND122 (that is, the anode terminal A of the organic EL element 127) and the node ( Although the potential (gate potential V _g ) of ND121 is slightly lowered, there is usually no problem.

[Example 2]

12 to 13 are diagrams illustrating one embodiment of a display device including the pixel circuit 10B of the second embodiment and the pixel circuit 10B. The display device including the pixel circuit 10B of the second embodiment in the pixel array unit 102 is referred to as the display device 1B of the second embodiment. 12 shows a basic configuration (for one pixel), and FIG. 13 shows a specific configuration (the entire display device). 13 is shown as a modification to FIG. 7, but the same modification is also possible with respect to FIG.

In Embodiment 2, the auxiliary capacitance equivalent to the parasitic capacitance C _el of the organic EL element 127 is connected to the node ND122 for each pixel circuit 10B. In detail, as shown in FIGS. 12 and 13, the pixel circuit 10B includes the storage capacitor 614 between the source terminal (node ND122) of the driving transistor 121 and the power supply line 105DSL. Has Although not shown, the storage capacitor 614 may be provided between the source terminal (node ND122) of the driving transistor 121 and the cathode wiring (cath) or other reference potential point. Although not shown, a switch transistor capable of blocking the connection effect of the storage capacitor 614 (that is, the current to the storage capacitor 614) may be provided as necessary. For example, like SW in the figure, the connection between the storage capacitor 614 and the power supply line 105DSL, the cathode wiring, and other reference potential points may be configured to be blocked as necessary. "On demand" means a certain period (preferably the same period) corresponding to the on state of the control transistor 612 with current. The capacitance of the storage capacitor (614) _(sub C) is a capacitance (C _el) may even if almost the same value of the parasitic capacitance (C _el) of the organic EL device 127 (the light emitting portion (ELP) of a).

In the first embodiment, the parasitic capacitance C _el of the organic EL element 127 (light emitting portion ELP) is electrically separated from the node ND122 during the period in which the control transistor 612 is turned off by the current. do. For this reason, the potential change of the node ND122 is not applied to the anode end A of the organic EL element 127, and the organic EL element 127 can be prevented from being turned on. On the other hand, since all the current from the driving transistor 121 becomes the charging current on the storage capacitor 120 side, the operation of the mobility correction period or the threshold correction period is compared with when the control transistor 612 does not exist as a current. The state is different. In the second embodiment, in view of this, even when the control transistor 612 is off in the current state, the operation state of the mobility correction period or the threshold correction period is different from that in which the control transistor 612 is not in the current state. Rivers provide a storage capacitor 614, so that the same state, and preferably the same general rules and that the capacitance (C _sub) capacitance (C _el) of the parasitic capacitance (C _el) of the organic EL element 127. In the illustrated example, the storage capacitor 614 remains connected even during the period when the control transistor 612 is turned on by the current, but there is usually no particular disadvantage. In the case where there is an inadequate point while being connected, as described above, it is sufficient to provide a switch transistor which can cut off the connection between both in the period in which the control transistor 612 is turned on with a current.

[Example 3]

14-16 is a figure which shows one form of the display circuit provided with the pixel circuit 10C of Example 3, and this pixel circuit 10C. The display device including the pixel circuit 10C of the third embodiment in the pixel array unit 102 is referred to as the display device 1C of the third embodiment. 14 shows a basic configuration (for one pixel), and FIG. 15 shows a specific configuration (the entire display device). In that regard, Fig. 15 is shown as a modification to Fig. 13 of Embodiment 2, but the same modification is also possible with respect to Figs. 7 and 8 of Embodiment 1. FIG. 16 is a timing chart for explaining a driving method of the pixel circuit of Example 3 focusing on countermeasures against display irregularity caused by the turn-on phenomenon of the organic EL element 127 during the mobility correction period.

As shown in Fig. 14 and Fig. 15, in Embodiment 3, the inverter 616 is removed, and the control scan is performed with a current that controls the control transistor 612 with current on / off independently of the write drive pulse WS. The unit 611 is provided outside the pixel array unit 102. By the control scanning unit 611 by the current and the control transistor 612 by the current, in conjunction with a process of supplying a current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal to the storage capacitor, A control unit for blocking and controlling the current path is configured.

The current control circuit 611 generates a control pulse NDS for interrupting the current path of the organic EL element 127 (electro-optical element) in the "period of time corresponding to mobility correction", The control pulse NDS is commonly supplied to the control input terminal of the control transistor 612 with the same current through the control scan line 612DS. In other words, "a constant period corresponding to mobility correction" is, in other words, "a constant period corresponding to a process of supplying a current to the storage capacitor via the driving transistor while writing the driving voltage corresponding to the video signal in the storage capacitor".

In the first and second embodiments, the inverter 616 uses the inverter 616 to invert the write drive pulse WS to generate the control pulse NDS, or to control the control transistor 612 with p-channel current. In this case, since the write drive pulse WS is used as the control pulse NDS itself, there is no freedom in setting the timing of the control pulse NDS. Therefore, the on / off operation of the control transistor 612 by the current is almost complementary to the on / off operation of the sampling transistor 125, and the current path of the organic EL element 127 is opened and closed in conjunction with the write drive pulse. Controlled. In contrast, in the third embodiment, since the control pulse NDS can be generated independently of the write drive pulse WS, there is a degree of freedom in setting the timing of the control pulse NDS, and thus the current of the organic EL element 127. The furnace can be opened and closed independently of the recording drive pulse. For example, as shown in Fig. 16, the control pulse NDS is set to the H state in the threshold value correction period E, and L only in the moving beam correction period (in this example, the recording & mobility correction period H). It can also be in a state. In Examples 1 and 2, when the control transistor 612 is turned on with a current at the end of the threshold correction period E, the anode terminal of the immediately preceding source potential V _s and the organic EL element 127 is turned on. Since the potential of (A) is different, the gate potential V _g and the source potential V _s change at the moment when the control transistor 612 is turned on by the added current. In contrast, in the third embodiment, since the control transistor 612 is turned on with current even in the threshold correction period E, the effect of providing the control transistor 612 with the current can be completely excluded. .

16, the control pulse NDS is kept in the H state in the first half of the recording & mobility correction period H, and the control pulse NDS is in the L state only in the second half. It is also possible. In this case, the potential of the anode terminal A of the organic EL element 127 can be raised to such an extent that it does not turn on in the first half of the write & mobility correction period H, so that the control transistor 612 is turned on with a current. The difference between the potential (source potential V _s ) of the node ND122 just before the state and the potential of the anode end A of the organic EL element 127 can be reduced. The same applies to the case where the control pulse NDS is in the L state only in the first half of the recording & mobility correction period H, and the control pulse NDS is in the H state in the second half. Therefore, the potential (source potential V _s ) and the node of the node ND122 (that is, the anode end A of the organic EL element 127) immediately after the connection in which the control transistor 612 is turned on with a current. The change in the potential (gate potential V _g ) of the ND121 can be made smaller than those in the first and second embodiments.

Example 4

17 is a diagram for explaining the fourth embodiment. The fourth embodiment is an example of an electronic apparatus equipped with a display device to which a technique for suppressing and eliminating display unevenness caused by the turn-on phenomenon of the organic EL element 127 during the mobility correction period described above is applied. The display unevenness suppression process of this embodiment can be applied to the display apparatus provided with the current drive type display element used for various electronic devices, such as a game machine, an electronic book, an electronic dictionary, a mobile telephone.

For example, FIG. 17A is a perspective view illustrating an appearance example when the electronic device 700 is a television receiver 702 using the display module 704 that is an example of an image display device. The television receiver 702 has a structure in which the display module 704 is arranged in front of the front panel 703 supported by the pedestal 706, and a filter glass 705 is provided on the display surface. FIG. 17B is a diagram illustrating an appearance example when the electronic device 700 is the digital camera 712. The digital camera 712 includes a display module 714, a control switch 716, a shutter button 717, and the like. FIG. 17C is a diagram illustrating an appearance example when the electronic device 700 is a video camera 722. The video camera 722 is provided with an imaging lens 725 for photographing a subject in front of the main body 723, and a display module 724, a start / stop switch 726 for photographing, and the like. FIG. 17: D is a figure which shows the external example when the electronic device 700 is the computer 732. As shown in FIG. The computer 732 includes a lower mold body 733a, an upper body 733b, a display module 734, a web camera 735, a keyboard 736, and the like. FIG. 17E is a diagram showing an example of the appearance when the electronic device 700 is the mobile phone 742. The cellular phone 742 is folded and has an upper body 743a, a lower body 743b, a display module 744a, a sub display 744b, a camera 745, and a connecting portion 746 (in this example, a hinge portion). ), Picture light 747, and the like.

Here, the display module 704, the display module 714, the display module 724, the display module 734, the display module 744a, and the sub display 744b use the display device according to the present embodiment. Is produced. As a result, each electronic device 700 can not only correct the luminance deviation caused by the deviation of the threshold voltage or mobility of the driving transistor (and, hence, k), but also the organic EL during the mobility correction period. The display unevenness resulting from the turn-on phenomenon of the element 127 can be suppressed and eliminated, and high quality display can be performed.

As mentioned above, although the technique disclosed by this specification was demonstrated using embodiment, the technical scope of description of a claim is not limited to the range as described in the said embodiment. Various changes or improvement can be added to the said embodiment in the range which does not deviate from the summary of the technique disclosed by this specification, The form which added such a change or improvement is also included in the technical scope of the technology disclosed by this specification. The above-described embodiments do not limit the description of the claims, and all combinations of features described in the embodiments are not necessarily required for solving the problems to be solved by the technology disclosed in the present specification. . The above-described embodiment includes techniques of various stages, and various techniques can be extracted by appropriate combinations of the plural configuration requirements disclosed. Even if some configuration requirements are deleted from all the configuration requirements shown in the embodiments, as long as an effect corresponding to the problem targeted by the technology disclosed in this specification can be obtained, a configuration diagram in which these configuration elements are deleted is also provided. It can be extracted as a technique disclosed in.

For example, in the first to third embodiments, although an n-channel transistor is used as the control transistor 612 as a current, this is not essential, and it is also possible to use a p-channel transistor, in which case It is sufficient to supply the write drive pulse WS and the control pulse of the same polarity to the control input terminal of the p-channel transistor.

In the first to third embodiments, the control transistor 612 is provided between the node ND122 and the anode terminal A of the organic EL element 127 by the current. Other configurations may be used as long as the opening and closing of the organic EL element 127 to the current can be controlled in a certain period corresponding to the correction. For example, although not shown, the control transistor 612 may be provided between the cathode terminal K and the cathode wiring cath of the organic EL element 127 with a current.

In addition, the display resulting from the turning on of the electro-optical element when the processing (corresponding to the mobility correction processing) for supplying a current to the storage capacitor via the driving transistor while recording the driving voltage corresponding to the video signal in the storage capacitor is performed. In terms of suppressing unevenness, it is necessary to be configured to be controllable so as to prevent the electro-optical element from turning on at least in the period of the treatment. In order to cope with this, as in the third embodiment, the control timing of the pixel circuit 10 is controlled by the control unit 109 (in the above-described example, the control scanning unit 611 with the current) provided outside the pixel circuit. It is not essential to implement, and like the first and second embodiments, a circuit element for the countermeasure may be provided in the pixel circuit. That is, a blocking control unit is provided for each pixel circuit with a current to cut off the current path of the electro-optical element in conjunction with a process of supplying a current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal into the storage capacitor. You may also do it.

Alternatively, as in the third embodiment, the control pulse NDS is controlled by the logic circuit by using the driving pulse output by the other scanning unit without providing the control scanning unit 611 with an independent current outside the pixel circuit 10. ) May be generated, and the control transistor 612 may be controlled by a current by the control pulse NDS.

A control transistor 612 as a current was used as a control transistor as a current as an electronic member to cut off the current path of the electro-optical element in conjunction with a process of writing a drive voltage corresponding to the video signal into the storage capacitor, but other switch members May be used. For example, it is needless to say that the complementary structure obtained by replacing the transistors with n-channels and p-channels and inverting the polarities of the power supply and the signal can be achieved.

Based on the description of the above embodiment, the technology related to the claims described in the claims is one example, and the following technology is extracted, for example. Open below.

[Bookkeeping 1]

With display part,

With storage capacity,

A write transistor for recording a drive voltage corresponding to the video signal into the storage capacitor;

A driving transistor for driving the display unit based on the driving voltage recorded in the storage capacitor;

A pixel circuit configured to control opening and closing of a current to a display unit in association with a process of writing a driving voltage corresponding to a video signal into a storage capacitor.

[Supplementary Note 2]

Annex 1 which controls to cut off the current path of the display unit for a predetermined period of time corresponding to a process of supplying a video signal to the control input terminal and one end of the storage capacitor of the driving transistor through the write transistor and supplying current to the storage capacitor through the driving transistor. The pixel circuit described.

[Appendix 3]

The pixel circuit according to Appendix 1 or Appendix 2, wherein the display transistor has a control transistor with a current capable of controlling opening and closing of a current to the display unit.

[Appendix 4]

The pixel circuit according to Appendix 3, wherein the control transistor is controlled in conjunction with a write drive pulse for controlling the write transistor.

[Appendix 5]

The pixel circuit according to Appendix 3, wherein the control transistor is controlled independently of the write drive pulse for controlling the write transistor.

[Supplementary Note 6]

One end of the storage capacitor is connected to the connection point between the other end of the storage capacitor and one main electrode terminal of the driving transistor,

The other end of the storage capacitor is the pixel circuit according to any one of appendices 1 to 5, which is connected to a predetermined reference potential point.

[Appendix 7]

The pixel circuit according to Appendix 6, wherein the capacitance of the storage capacitor is approximately equal to the capacitance of the parasitic capacitance of the display unit.

[Appendix 8]

The pixel circuit according to Appendix 6 or Appendix 7, wherein the connection of the storage capacitor is configured to be cut off in association with a process of writing a drive voltage corresponding to the video signal into the storage capacitor.

[Appendix 9]

The process of supplying a current to the storage capacitor via the driving transistor while supplying the video signal to the control input terminal and the storage capacitor end of the driving transistor via the write transistor is an appendix used for the mobility correction process of correcting the mobility of the driving transistor. The pixel circuit as described in any one of 1-8.

[Appendix 10]

The pixel circuit according to any one of notes 1 to 9, which performs a process of supplying a current to the storage capacitor through the drive transistor after the threshold voltage correction process of the drive transistor.

[Appendix 11]

The pixel circuit according to Appendix 10, wherein the current path of the display unit is not interrupted during the threshold voltage correction process.

[Appendix 12]

A pixel portion in which a display portion is arranged;

The pixel circuit according to any one of appendices 1 to 11, wherein the characteristic control section controls the characteristics of the driving transistor for each display section.

[Note 13]

The pixel circuit according to Appendix 12, wherein the pixel portion is arranged in a two-dimensional matrix.

[Note 14]

Any one of Supplementary Notes 1 to 13, further comprising a control unit for blocking and controlling the current path of the display unit in association with a process of supplying a current to the storage capacitor through the driving transistor while recording the driving voltage corresponding to the video signal in the storage capacitor. The pixel circuit described in.

[Appendix 15]

The pixel circuit according to any one of supplementary notes 1 to 14, wherein the display portion is a self-luminous type.

[Appendix 16]

The pixel circuit of Appendix 15 which has a display part which has an organic electroluminescent light emitting part.

[Note 17]

A display element comprising a display portion, a storage capacitor, a write transistor for recording a drive voltage corresponding to the video signal in the storage capacitor, and a drive transistor for driving the display portion based on the drive voltage recorded in the storage capacitor, ,

And a control unit capable of controlling the opening and closing of a current to the current of the display unit in association with a process of recording the driving voltage corresponding to the video signal into the storage capacitor.

[Appendix 18]

A control transistor is provided for each display element with a current capable of controlling the opening and closing of the current path of the display unit.

The display device according to Appendix 17, which has a control scan section with a current for controlling the control transistor on / off with a current.

[Note 19]

And a display element comprising a display portion, a storage capacitor, a write transistor for recording a drive voltage corresponding to the video signal in the storage capacitor, and a drive transistor for driving the display portion based on the drive voltage recorded in the storage capacitor, and ,

A signal generator for generating an image signal supplied to the pixel portion;

And a control unit capable of controlling the opening and closing of the current to the display unit in association with a process of recording a driving voltage corresponding to the video signal into the storage capacitor.

[Note 20]

A method of driving a pixel circuit having a driving transistor for driving a display portion,

A driving method of a pixel circuit which controls opening and closing of a current to a display unit in association with a process of writing a driving voltage corresponding to a video signal into a storage capacitor.

The present invention claims priority to Japanese Patent Application No. 2011-107911 filed with the Japan Patent Office on May 13, 2011.

1: display device 10: pixel circuit
11: light emitting element 100: display panel portion
101 substrate 102 pixel array portion
103: vertical drive unit 104: recording scanning unit
105: driving scan unit 106: horizontal driving unit
120: storage capacity 121: driving transistor
125: sampling transistor (write transistor)
127: organic EL element 130: interface unit
200: driving signal generation unit 220: image signal processing unit
611: control by current scanning unit 612: control by current transistor
612, 614: auxiliary capacity 616: inverter
700: electronic equipment

Claims (20)

A display unit;
Storage capacity;
A write transistor for writing a driving voltage corresponding to the video signal into the storage capacitor; And
A driving transistor for driving the display unit based on the driving voltage recorded in the storage capacitor;
And a control circuit for controlling opening and closing of a current to the current of the display unit in association with a process of writing a driving voltage corresponding to a video signal into a storage capacitor. The method of claim 1,
And controlling the current path of the display unit to be interrupted for a predetermined period of time corresponding to a process of supplying a current to the storage capacitor through the driving transistor while supplying an image signal to the storage capacitor through the write transistor. Pixel circuit. The method of claim 1,
And a control transistor with a current capable of controlling opening and closing of a current path of the display unit. The method of claim 3, wherein
And the control transistor is controlled in conjunction with a write driving pulse for controlling the write transistor. The method of claim 3, wherein
And the control transistor is controlled independently of a write drive pulse for controlling the write transistor. The method of claim 1,
One end of the storage capacitor is connected to a connection point between the other end of the storage capacitor and one main electrode terminal of the driving transistor,
The other end of the storage capacitor is connected to a predetermined reference potential point. The method according to claim 6,
And the capacitance of the storage capacitor is approximately equal to the capacitance of the parasitic capacitance of the display unit. The method according to claim 6,
The connection of the storage capacitors is configured to be cut off in association with a process of writing the drive voltage corresponding to the video signal into the storage capacitor. The method of claim 1,
The process of supplying a current to the storage capacitor via the driving transistor while supplying the video signal to one end of the storage capacitor via the write transistor is used for a mobility correction process of correcting the mobility of the driving transistor. A pixel circuit characterized by the above-mentioned. The method of claim 1,
And a process of supplying a current to the storage capacitor through the drive transistor after the threshold voltage correction process of the drive transistor. The method of claim 10,
And the current path of the display unit is not interrupted during the correction process of the threshold voltage. The method of claim 1,
The display unit further comprises a pixel unit arranged,
And a characteristic control unit controls the characteristics of the driving transistor for each of the display units. 13. The method of claim 12,
And the display portion is arranged in a two-dimensional matrix. The method of claim 1,
And a control unit for blocking the current path of the display unit in conjunction with a process of supplying a current to the storage capacitor through the driving transistor while writing the driving voltage corresponding to the video signal to the storage capacitor. Pixel circuit. The method of claim 1,
And the display unit is self-luminous. 16. The method of claim 15,
And the display portion has an organic electroluminescent light emitting portion. A display element arranged with a display portion, a storage transistor, a write transistor for recording a drive voltage corresponding to the video signal in the storage capacitor, and a drive transistor for driving the display portion based on the drive voltage recorded in the storage capacitor; And
And a control unit capable of controlling opening and closing of a current to the display unit in association with a process of writing the driving voltage corresponding to the video signal into the storage capacitor. 18. The method of claim 17,
A control transistor is provided for each display element with a current capable of controlling the opening and closing of the current path of the display unit.
And a control scan section provided with a current for turning on / off the control transistor with the current. A pixel including a display element arranged with a display portion, a storage transistor, a write transistor for writing a drive voltage corresponding to the video signal into the storage capacitor, and a drive transistor for driving the display portion based on the drive voltage recorded in the storage capacitor. Wealth;
A signal generator configured to generate the image signal supplied to the pixel unit; And
And a control unit capable of controlling the opening and closing of a current to the display unit in association with a process of recording the driving voltage corresponding to the video signal into the storage capacitor. A method of driving a pixel circuit having a driving transistor for driving a display unit, the method comprising:
And opening / closing the current into the current of the display unit in conjunction with a process of writing a driving voltage corresponding to a video signal into a storage capacitor.

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