KR20120038180A - Liquid crystal display - Google Patents

Abstract

PURPOSE: A liquid crystal display device is provided to reduce hardware resources of an FPGA(Field Programmable Gate Array) and an ASIC(Application Specific Integrated Circuit) during local dimming. CONSTITUTION: A backlight unit(16) irradiates light onto a rear side of a liquid crystal display panel. A backlight driving circuit drives light sources based on a dimming value per a block by a predetermined block unit. A local dimming control circuit(14) analyzes input data by a horizontal line unit. The local dimming control circuit calculates a representative value per each block which is arranged in a corresponding horizontal line by a line sequential method. The local dimming control circuit determines the dimming value per a block according to the representative value per each block.

Description

Liquid Crystal Display {LIQUID CRYSTAL DISPLAY}

The present invention relates to a liquid crystal display device capable of improving the contrast ratio of a display image.

BACKGROUND ART Liquid crystal display devices have tended to be gradually widened due to their light weight, thinness, and low power consumption. The liquid crystal display device is used as a portable computer such as a notebook PC, office automation equipment, audio / video equipment, indoor and outdoor advertising display devices, and the like. The liquid crystal display displays an image by using a thin film transistor (TFT) as a switching element. The transmissive liquid crystal display device, which occupies most of the liquid crystal display device, displays an image by controlling an electric field applied to the liquid crystal layer to modulate the light incident from the backlight unit.

The image quality of the liquid crystal display device depends on the contrast characteristics. Only the method of modulating the light transmittance of the liquid crystal layer by controlling the data voltage applied to the liquid crystal layer has a limitation in improving this contrast characteristic. In order to improve the contrast characteristic, a backlight dimming method for adjusting the brightness of the backlight unit according to an image has been proposed. The backlight dimming method includes a global dimming method for adjusting the luminance of the entire display surface and a local dimming method for locally adjusting the luminance of the display surface. The global dimming method may improve dynamic contrast measured between the previous frame and the next frame. The local dimming method can improve the static contrast that is difficult to improve with the global dimming method by locally controlling the luminance of the display surface within one frame period.

The local dimming method divides the backlight into a plurality of blocks and adjusts the dimming value for each block to increase the backlight luminance of the bright block while reducing the backlight luminance of the dark block. The dimming value of each block is generated based on the analysis result of the video signal of the block. Image analysis is performed every frame. After image analysis of one frame is finished, the dimming value for each block is transferred to the backlight, and the lighting duty of the light source in each block is adjusted based on the corresponding dimming value.

In the conventional local dimming method, an image is analyzed on a frame-by-frame basis, and the dimming values of all blocks are simultaneously generated based on the analysis result, and then the generated dimming value is defined as a specific time t in the vertical blank period VB as shown in FIG. 1. At the same time as the backlight. In FIG. 1, 'Vsync' indicates a vertical synchronization signal. The vertical blank period VB indicates a period in which a valid image is not displayed between neighboring frames. However, in order to simultaneously generate the dimming values of all the blocks, as many image analyzers as the number of light source blocks are required. As the number of image analyzers increases, the hardware resources of a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC) increase in local dimming. This problem is caused by image analysis performed on a frame basis.

Accordingly, an object of the present invention is to provide a liquid crystal display device which can reduce hardware resources of an FPGA or an ASIC when implementing local dimming.

In order to achieve the above object, the liquid crystal display device according to an embodiment of the present invention comprises a liquid crystal display panel; A backlight unit that includes a plurality of light sources and emits light onto a rear surface of the liquid crystal display panel; A backlight driving circuit for driving the light sources in predetermined block units based on the dimming value for each block; And local dimming to derive a representative value for each block for each of the blocks arranged in the horizontal line by analyzing the input data in units of horizontal lines, and to determine the dimming value for each block according to the representative value for each block. A control circuit is provided.

The local dimming control circuit may include: a maximum value derivation unit for deriving maximum values of pixels in each block including a plurality of pixels; A representative value calculator configured to accumulate the derived maximum values for one horizontal period and calculate the accumulated result as the representative value for each block; And a reset unit for generating a reset signal to reset the representative value calculator every one horizontal period.

The representative value calculator includes accumulators corresponding to the number of blocks arranged in one horizontal line to accumulate the maximum values; The accumulators are reset according to the reset signal immediately after outputting the block-specific representative values of the corresponding horizontal line.

The time point at which the dimming value for each block is applied to the light sources is changed in units of horizontal lines.

Dimming values of the first line blocks arranged in the first horizontal line are applied to the first line blocks in the horizontal blank period between the first horizontal period and the second horizontal period, and the second line disposed in the second horizontal line. The dimming values of the blocks are applied to the second line blocks in the horizontal blank period between the second horizontal period and the third horizontal period, and the dimming values of the m-1 line blocks arranged on the m-1 horizontal line are set to the first horizontal period. The dimming values of the m-th line blocks applied to the m-th line blocks in a horizontal blank period between m-1 horizontal period and mth horizontal period, and arranged on the m-th horizontal line are m-th horizontal period and m-th. Applied to the mth line blocks in a horizontal blank period between +1 horizontal period.

The local dimming control circuit may include a first light amount indicating an amount of light reaching each pixel when all of the light sources are turned on at maximum brightness, and a light amount reaching the pixel at local dimming by the dimming value for each block. A light quantity deriving unit for deriving the indicated second light quantity; A gain value calculator for calculating a pixel gain value for each pixel based on the first and second light amounts; And a data modulator for compensating the input data by multiplying the input data by the pixel gain value.

Since the liquid crystal display according to the present invention performs image analysis in units of horizontal lines according to a line sequential method, a register for storing representative values of blocks and dimming values of blocks is compared with that of image analysis in units of frames. The number can be greatly reduced. As a result, according to the present invention, the hardware resources of the FPGA or the ASIC can be greatly reduced when implementing local dimming.

1 is a view showing a time point when a dimming value is applied in the conventional local dimming implementation.
2 illustrates a liquid crystal display according to an exemplary embodiment of the present invention.
3 shows a local dimming control circuit that can reduce hardware resources.
4 is a view illustrating in detail the image analyzer and dimming value determiner of FIG. 3;
5 shows a number of blocks divided for local dimming implementation.
6 shows a waveform of a reset signal.
FIG. 7 is a diagram illustrating a time point at which block-specific dimming values are applied to light sources when local dimming is implemented. FIG.
FIG. 8 is a diagram showing an analysis region of P (block number) × P (block number) size surrounding a block including a corresponding pixel. FIG.
9 is a diagram showing the number of registers required when designing a local dimming algorithm for the number of blocks of 5120;

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 2 to 9.

2 shows a liquid crystal display according to an embodiment of the present invention.

2, a liquid crystal display according to an exemplary embodiment of the present invention includes a liquid crystal display panel 10, a timing controller 11, a data driving circuit 12, a gate driving circuit 13, and a local dimming control circuit 14. ), A backlight driving circuit 15, and a backlight unit 16.

The liquid crystal display panel 10 includes two glass substrates and a liquid crystal layer formed therebetween. A plurality of data lines DL and a plurality of gate lines GL cross on the lower glass substrate of the liquid crystal display panel 10. The liquid crystal cells Clc are arranged in a matrix form on the liquid crystal display panel 10 due to the cross structure of the data lines DL and the gate lines GL. Each of the liquid crystal cells Clc includes a TFT, a pixel electrode 1 connected to the TFT, a storage capacitor Cst, and the like. A black matrix, a color filter, a common electrode 2, and the like are formed on the upper glass substrate of the liquid crystal display panel 10. The common electrode 2 is formed on the upper glass substrate in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, and has an in plane switching (IPS) mode and a fringe field switching (FFS) mode. In the same horizontal electric field driving method, the pixel electrode 1 is formed on the lower glass substrate. The liquid crystal cells Clc include R liquid crystal cells for red display, G liquid crystal cells for green display, and B liquid crystal cells for blue display. The R liquid crystal cell, the G liquid crystal cell, and the B liquid crystal cell constitute one unit pixel. A polarizing plate is attached to each of the upper glass substrate and the lower glass substrate of the liquid crystal display panel 10, and an alignment layer for setting a pretilt angle of the liquid crystal is formed on an inner surface of the liquid crystal display panel 10 in contact with the liquid crystal.

The timing controller 11 supplies digital video data RGB input from an external system board (not shown) on which a video source is mounted, to the local dimming control circuit 14, and modulates it by the local dimming control circuit 14. The modulated data R'G'B 'is supplied to the data driving circuit 12. The timing controller 11 includes timing control signals for controlling the operation timing of the data driving circuit 12 and the gate driving circuit 13 based on the timing signals Vsync, Hsync, DE, and DCLK from the system board. DDC, GDC). The timing controller 11 inserts an interpolation frame between frames of an input video signal input at a frame frequency of 60 Hz, multiplies the data timing control signal DDC and the gate timing control signal GDC, and 60 × N The operation of the data driving circuit 12 and the gate driving circuit 13 can be controlled at a frame frequency of two or more positive integers Hz.

The data driver circuit 12 includes a plurality of data drive integrated circuits. The data drive integrated circuit includes a shift register for sampling a clock signal, a register for temporarily storing input data, and one line for storing data in response to a clock signal from the shift register and simultaneously for outputting one stored line of data. A digital / analog converter for selecting a positive / negative gamma voltage under reference to a gamma reference voltage corresponding to a digital data value from the latch, and analog data converted by the positive / negative gamma voltage is supplied. And a multiplexer for selecting the data line DL and an output buffer connected between the multiplexer and the data line DL. The data driving circuit 12 latches the modulation data R'G'B 'under the control of the timing controller 11, and the latched modulation data R'G'B' is subjected to positive / negative gamma compensation. The voltage is converted into the positive / negative analog data voltage and then supplied to the data lines DL.

The gate driving circuit 13 includes a plurality of gate drive integrated circuits. The gate drive integrated circuit includes a shift register, a level shifter for converting an output signal of the shift register into a swing width suitable for driving a TFT of a liquid crystal cell, an output buffer, and the like. The gate driving circuit 13 sequentially outputs scan pulses (or gate pulses) to the gate lines GL under the control of the timing controller 11, thereby selecting a horizontal line to which a data voltage is applied. The gate driving circuit 13 may be directly formed on the lower glass substrate of the liquid crystal display panel 10 according to a gate in panel (GIP) method. In the GIP method, the level shifter may be mounted on a control board (not shown) together with the timing controller 11.

The local dimming control circuit 14 analyzes the input data RGB in units of horizontal lines to derive a representative value for each block, and block-by-block for controlling light sources of the backlight unit 16 based on the representative value for each block. Determine the dimming value (DIM). After calculating a pixel gain value for compensating for the luminance deterioration due to the dimming value DIM for each block, the input data RGB is compensated based on the pixel gain value. The compensated data is output as final modulation data R'G'B '.

The backlight driving circuit 15 blocks light sources of the backlight unit 16 by pulse width modulation (PWM) in which the duty ratio is changed according to the block-specific dimming value DIM input from the local dimming control circuit 14. Drive in units. The lighting duty of the light sources is controlled according to the PWM duty ratio.

The backlight unit 16 includes a plurality of light sources and divides the surface light source irradiated to the liquid crystal display panel 10 into blocks in a matrix form. The backlight unit 16 may be implemented as one of a direct type and an edge type. The direct type backlight unit 16 has a structure in which a plurality of optical sheets and a diffusion plate are stacked below the liquid crystal display panel 10 and a plurality of light sources are disposed below the diffusion plate. The edge type backlight unit 16 has a structure in which a plurality of optical sheets and a light guide plate are stacked below the liquid crystal display panel 10 and a plurality of light sources are disposed on the side of the light guide plate. The light sources may be implemented as point light sources such as light emitting diodes (LEDs).

3 shows an example of a local dimming control circuit 14 that can reduce hardware resources.

Referring to FIG. 3, the local dimming control circuit 14 includes an image analyzer 141 and a dimming value determiner 142 to derive a dimming value DIM for each block.

The image analyzer 141 includes a maximum value deriving unit 141A, a representative value calculating unit 141B, and a reset unit 141C as shown in FIG. 4. The maximum value deriving unit 141A divides the input digital data RGB into virtual blocks BLK [1,1] to BLK [n, which are divided in a matrix form on the display screen of the liquid crystal display panel 10 as shown in FIG. m]) to obtain maximum values MAX_D of pixels in each block. The virtual blocks BLK [1,1] to BLK [n, m] correspond to the light source blocks 1: 1. Each block contains a plurality of pixels. The maximum value MAX_D of the pixel is selected as the maximum gray level value among the RGB values of the pixel. The representative value calculator 141B includes accumulators AC # 1 to AC # m corresponding to the number of blocks arranged in one horizontal line. Each of the accumulators AC # 1 to AC # m accumulates the maximum values MAX_D of the corresponding block input from the maximum value deriving unit 141A for one horizontal period, and accumulates the accumulated result of the block-specific representative value RV_D. ) As shown in FIG. 6, the reset unit 141C generates a reset signal RST at one horizontal period H based on a timing signal such as a horizontal sync signal Hsync or a data enable signal DE. Reset AC # 1 ~ AC # m). The accumulators AC # 1 to AC # m are reset immediately after outputting the block-specific representative value RV_D of the corresponding horizontal line. Each of the accumulators AC # 1 to AC # m accumulates and outputs the maximum values MAX_D of the corresponding blocks sequentially from the first horizontal line to the nth horizontal line. The number of accumulators AC # 1 to AC # m is reduced to 1 / n.

The dimming value determiner 142 determines the dimming value DIM for each block by mapping a representative block value RV_D from the image analyzer 141 to a preset dimming curve. The dimming value per block DIM may be determined to be high in a block having a high representative value of data and low in a block having a low representative value. The dimming value determiner 142 includes a dimming value mapping unit 142A and a lookup table 142B for implementing a dimming curve. In the lookup table 142B, the block-specific dimming value DIM of the number of j (j <k) bits corresponding to the block-specific representative value RV_D of the number of k bits is stored in advance. The dimming value mapping unit 142A maps the block-specific representative value RV_D to the lookup table 142B to determine the dimming value DIM for each block and supplies the same to the backlight driving circuit.

In the present invention and the prior art, when the block-based dimming value (DIM) is applied to the light sources of the backlight unit is compared as follows. In the prior art, as shown in FIG. 1, all block-specific dimming values DIM are simultaneously applied to light sources of a backlight unit in a vertical blank period VB after image analysis for one frame is completed. In contrast, in the present invention, as shown in FIG. 7, a time point at which the block-specific dimming value DIM is applied to the light sources of the backlight unit is changed in units of horizontal lines. That is, the dimming values DIM of the first line blocks arranged in the first horizontal line HL # 1 are applied to the first line blocks in the horizontal blank period HB between the first horizontal period and the second horizontal period. The dimming values DIM of the second line blocks applied to the second horizontal line HL # 2 are applied to the second line blocks in the horizontal blank period HB between the second horizontal period and the third horizontal period. The dimming values DIM of the m-th line blocks disposed in the m-1th horizontal line HL # m-1 are applied to the horizontal blank period between the m-1th horizontal period and the mth horizontal period. The dimming values DIM of the m-th line blocks applied to the m-th line blocks in HB and disposed on the m-th horizontal line HL # m are the m-th horizontal period and the m + 1-th horizontal period. Is applied to the mth line blocks in the horizontal blank period HB in between. In FIG. 7, 'Vsync' indicates a vertical synchronization signal and 'Hsync' indicates a horizontal synchronization signal.

Meanwhile, the local dimming control circuit 14 further includes a light amount deriving unit 143, a gain value calculating unit 144, and a data modulating unit 145 so as to compensate for luminance reduction due to local dimming through modulation of pixel data. It can be provided.

The light amount deriving unit 143 includes the amount of light reaching the pixel at the time of non-local dimming (the amount of light at non-dimming) and the amount of light reaching the pixel at the time of local dimming at the dimming value per block (DIM). Light quantity) is derived for each pixel. The light quantity at non-dimming indicates the total amount of light reaching the pixel when all the light sources of the backlight are turned on at the maximum brightness. When dimming, the amount of light is analyzed with a size of P (block number) × P (block number) (P is an odd odd number of 3 or more) surrounding the block including the pixel when local dimming, as shown in FIG. 8. It indicates the total amount of light reaching the pixel in the area. The amount of light upon dimming is determined by the block-specific dimming value DIM of the blocks in the analysis region.

The gain calculator 144 calculates a pixel gain value G for each pixel based on the amount of light at the time of non-dimming and the amount of light at the time of dimming from the light amount deriving unit 143. The gain value calculator 144 divides the amount of light at the time of non-dimming by the amount of light at the time of dimming, and calculates the pixel gain value G by performing a 1 / γ power exponential operation on the result.

The data modulator 145 modulates the input data RGB by multiplying the pixel gain value G from the gain value calculator 144 by the input data RGB. The input data RGB is modulated to a value R'G'B 'that can compensate for the decrease in luminance due to local dimming.

FIG. 9 compares the number of registers required for designing a local dimming algorithm for the number of blocks of 5120 (ie, width 80 × length 60). In FIG. 9, '15' indicates the number of data bits of the representative value RV_D for each block to be stored in each block, and '8' indicates the number of data bits of the dimming value DIM for each block to be stored in each block. Instruct.

As can be seen from FIG. 9, since image analysis is performed on a frame-by-frame basis, 194,560 registers are needed to store the block-specific representative values RV_D and the block-specific dimming values DIM at a time. It was. In contrast, in the present invention, since image analysis is performed in units of horizontal lines according to the line sequential method, only 3,040 registers are used to store the representative values RV_D and dimming values DIM of each block. It is enough.

According to the present invention, when implementing local dimming, hardware resources of an FPGA or an ASIC can be significantly reduced.

It will be apparent to those skilled in the art that various modifications and variations can be made in the present invention without departing from the spirit or scope of the invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

10 liquid crystal display panel 11 timing controller
12: data driving circuit 13: gate driving circuit
14: local dimming control circuit 15: light source driving circuit
16: backlight unit 141: image analysis unit
141A: maximum value derivation unit 141B: representative value calculation unit
141C: reset section 142: dimming value determination section
142A: dimming value mapping unit 142B: lookup table
143: light amount deriving unit 144: gain value calculating unit
145: data modulation unit

Claims (6)

A liquid crystal display panel;
A backlight unit that includes a plurality of light sources and emits light onto a rear surface of the liquid crystal display panel;
A backlight driving circuit for driving the light sources in predetermined block units based on the dimming value for each block; And
Local dimming control to analyze the input data in units of horizontal lines to derive a representative value for each block for each block arranged in the horizontal line in a line sequential manner, and determine the dimming value for each block according to the representative value for each block A liquid crystal display device comprising a circuit. The method of claim 1,
The local dimming control circuit,
A maximum value deriving unit for deriving maximum values of pixels in each block including a plurality of pixels;
A representative value calculator configured to accumulate the derived maximum values for one horizontal period and calculate the accumulated result as the representative value for each block; And
And a reset unit for generating a reset signal to reset the representative value calculator in one horizontal period. The method of claim 2,
The representative value calculator includes accumulators corresponding to the number of blocks arranged in one horizontal line to accumulate the maximum values;
And the accumulators are reset according to the reset signal immediately after outputting the representative values for each block of the corresponding horizontal line. The method of claim 1,
And a time point at which the dimming value for each block is applied to the light sources is changed in units of horizontal lines. The method of claim 4, wherein
Dimming values of the first line blocks arranged in the first horizontal line are applied to the first line blocks in the horizontal blank period between the first horizontal period and the second horizontal period, and the second line disposed in the second horizontal line. The dimming values of the blocks are applied to the second line blocks in the horizontal blank period between the second horizontal period and the third horizontal period, and the dimming values of the m-1 line blocks arranged on the m-1 horizontal line are set to the first horizontal period. The dimming values of the m-th line blocks applied to the m-th line blocks in a horizontal blank period between m-1 horizontal period and mth horizontal period, and arranged on the m-th horizontal line are m-th horizontal period and m-th. And the m-th line blocks in a horizontal blank period between +1 horizontal period. The method of claim 2,
The local dimming control circuit,
A first light amount indicating an amount of light reaching each pixel when all of the light sources are turned on at maximum brightness, and a second light amount indicating the amount of light reaching each pixel at local dimming by the dimming value for each block; Light quantity derivation unit;
A gain value calculator for calculating a pixel gain value for each pixel based on the first and second light amounts; And
And a data modulator for compensating the input data by multiplying the input data by the pixel gain value.

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