KR20110093330A - Large screen display device using a tiling technology and a fabricating method thereof - Google Patents

Abstract

PURPOSE: A large screen display device using a tiling technique and manufacturing method thereof are provided to optimize the arrangement, the junction, and wire connection between panels by improving a tiling technique and to minimize a junction part. CONSTITUTION: A large screen display device using a tiling technique includes as follows. A plurality of panels(100A~100F) are jointed to each other through a stepped junction surface and includes a color array substrate(CFA) including a color filter and an TFT array substrate(TFTA) including signal wires. A plurality of ICs drives the signal wires by connected to the panels. A signal redistribution circuit distributes an input image signal suitable to a pixel composition of the jointed panels. Each of the junction surfaces of the panels is formed as a stepped surface to enable the TFT array substrate to be more projected than the color array substrate. The TFT array substrate of neighboring panels and the color filter array substrate is arranged on the same surface.

Description

LARGE SCREEN DISPLAY DEVICE USING A TILING TECHNOLOGY AND A FABRICATING METHOD THEREOF}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device and a method of manufacturing the same, which are realized with a large screen of 80 ns or larger by bonding small display panels using tiling techniques.

Various flat panel displays (FPDs) are being developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCDs"), field emission displays (FEDs), plasma display panels (PDPs), and electroluminescence devices (electroluminescence devices). ). The flat panel display device is divided into a PM (Passive Matrix) display device and an AM (Active Matrix) display device according to its driving method. The electroluminescent device is divided into an inorganic electroluminescent device and an organic light emitting diode device (OLED) according to the material of the light emitting layer.

In the TFT TFT LCD, a thin film transistor (TFT) is formed as a switching element for each pixel. AM TFT LCD can be miniaturized compared to Cathode Ray Tube (CRT), which is applied to display in portable information equipment, office equipment, computer, etc., and is also rapidly replacing cathode ray tube in TV.

Module makers of AM TFT LCDs are able to produce large 60-inch TV panels thanks to the remarkable development of process technology. Despite the development of such a large screen technology, it is not possible to implement a large screen display device of 80 kHz or more with the current process technology.

The display device bonded to the demands of the board of the conference room, the bulletin board of the government office, and the electronic board of the school should be implemented with a large screen of 100 ˝ or more, but the current process technology cannot cope with it. Although large screens can be implemented using front or rear projection technology, the projector requires expensive xenon lamps and the short lifetime and cost of the xenon lamps make it difficult to respond effectively to the market demands of large screen displays. have.

As one method for implementing a large display, a tiling technique for joining small panels is known. However, the tiling technique known to date has not been optimized for alignment, bonding, and wiring connection techniques required for bonding, so that the bonding portion is visually observed and cannot be established as a mass production technique.

SUMMARY OF THE INVENTION An object of the present invention is to provide a large screen display device and a method of manufacturing the same, which can improve tiling technology to optimize alignment, bonding, and wiring connection between panels, and minimize bonding.

In one aspect of the present invention, a large display device of the present invention comprises: a plurality of panels each including a TFT array substrate including signal wirings and a color filter array substrate including a color filter and bonded to each other through a stepped bonding surface; A plurality of ICs connected to the panels to drive the signal wires; And a signal redistribution circuit for distributing an input video signal to match the pixel configuration of the bonded panels. Each of the bonding surfaces of the panels is formed as a step surface such that the TFT array substrate protrudes from the color filter array substrate. The TFT array substrate and the color filter array substrate of the neighboring panels are arranged crosswise on the same plane.

The panels include a display panel of any one of an LCD and an OLED.

The panels may include a first panel including a first TFT array substrate and a first color filter array substrate; And a second panel including a second TFT array substrate and a second color filter array substrate. The first TFT array substrate and the second color filter array substrate are arranged on the same plane, and the first color filter array substrate and the second TFT array substrate are arranged on the same plane. At the bonding surface, signal wirings of the first TFT array substrate are electrically connected by joining and matching the signal wirings of the second TFT array substrate which are inverted through any one of an anisotropic conductive film and a conductive ball.

The display device includes tempered glass bonded to the panels to reinforce the mechanical strength of the panels; A plurality of backlight units for irradiating light to the panels is further provided. The width of the joining surface is between 0.5 mm and 10 mm.

The large display device of the present invention cuts a plurality of panels each including a TFT array substrate including signal wiring lines, a color filter array substrate including color filters, and a plurality of ICs for driving the signal wiring lines, and cuts the side panels of the panels. Forming a differential cut surface; And joining the adjacent panels so that stepped cut surfaces of the panels face each other and electrically connecting signal wirings of the neighboring panels.

The present invention provides an arrangement, bonding, and bonding between panels by cutting a cut surface of each panel so that the TFT array substrate protrudes from the color filter array substrate, and cross-aligning the TFT array substrate and the color filter array substrate on the same plane to bond neighboring panels. Optimize wiring connections and minimize joints.

1 is a plan view illustrating a large screen display device according to an exemplary embodiment of the present invention.
FIG. 2 is a cross-sectional view of the large-screen display device taken along the line "I-I '" in FIG.
3 is a cross-sectional view of the large-screen display device taken along the line "II-II '" in FIG.
4 is a perspective view illustrating a panel and a backlight unit bonded to each other in the large-screen display device of the present invention.
5 is an exploded perspective view showing a part of the LCD panel.
6 is a cross-sectional view showing in detail the structure of the TFT array substrate shown in FIG.
7 is a plan view showing cut lines of panels.
8 is a perspective view showing the signal wiring connection between the panels in the bonding surface.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Reference will now be made in detail to the preferred embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Like numbers refer to like elements throughout. In the following description, when it is determined that a detailed description of known functions or configurations related to the present invention may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

Component names used in the following description are selected in consideration of ease of specification, and may be different from the actual product.

The display device according to the exemplary embodiment of the present invention bonds panels of a flat panel display device such as an LCD and an OLED by using a tiling technique.

Referring to FIG. 1, a large display device according to an exemplary embodiment of the present invention includes a plurality of panels 100A to 100F bonded to each other.

Each of the panels 100A to 100F includes a TFT array substrate (or first substrate TFTA) including signal wirings and TFTs, and a color filter array substrate (or second substrate CFA) on which a color filter and a black matrix are formed. do. The signal lines include data lines to which data is supplied, and gate lines to which scan pulses (or gate pulses) are supplied when the data lines intersect the data lines. The TFT array substrate TFTA and the color filter array substrate CFA are bonded through the sealant.

The panels 100A to 100F are display panels such as LCDs and OLEDs. In the following, an embodiment of the panel will be described centering on the LCD, but it should be noted that the panels 100A to 100F are not limited to the LCD panel. For example, signal wirings and TFTs may be formed in one substrate of the OLED panel, and color filters may be formed without forming signal wirings in the other substrate facing the OLED panel.

The TFT array substrate TFTA and the color filter array substrate CFA of the panels 100A to 100F intersect on the same plane. For example, as shown in FIG. 2, the lower plate of the large-screen display device is the first TFT array substrate TFTA and the first TFT array substrate TFTA of the first panel 100A when viewed from the cross section of the line “I-I ′”. The second color filter array substrate CFA of the second panel 100B adjacent to the right side of the third TFT array substrate TFTA of the third panel 100C adjacent to the right side of the second color filter array substrate CFA. ). As shown in FIG. 2, the upper plate of the large screen display device is the first color filter array substrate CFA and the first color filter array substrate CFA of the first panel 100A when viewed from a cross-section of the line “I-I ′”. The second TFT array substrate TFTA of the second panel 100B adjacent to the right side of the third color filter array substrate CFA of the third panel 100C adjacent to the right side of the second TFT array substrate TFTA. It includes. As shown in FIG. 3, the lower plate of the large-screen display device is formed of the first TFT array substrate TFTA of the first panel 100A and the first TFT array substrate TFTA when viewed from the cross section of the line “II-II ′”. The fourth color filter array substrate CFA of the neighboring fourth panel 100D is included below. As shown in FIG. 3, the upper plate of the large-screen display device includes a first color filter array substrate CFA and a first color filter array substrate CFA of the first panel 100A when viewed from a cross-section of the line “II-II ′”. The fourth TFT array substrate TFTA of the fourth panel 100D adjacent to each other is included below.

Each of the panels 100A-100F is cut at the location of the joint surface 30 that is joined to the neighboring panel. Here, the edge cut line of the TFT array substrate TFTA is located outside the edge cut line of the color filter array substrate CFA so that the signal lines of the TFT array substrate TFTA are exposed. Accordingly, the cut surfaces of the panels 100A to 100F form a stepped stepped surface in which the TFT array substrate TFTA protrudes outwardly than the color filter array substrate CFA.

Signal wires formed on the TFT array substrates TFTAs of the neighboring panels 100A to 100F face up and down on the bonding surface 30. The signal wires of the TFT array substrate TFTA located on the upper plate and the signal wires of the TFT array substrate TFTA located on the lower plate are 1: 1 bonded with an anisotropic conductive film (ACF) interposed therebetween. The anisotropic conductive film ACF bonds the TFT array substrates TFTA of the neighboring panels 100A to 100F and also electrically connects signal wirings of the TFT array substrates TFTA. Therefore, the signal wires formed in the TFT array substrate TFTA of the neighboring panels 100A to 100F are electrically connected to each other through the anisotropic conductive film ACF.

The width W of the joining surface 30 is preferably between 0.5 mm and 10 mm. If the width of the bonding surface 30 is less than 0.5mm, the workability is poor in the bonding process and the adhesion strength of the bonding surface falls, and if the width of the bonding surface 30 exceeds 10mm, the bonding surface 30 may be visually seen. .

The TFT array substrate TFTA of the upper plate and the TFT array substrate TFTA of the lower plate adjacent thereto are adhered to the anisotropic conductive film as described above, and the side and the color filter array of the adjacent TFT array substrate TFTA in the same plane. Side surfaces of the substrate CFA may be bonded with a sealant.

The panels 100A to 100F are aligned and bonded in a structure in which the stepped joining surfaces face each other, that is, in the form of joining. Therefore, the alignment and bonding process are easy due to the structure of joining the stepped surfaces in the process of bonding the panels 100A to 100F. Align marks may be formed on the stepped surface corresponding to the bonding surface in the neighboring panels 100A to 100F.

In order to mechanically reinforce the bonding surface, the tempered glass 40 may be adhered to the upper and / or lower plates of the large screen display device of the present invention using an adhesive or a sealant. Tempered glass 40 may be adhered to panels 100A-100F with a mirror. In the case of an OLED, when the TFT array substrate and the color filter array substrate of neighboring panels are arranged crosswise, luminance difference between neighboring panels may be seen. The mirror may compensate for luminance uniformity of the display panel by reflecting light reflected from the panel when there is a luminance deviation of the panels 100A to 100F. In other words, the reason for using the mirror is that when the OLED is selected as the panel, when the panels 100A to 100F are cross-bonded up and down, due to the light directivity characteristic of the OLED and the difference in transmittance between the front and rear directions of the panel The unevenness of brightness may occur for each panel across the entire screen. If the mirror is placed on the rear surface, the brightness of the entire screen is increased by utilizing both front and rear light emission, and the brightness uniformity is improved.

When the panels 100A to 100F are liquid crystal display panels, a plurality of backlight units 200 may be disposed under the lower panel of the large screen display device as shown in FIG. 4. The size of the backlight units 200 need not be the same as the panel size. The interface between the backlight units 200 is preferably a bonding surface position of the panels 100A to 100F such that the boundary lines between the backlight units are not visible on the display screen in the panel.

The data driving circuit and the gate driving circuit (or the scan driving circuit) for driving the signal wires are electrically connected to the panels 100A to 100F. The data driving circuit includes a plurality of source drive source drive integrated circuits (hereinafter referred to as "ICs") 10. Each of the source drive ICs 10 samples, latches, and converts the digital video data into data of a parallel data system under the control of a timing controller (not shown). Each of the source drive ICs 10 converts the digital video data of the parallel data system into an analog gamma compensation voltage using gamma reference voltages and supplies them to the data arrays. Each of the source drive ICs 10 is bonded to a TFT array substrate (TFTA) by a chip on glass (COG) process or a tape automated bonding (TAB) process, and output channels are connected to the data lines in a 1: 1 manner. The gate driving circuit includes a plurality of gate drive ICs 20. The gate drive ICs 20 sequentially supply scan pulses (or gate pulses) to the gate lines, including a shift register that sequentially shifts the gate driving voltage under the control of the timing controller. The gate drive ICs 20 are bonded to the TFT array substrate TFTA in a TAB process or directly formed on the TFT array substrate TFTA in a GIP (Gate In Panel) process so that the output channels are 1: 1 with the gate lines. Leads to. The data drive ICs 10 and the gate drive ICs 20 are separated from the ICs attached to unnecessary portions of the panel removed by the cutting process of each of the panels 100A to 100F. Therefore, ICs are connected to each of the panels in the bonding process of the panels 100A to 100F.

The large display device of the present invention further includes a signal redistribution circuit in addition to the driving circuits 10 and 20 described above. The signal redistribution circuit includes circuitry and software for distributing or reconstructing the TV or computer signal to match the pixel configuration of the laminated panels, in order to drive the tiled panels of the multiple panels to one TV or computer screen. The signal redistribution circuit distributes the reconstructed video signal data to the source drive ICs.

5 is an exploded perspective view showing a part of the LCD panel.

Referring to FIG. 5, the LCD panel includes a TFT array substrate TFTA, a color filter array substrate CFA, and a liquid crystal layer LC formed between the substrates.

The TFT array substrate TFTA includes signal wirings formed on the lower glass substrate GLSL, TFTs, a pixel electrode PXL, a storage capacitor (not shown) connected to the pixel electrode PXL, and the like. Signal lines include data lines and gate lines. The liquid crystal cells are driven by the voltage difference between the pixel electrode charging the data voltage through the TFT and the common electrode to which the common voltage is applied, thereby adjusting the transmission amount of light to display an image of the video data. The color filter array substrate CFA is formed of a black matrix BM, a color filter CF (R), CF (G), CF (B)) and an overcoat layer (OCL) formed on the upper glass substrate GLSU. The overcoat layer OCL is a transparent resin layer covering the black matrix BM and the color filters CF (R), CF (G), and CF (B). The color filter array substrate CFA is in contact with the liquid crystal layer LC. Planarizes the inner surface.

An alignment film for setting the pre-tilt angle of the liquid crystal is formed on the inner surface of the TFT array substrate TFTA and the inner surface of the color filter array substrate CFA, which are in contact with the liquid crystal layer LC. The common electrode COM is formed on the color filter array substrate CFA in a vertical electric field driving method such as twisted nematic (TN) mode and vertical alignment (VA) mode, as shown in FIG. 6, and an in plane switching (IPS) mode and an FFS. In the horizontal electric field driving method such as the (Fringe Field Switching) mode, the pixel electrode PXL is formed on the TFT array substrate TFTA. A polarizing plate is attached to each of the outer surface of the TFT array substrate and the outer surface of the color filter array substrate.

FIG. 6 is a cross-sectional view illustrating in detail the structure of the TFT array substrate TFTA shown in FIG. 5. In FIG. 6, the alignment film and the polarizing plate formed on the TFT array substrate TFTA and the color filter array substrate CFA are omitted.

5 and 6, a gate electrode GE of a TFT made of a gate metal, a gate line GL connected to the gate electrode GE, and an end of the gate line GL on the lower glass substrate GLSL. Gate metal patterns including connected gate pads GP are formed. The output pin of the gate drive IC is connected to the gate pad GP. The gate metal may comprise aluminum or an aluminum alloy. The gate insulating layer GI is an inorganic insulating material such as silicon oxide (SiOx) or silicon nitride (SiNx), and is formed on the lower glass substrate GLSL to cover the gate metal pattern.

A semiconductor pattern including an active layer SEM and an ohmic contact layer OHM is formed on the gate insulating layer GI. In the TFT, the semiconductor pattern overlaps the gate electrode GE. Source / drain metal patterns overlap the semiconductor pattern. The source / drain metal patterns include a source electrode SE and a drain electrode DE of the TFT, a data line DL connected to the source electrode of the TFT, and a data pad DP at an end of the data line DL. . The output pin of the source drive IC is connected to the data pad DP. The source / drain metal includes any one of metals such as molybdenum (Mo), chromium (Cr), copper (Cu) and alloys thereof.

The passivation layer PASSI includes contact holes exposing a part of the drain electrode of the TFT, a part of the data pad DP, and a part of the gate pad GP, and is formed on the lower glass substrate GLSL to cover the TFT and the signal wirings. . The contact hole for exposing the gate pad GP passes through the passivation layer PASSI and the gate insulating layer GI to expose the gate pad GP. The protective film material includes an inorganic insulating material such as a gate insulating material or an organic insulating material such as acrylic. The pixel electrode PXL is connected to the drain electrode DE of the TFT through the contact hole CTH penetrating the passivation film PASSI. The data pad protection electrode (not shown) is connected to the data pad DP through a contact hole (not shown) passing through the passivation layer PASSI. The gate pad protection electrode (not shown) is connected to the gate pad DP through a contact hole (not shown) passing through the passivation layer PASSI. The pixel electrode PXL, the data pad protection electrode, and the gate pad protection electrode include indium tin oxide (ITO), tin oxide (TO), indium zinc oxide (IZO), and indium tin. It is formed of a transparent conductive material such as indium tin zinc oxide (ITZO).

7 is a plan view showing cut lines of panels 100A to 100F.

Referring to FIG. 7, each of the panels 100A to 100F has a line "A-A '" and / or a laser or diamond cutter in a state where the TFT array substrate TFTA and the color filter array substrate CFA are bonded by sealant. Or is cut along the line "B-B '". Here, the TFT array substrate TFTA is larger than the color filter array substrate CFA in the cutting process so that the signal lines DL and GL are exposed. Each of the panels 100A to 100F has a separate sealant applied to the panel cut surface in the sealant reapplication process so as to prevent leakage of liquid crystal from the stepped cut surface, and the sealant applied to the cut surface in the sealant curing process is cured.

Cut lines "A-A '" and / or lines "B-B'" should be cut in units of one bank of ICs 10 and 20 to prevent loss of data. In other words, data lines or gate lines connected to the output channels of the IC are not cut in the cutting process.

The unit panels 100A to 100F are subjected to a cutting process, a sealant reapplication process, and a sealant curing process to complete the panel cutting surface rework, so that the signal wirings DL and GL of the TFT array substrate TFTA are exposed at the cutting surface. An etching process is performed to remove the thin film layer. In the etching process, the passivation layer PASSI is wet / dry etched in the data line region exposed at the cutting surface to expose the data line DL formed on the TFT array substrate TFTA at the cutting surface. In addition, in the etching process, a passivation layer PASSI, a source / drain metal, a gate insulating layer GI, and the like are exposed in the gate line region exposed at the cutting surface to expose the gate line GL formed on the TFT array substrate TFTA at the cutting surface. Wet / dry etch.

8 is a perspective view illustrating a signal wiring connection between the panels 100A to 100F in the bonding surface 30.

Referring to FIG. 8, the panel bonding process of the present invention aligns the anisotropic conductive film ACF on the signal lines DL and GL exposed to the TFT array substrate TFTA of the first panel 100A.

Subsequently, in the panel bonding process of the present invention, the signal wirings DL and GL exposed on the bonding surface 30 of the TFT array substrate TFTA of the first panel 100A and the TFT array of the second panel 100B are exposed. The second panel 100B is turned upside down so that the signal lines DL and GL exposed at the bonding surface 30 of the substrate TFTA face each other, and the bonding surface 30 of the second panel 100B is turned over to the first panel. It is aligned with the joining surface 30 of 100A. In this bonding process, the neighboring panels 100A to 100F are electrically connected to signal wires DL and GL at the same time as the bonding.

Subsequently, the panel bonding process of the present invention uses TAB bonding equipment to bond the substrates facing each other at the same time while applying heat and pressure to the bonding surfaces between the panels 100A and 100B in a suitable manner. In this case, in order to improve low heat transfer characteristics of the glass substrate, an infrared light source such as a halogen lamp or a near infrared lamp may be irradiated to the bonding surface.

Instead of an anisotropic conductive film (ACF), conductive balls may be used to electrically connect the signal wiring of the panels. In this case, the etching process performs etching to partially expose the signal wires without etching the insulating film over the entire bonding surface and aligns the conductive balls with the etched portions.

In order to improve the signal transfer characteristics, the ICs 10 and 20 are further bonded to the panel separately from the ICs 10 and 20 that have been projected on each of the panels, thereby providing ICs on both sides of the large-screen display as shown in FIG. 10 and 20 may be connected.

On the other hand, the polarizing plate may be cut to leave only the required size before cutting the panel to proceed to the subsequent process, and may be attached to the tempered glass 40 after removing the polarizing plate before the cutting process.

10, 20: IC 30: junction surface
40: tempered glass 100A ~ 100B: panel of display device

Claims (6)

A plurality of panels each including a TFT array substrate including signal wiring lines and a color filter array substrate including color filters and bonded to each other through a stepped bonding surface;
A plurality of ICs connected to the panels to drive the signal wires; And
A signal redistribution circuit for distributing an input video signal to match the pixel configuration of the laminated panels;
Each of the bonding surfaces of the panels is formed as a step surface such that the TFT array substrate protrudes from the color filter array substrate.
And a TFT array substrate and a color filter array substrate of neighboring panels are alternately arranged on the same plane.
The method of claim 1,
The panels,
A large screen display using tiling technology, characterized in that it comprises a display panel of any one of LCD and OLED.
The method of claim 1,
The panels,
A first panel including a first TFT array substrate and a first color filter array substrate; And
A second panel including a second TFT array substrate and a second color filter array substrate;
The first TFT array substrate and the second color filter array substrate are arranged on the same plane, the first color filter array substrate and the second TFT array substrate are arranged on the same plane,
Signal wirings of the first TFT array substrate at the bonding surface are electrically connected to each other by joining the signal wirings of the second TFT array substrate inverted through one of the anisotropic conductive film and the conductive ball, and bonding the same.
The width of the bonding surface is a large screen display device using a tiling technology, characterized in that between 0.5mm ~ 10mm.
The method of claim 1,
Tempered glass bonded to the panels to reinforce the mechanical strength of the panels; And
Further comprising a plurality of backlight unit for irradiating light to the panels,
The tempered glass is a large display device using a tiling technology, characterized in that the tempered glass is used alone or a tempered glass including a mirror is used.
Cutting a plurality of panels each including a TFT array substrate including signal wirings, a color filter array substrate including color filters, and a plurality of ICs driving the signal wirings to form stepped cut surfaces on the sides of the panels; And
Bonding the stepped cut surfaces of the panels to face each other to bond neighboring panels and to electrically connect signal wirings of the neighboring panels;
Each of the bonding surfaces of the panels is formed as a step surface such that the TFT array substrate protrudes from the color filter array substrate.
And the TFT array substrate and the color filter array substrate of the neighboring panels are alternately arranged on the same plane.
The method of claim 1,
The panels,
A first panel including a first TFT array substrate and a first color filter array substrate; And
A second panel including a second TFT array substrate and a second color filter array substrate;
The first TFT array substrate and the second color filter array substrate are arranged on the same plane, the first color filter array substrate and the second TFT array substrate are arranged on the same plane,
Signal wirings of the first TFT array substrate at the bonding surface are electrically connected to signal wires of the second TFT array substrate which are inverted through any one of an anisotropic conductive film and a conductive ball. Method of manufacturing a large screen display device.

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