KR20090095913A - Organic Light Emitting Diode Display And Driving Method Thereof - Google Patents

Abstract

An organic light emitting diode display and a driving method thereof are provided to prevent non-uniform brightness by increasing the sensing accuracy of a threshold voltage of a driving TFT through a simple scheme. In an organic light emitting diode display and a driving method thereof, an anode electrode of an organic light-emitting diode is connected to a high potential drive voltage source(VDD). A cathode electrode is commonly connected with a drain electrode(D) and a threshold voltage compensating circuit(130) of the drive TFT(DR). A gate electrode(G) of the drive TFT is connected to the compensating threshold voltage circuit via the first node(n1).

Description

Organic Light Emitting Diode Display And Driving Method Thereof}

The present invention relates to an organic light emitting diode display, and more particularly, to an organic light emitting diode display and a method of driving the same, which compensate for a difference in threshold voltage of a driving TFT between pixels.

Recently, various flat panel displays (FPDs) that can reduce weight and volume, which are disadvantages of cathode ray tubes, have been developed. Such flat panel displays include liquid crystal displays (hereinafter referred to as "LCDs"), field emission displays (FEDs), plasma display panels (hereinafter referred to as "PDPs") and electric fields. Light emitting devices; and the like.

PDP is attracting attention as a display device that is light and small and is most advantageous for large screen because of its simple structure and manufacturing process. However, PDP has low light emission efficiency, low luminance and high power consumption. TFT LCDs with thin film transistors (hereinafter referred to as "TFTs") as switching devices are the most widely used flat panel display devices, but they have a narrow viewing angle and low response speed because they are non-light emitting devices. In contrast, electroluminescent devices are classified into inorganic light emitting diode display devices and organic light emitting diode display devices depending on the material of the light emitting layer. In particular, organic light emitting diode display devices use self-light emitting devices that emit light, and thus, the response speed is high and the light emitting efficiency, There is a great advantage in brightness and viewing angle.

The organic light emitting diode display device has an organic light emitting diode as shown in FIG. 1. The organic light emitting diode includes an organic compound layer (HIL, HTL, EML, ETL, EIL) formed between the anode electrode and the cathode electrode.

The organic compound layer includes a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL) and an electron injection layer (Electron Injection layer, EIL).

When a driving voltage is applied to the anode electrode and the cathode electrode, holes passing through the hole transport layer HTL and electrons passing through the electron transport layer ETL move to the emission layer EML to form excitons, and as a result, the emission layer EML becomes Visible light is generated.

The organic light emitting diode display arranges the pixels including the organic light emitting diode in a matrix form and controls the brightness of the pixels selected by the scan pulse according to the gray level of the digital video data.

Such an organic light emitting diode display is divided into a passive matrix method and an active matrix method using a TFT as a switching element.

Among these, the active matrix method selectively turns on the active TFT, selects a pixel, and maintains light emission of the pixel with a voltage maintained in a storage capacitor.

2 is an equivalent circuit diagram of one pixel in an active matrix organic light emitting diode display.

Referring to FIG. 2, a pixel of an organic light emitting diode display of an active matrix type includes an organic light emitting diode OLED, a data line DL and a gate line GL, a switch TFT SW, and a driving TFT DR that cross each other. ), And a storage capacitor Cst. The switch TFT (SW) and the driving TFT (DR) are implemented with an N-type MOS-FET.

The switch TFT SW is turned on in response to a scan pulse from the gate line GL to conduct a current path between its source electrode and drain electrode. During the on-time period of the switch TFT SW, the data voltage from the data line DL is applied to the gate electrode and the storage capacitor Cst of the driving TFT DR via the source electrode and the drain electrode of the switch TFT SW. Is approved.

The driving TFT DR controls the current flowing through the organic light emitting diode OLED according to the difference voltage Vgs between its gate electrode and the source electrode.

The storage capacitor Cst stores the data voltage applied to one electrode of the storage capacitor Cst, thereby keeping the voltage supplied to the gate electrode of the driving TFT DR constant for one frame period.

The organic light emitting diode OLED is implemented in the structure shown in FIG. 1. The organic light emitting diode OLED is connected between the source electrode of the driving TFT DR and the low potential driving voltage source VSS.

The brightness of the pixel as shown in FIG. 2 is proportional to the current flowing in the organic light emitting diode OLED as shown in Equation 1 below, and the current is the difference between the gate voltage and the source voltage of the driving TFT DR, and the driving TFT DR. Is determined by the threshold voltage and the data voltage.

Here, 'Vgs' is the difference voltage between the gate voltage Vg and the source voltage Vs of the driving TFT DR, 'Vdata' is the data voltage, 'Gnd' is the base voltage, 'Ioled' is the driving current, and 'Vth' Is a threshold voltage of the driving TFT DR, and k is a constant value determined by mobility and parasitic capacitance of the driving TFT DR, respectively.

As shown in Equation 1, the current Ioled of the organic light emitting diode OLED is greatly influenced by the threshold voltage Vth of the driving TFT DR.

In general, when a gate voltage having the same polarity is applied to the gate electrode of the driving TFT DR for a long time, the gate-bias stress increases, thereby increasing the threshold voltage Vth of the driving TFT DR. This causes the operating characteristics of the driving TFT DR to vary. The change in operating characteristics of the driving TFT DR can also be seen in the experimental results of FIG. 3.

FIG. 3 shows a positive gate-bias stress applied to a hydrogenated amorphous silicon TFT (A-Si: H TFT) for a sample having a channel width / channel length (W / L) of 120 μm / 6 μm. It is an experimental result showing that the characteristic change of the A-Si: H TFT for a sample is brought about. In Fig. 3, the horizontal axis represents the gate voltage [V] of the sample A-Si: H TFT, and the vertical axis represents the current [A] between the source electrode and the drain electrode of the sample A-Si: H TFT.

3 shows the shift of the threshold voltage and the transfer characteristic curve of the TFT according to the voltage application time when a voltage of +30 V is applied to the gate electrode of the sample A-Si: H TFT. As can be seen in FIG. 3, as the time for applying the positive voltage to the gate electrode of the A-Si: H TFT increases, the transfer characteristic curve of the TFT shifts to the right, and the threshold voltage of the A-Si: H TFT increases. do. (Threshold voltage rises from Vth ₁ to Vth ₄ )

The difference in the degree of increase of the threshold voltage of the driving TFT leads to the difference in deterioration of the driving TFT between the pixels, resulting in non-uniformity of luminance between the pixels. In other words, when the pixels are driven with data voltages having different magnitudes for a certain period of time, the driving TFTs of the pixels to which the relatively large data voltages are applied cumulatively are the driving TFTs of the pixels to which the relatively small data voltages are accumulated. Compared to the deterioration degree, the luminance of the pixels for the same data voltage is changed due to the difference in the amount of current flowing through the organic light emitting diode.

In order to solve this non-uniformity, the voltage drive compensation method of compensating the difference in the threshold voltage of the driving TFT between the pixels by setting the gate voltage of the driving TFT to the threshold voltage of the driving TFT using the discharge method through the diode connection of the conventional driving TFT. And a current driving compensation method for compensating for the threshold voltage difference between the driving TFTs between pixels by using a source type or a sink type current as an input signal.

However, the conventional voltage drive compensation method has a limitation in increasing yield and mass productivity by requiring a large number of switch TFTs and complex control signals, and only one part of the horizontal period (less than about 50%) is used as a programming period for compensation. There is a limitation in accurately sensing the threshold voltage of the driving TFT. In addition, the conventional current driving compensation method has the advantage of compensating not only the difference in the threshold voltage of the driving TFT between the pixels but also the difference in mobility, but due to the influence of the parasitic resistance and capacitance of the data line, more data is obtained especially at low grayscale. By requiring the charging time of the line, there is a limit in obtaining a desired compensation value even if the programming period for compensation is used for one full horizontal period. The limitations of the conventional voltage and current driving compensation method are greater in the large-area, high-resolution organic light emitting diode display device, which has recently been mass-produced, and as a result, it is difficult to completely compensate for the luminance non-uniformity between pixels. Will give birth to. This is because the temporal length of one horizontal period becomes shorter as the organic light emitting diode display becomes larger and larger in size.

Accordingly, an object of the present invention is to increase the accuracy of sensing the threshold voltage of the driving TFT through a simple compensation scheme, and to compensate for the difference in the threshold voltage of the driving TFT between the pixels based on the simple compensation scheme to prevent luminance unevenness. An organic light emitting diode display and a driving method thereof are provided.

In order to achieve the above object, the organic light emitting diode display device according to an embodiment of the present invention includes a high potential driving voltage source for generating a high potential driving voltage; A base voltage source for generating a base voltage; A plurality of data lines supplied with a data voltage higher than the high potential driving voltage; A plurality of gate line pairs each including a first gate line supplied with a first scan pulse, and a second gate line supplied with a second scan pulse generated out of phase with the first scan pulse; An organic light emitting diode emitting light by a current flowing between the high potential driving voltage source and the low potential driving voltage source; A driving element controlling a current flowing through the organic light emitting diode according to a gate-source voltage Vgs applied between a gate electrode connected to a first node and a source electrode connected to a second node; And in response to the first and second scan pulses, initialize the potential of the first node to the data voltage during the first period and subtract the potential of the second node from the data voltage to the value at which the threshold voltage of the driving element is subtracted. After initialization, the gray level voltage to implement the potential of the first node and the threshold voltage of the driving element are summed in conjunction with the potential of the second node falling to the base voltage level during the second period following the first period. Threshold voltage compensation circuit for scaling down to the compensation voltage.

The first scan pulse is generated at a high logic voltage and the second scan pulse is generated at a low logic voltage during the first period; During the second period, the first scan pulse is inverted to a low logic voltage and the second scan pulse is inverted to a high logic voltage.

The threshold voltage compensation circuit is turned on in response to the first scan pulse, thereby initializing the potential of the first node to the data voltage during the first period and the potential of the second node to the data voltage at the data voltage. First and second switch elements for initializing a threshold voltage to a subtracted value; A third switch element that is turned on in response to the second scan pulse to drop the potential of the second node to the base voltage level during the second period; And a first scale down to a compensation voltage including a gray voltage to implement the potential of the first node and a threshold voltage of the driving element in association with the potential of the second node falling to the base voltage level during the second period. And a second storage capacitor.

The first switch element may include a gate electrode connected to the first gate line, a drain electrode connected to the first node, a source electrode commonly connected to the cathode electrode of the organic light emitting diode and the drain electrode of the driving device. have; The second switch element has a gate electrode connected to the first gate line, a drain electrode connected to the data line, and a source electrode connected to the first node; The third switch element has a gate electrode connected to the second gate line, a drain electrode connected to the second node, and a source electrode connected to the ground voltage source; The first storage capacitor has one electrode connected to the second node and the other electrode connected to the first node; The second storage capacitor has one electrode connected to the first node and the other electrode connected to the base voltage source.

The data voltage Vdata initialized to the first node during the first period is as follows.

Here, Vdd denotes the high potential driving voltage, Vto denotes the threshold voltage of the organic light emitting diode, Vd denotes the gray scale voltage to be implemented, and α denotes a proportional constant.

The compensation voltage Vc that is scaled down during the second period and charged in the first node is represented by the following equation.

Here, C1 denotes the capacitance of the first storage capacitor, C2 denotes the capacitance of the second storage capacitor, and Vth denotes the threshold voltage of the driving element.

The driving current Ioled flowing through the organic light emitting diode during the second period is expressed by the following equation.

Here, Vgs denotes a difference voltage between the gate voltage and the source voltage of the driving element, and k denotes a constant value determined by mobility and parasitic capacitance of the driving element, respectively.

In order to achieve the above object, according to an embodiment of the present invention, a plurality of gate lines including a high potential driving voltage source, a base voltage source, a plurality of data lines, and first and second gate lines supplied with scan pulses of opposite phases to each other. A pair, an organic light emitting diode emitting light by a current flowing between the high potential driving voltage source and the low potential driving voltage source, a gate-source voltage applied between a gate electrode connected to a first node and a source electrode connected to a second node An organic light emitting diode display having a driving element for controlling a current flowing through the organic light emitting diode according to Vgs and a threshold voltage compensating circuit for scaling down the potential of the first node in response to a potential change of the second node The driving method may further include generating a potential of the first node at the high potential driving voltage during a first period in response to the first and second scan pulses. The step of initialization and to the high data voltage than the high potential driving voltage initialized to the threshold voltage of the drive element subtracted value to the potential of the second node in the data voltage; The gray level voltage to implement the potential of the first node in conjunction with the potential of the second node which is connected to the base voltage source and falls to the base voltage level during the second period subsequent to the first period is summed. Scaling down to a compensation voltage; And controlling the driving current flowing through the organic light emitting diode by using the first and second node potentials set to the compensation voltage and the base voltage, respectively, during the second period, to emit the organic light emitting diode. .

The organic light emitting diode display and the driving method thereof according to the present invention increase the accuracy of sensing the threshold voltage of the driving TFT through a simple compensation scheme, and based on the difference, the threshold voltage difference between the driving TFTs between the pixels is increased. By compensating, the luminance unevenness can be prevented.

Furthermore, the organic light emitting diode display and the driving method thereof according to the present invention perform programming by using a data voltage of a level higher than the high potential driving voltage, thereby applying a reverse bias to the organic light emitting diode during the programming period, thereby providing an organic light emitting diode. In this case, the threshold voltage of the driving TFT can be sensed more quickly, and the range of data voltages between the set gray levels can be widened. Thus, it is easy to overcome the difficulty of implementing gray scales due to the high efficiency of the organic light emitting diode.

Furthermore, the organic light emitting diode display and the driving method thereof according to the present invention can further increase the accuracy of the threshold voltage sensing of the driving TFT by using the entire one horizontal period as the programming period.

Other objects and features of the present invention in addition to the above object will be apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 4 to 9.

4 is a block diagram illustrating an organic light emitting diode display according to an exemplary embodiment of the present invention, and FIG. 5 is a timing diagram of scan pulse pairs S1 and S2 and data voltage Vdata supplied to the pixel 122.

4 and 5, an organic light emitting diode display according to an exemplary embodiment of the present invention includes a display panel 116 in which m × n pixels 122 are formed and data lines D1 to Dm. The first scan pulse S1 is applied to the data driving circuit 120 for supplying the analog data voltage, and to the first gate lines G11 to G1n and the second gate lines G21 to G2n constituting the gate line pairs, respectively. And a gate controller 118 that sequentially supplies the second scan pulse S2, and a timing controller 124 that controls driving timing of the data driver circuit 120 and the gate driver circuit 118.

The display panel 116 is formed at intersections of the gate line pairs G11G21, G12G22,..., G1nG2n and the data lines D1 to Dm where the first and second gate lines correspond one-to-one. Pixels 122. In the display panel 116, signal lines a for supplying the high potential driving voltage Vdd and pixel lines b for supplying the base voltage Gnd are formed in the respective pixels 122. The high potential drive voltage Vdd is generated by the high potential drive voltage source VDD, and the base voltage Gnd is generated by the base voltage source GND.

The data driving circuit 120 converts the digital video data RGB into an analog data voltage (hereinafter referred to as a data voltage) in response to the data control signal DDC from the timing controller 124 and then the data lines D1. To Dm). This data voltage has a value higher than the level of the high potential driving voltage Vdd and is supplied to the pixels 122 via the data lines D1 to Dm.

In response to the gate control signal GDC from the timing controller 124, the gate driving circuit 118 receives the scan pulse pairs S1 and S2 as shown in FIG. 5 and the gate line pairs G11G21, G12G22, ... G1nG2n. Feed sequentially. The first scan pulse S1 of the scan pulse pairs S1 and S2 is supplied to the pixels 122 via the first gate lines G11 to G1n, and the second scan pulse S2 is the second. The pixels 122 are supplied to the pixels 122 via the gate lines G21 to G2n.

The timing controller 124 supplies the digital video data RGB from the outside to the data driving circuit 120 and uses the vertical / horizontal synchronization signal H.Vsync and the clock signal CLK to control the gate driving circuit 118. ) And control signals DDC and GDC for controlling the operation timing of the data driving circuit 120.

In the timing diagram of FIG. 5, T1 indicates a programming period, and T2 indicates a threshold voltage compensation and a light emission period.

The programming period T1 initializes the gate voltage Vg of the driving TFT formed in the pixel 122 to the data voltage Vdata having a value greater than the high potential driving voltage Vdd, and the source voltage Vs of the driving TFT. ) Is a period in which the threshold voltage Vth of the driving TFT is initialized to the subtracted data voltage Vdata-Vth. The programming period T1 is defined as the high logical section of the first scan pulse S1 and the low logical section of the second scan pulse S2.

The threshold voltage compensation and light emission period T2 drops the source voltage of the driving TFT from the data voltage Vdata-Vth, from which the threshold voltage Vth of the driving TFT is subtracted, to the base voltage Gnd level, thereby reducing the gate voltage of the driving TFT. Is scaled down to the compensation voltage Vc obtained by adding the threshold voltage Vth of the driving TFT to the actual gray voltage Vd, and then the organic light emitting diode is emitted using the compensation voltage Vc. It indicates the period to let. The threshold voltage compensation and the light emission period T2 are defined as the low logic section of the first scan pulse S1 and the high logic section of the second scan pulse S2.

The operation of the pixels 122 in the programming period T1 and the threshold voltage compensation and emission period T2 will be described in detail with reference to FIGS. 7A and 7B.

Each of the pixels 122 includes an organic light emitting diode OLED, a driving TFT DR, three switch TFTs SW1 to SW3, and two storage capacitors Cst1 and Cst2 as shown in FIG. 6.

6 is an equivalent circuit diagram illustrating the [j, k] -th pixel 122 included in the organic light emitting diode display according to the exemplary embodiment of the present invention.

Referring to FIG. 6, a pixel 122 according to an exemplary embodiment of the present invention may drive an organic light emitting diode OLED formed at an intersection region of a k-th data line Dk and a j-th gate line pair Gj1 and Gj2. TFT (DR) and threshold voltage compensation circuit 130 is provided.

The anode electrode of the organic light emitting diode OLED is connected to the high potential driving voltage source VDD, and the cathode electrode is commonly connected to the drain electrode D and the threshold voltage compensation circuit 130 of the driving TFT DR. The organic light emitting diode OLED has a structure as shown in FIG. 1 and emits light by a driving current controlled by the driving TFT DR.

The gate electrode G of the driving TFT DR is connected to the threshold voltage compensation circuit 130 via the first node n1, and the drain electrode D of the driving TFT DR is the threshold voltage compensation circuit 130. ) And a cathode of the organic light emitting diode OLED are commonly connected, and the source electrode S of the driving TFT DR is connected to the threshold voltage compensation circuit 130 via the second node n2. The driving TFT DR controls the amount of current flowing through the organic light emitting diode OLED according to the difference voltage Vgs between the gate voltage applied to its gate electrode G and the source voltage applied to its source electrode S. do. Here, the driving TFT DR is implemented as an N-type electron metal oxide semiconductor field effect transistor (MOSFET). The semiconductor layer of the driving TFT DR includes an amorphous silicon layer.

The threshold voltage compensation circuit 130 includes first to third switch TFTs SW1 to SW3 and first and second storage capacitors Cst1 and Cst2. The threshold voltage compensation circuit 130 sets the potential Vn1 of the first node n1 in response to the scan pulse pairs S1 and S2 supplied to the j-th gate line pair Gj1 and Gj2. The voltage Vdata of the second node n2 is initialized to a data voltage Vdata larger than the (Vdd) level and the threshold voltage Vth of the driving TFT DR is subtracted to the data voltage Vdata-Vth. After initialization, the potential Vn2 of the second node n2 is dropped to the ground voltage Gnd level, so that the potential Vn1 of the first node n1 is set to the actual gray voltage Vd of the driving TFT DR. The threshold voltage Vth serves to scale down to the sum of the compensation voltages Vc.

To this end, the gate electrode G of the first switch TFT SW1 is connected to the first gate line Gj1 of the j-th gate line pair Gj1 and Gj2, and the drain electrode of the first switch TFT SW1. D) is connected to the second node n2, and the source electrode S of the first switch TFT SW1 is common to the cathode electrode of the organic light emitting diode OLED and the drain electrode D of the driving TFT DR. Connected. The gate electrode G of the second switch TFT SW2 is connected to the first gate line Gj1 of the j-th gate line pair Gj1 and Gj2, and the drain electrode D of the second switch TFT SW2. ) Is connected to the k-th data line Dk, and the source electrode S of the second switch TFT SW2 is connected to the first node n1. The first and second switch TFTs SW1 and SW2 are simultaneously turned on in response to the first scan pulse S1, so that the potential Vn1 of the first node n1 is greater than the high potential driving voltage Vdd level. In addition to initializing the data voltage Vdata, the potential Vn2 of the second node n2 is subtracted from the data voltage Vdata to a value Vdata-Vth subtracted from the threshold voltage Vth of the driving TFT DR. Initialize

The gate electrode G of the third switch TFT SW3 is connected to the second gate line Gj2 of the j-th gate line pair Gj1 and Gj2, and the drain electrode D of the third switch TFT SW3 is It is connected to the second node n2, and the source electrode S of the third switch TFT SW3 is connected to the ground voltage source GND. The third switch TFT SW3 is turned on in response to the second scan pulse S2, thereby lowering the potential of the second node n2 to the ground voltage Gnd level.

The first storage capacitor Cst1 is coupled between the second node n2 and the first node n1 with one electrode connected to the second node n2 and the other electrode connected to the first node n1. . In addition, the second storage capacitor Cst2 is coupled between the second node n2 and the first node n1 by connecting one electrode to the first node n1 and the other electrode to the base voltage source GND. do. The first and second storage capacitors Cst1 and Cst2 interlock with the potential Vn1 of the first node n1 in association with the potential Vn2 of the second node n2 that is downwardly changed to the base voltage Gnd level. Scale-down is performed from the previously stored data voltage Vdata to the compensation voltage Vc in which the threshold voltage Vth of the driving TFT DR is added to the actual gray voltage Vd.

The operation of the pixel 122 will now be described step by step with reference to FIGS. 7A and 7B.

FIG. 7B is an equivalent circuit diagram of the pixel 122 for the programming period T1 of FIG. 5.

Referring to FIG. 7B, during the programming period T1, the first scan pulse S1 is generated at a high logic voltage to turn on the first and second switch TFTs SW1 and SW2, and the second scan pulse S2. Is generated with a low logic voltage to turn off the third switch TFT (SW3).

Accordingly, the potential Vn1 of the first node n1 is initialized to the data voltage Vdata as shown in Equation 2 below.

Here, Vdd denotes a high potential driving voltage, Vto denotes a threshold voltage of an organic light emitting diode OLED, Vd denotes an actual gray scale voltage, and α denotes a proportional constant.

The potential Vn2 of the second node n2 is a threshold voltage of the driving TFT DR by a current path formed between the first and second nodes n1 and n2 via the diode-connected driving TFT DR. (Vth) is initialized to the subtracted data voltage (Vdata-Vth). Through this initialization process, the threshold voltage Vth of the driving TFT DR is sensed.

As such, the reason for performing programming using a very high level of the data voltage Vdata is to initialize the organic light emitting diode OLED by applying a reverse bias to the organic light emitting diode OLED during the programming period T1. In addition, the threshold voltage of the driving TFT DR is sufficiently charged by charging the first and second nodes n1 and n2 to a desired voltage level within a limited time in response to the reduction of one horizontal period 1H according to the large screen and the high resolution trend. To sense (Vth) quickly and accurately. In particular, in the present invention, the accuracy of sensing the threshold voltage Vth of the driving TFT DR by using the entire first horizontal period 1H where the first scan pulse S1 is maintained at the high logic voltage as the programming period T1. Can be further increased. On the other hand, the efficiency of the organic light emitting diode OLED is a ratio of display luminance to the applied driving current, and the driving current has a value proportional to the applied data voltage. The magnitude of the data voltage at and the range of the data voltage between gray levels decrease. The narrower the range of data voltages between grayscales, the finer the data voltages for grayscale implementation, but this is not an easy task. However, when programming using a very high level of the data voltage (Vdata) as in the present invention, the range of data voltage between the set gradation can be widened, the difficulty of implementing gradation according to the high efficiency of the organic light emitting diode (OLED) It can also be solved.

FIG. 7B is an equivalent circuit diagram of the pixel 122 for the threshold voltage compensation and emission period T2 of FIG. 5.

Referring to FIG. 7B, during the threshold voltage compensation and emission period T2, the first scan pulse S1 is inverted to a low logic voltage to turn off the first and second switch TFTs SW1 and SW2 and to perform a second scan. The pulse S2 is inverted by the high logic voltage to turn on the third switch TFT SW3.

Accordingly, the potential Vn2 of the second node n2 drops to the base voltage Gnd level, and as a result, the potential Vn1 of the first node n1 becomes the first and second storage capacitors Cst1 and Cst2. According to the partial pressure ratio of), it is changed as shown in Equation 3 below.

Here, C1 denotes the capacitance of the first storage capacitor Cst1, C2 denotes the capacitance of the second storage capacitor Cst2, and Vth denotes the threshold voltage of the driving TFT DR.

At this time, if C1 has a value larger than C2, the potential Vn1 of the first node n1 is expressed by Equation 4 below.

Referring to Equation 4, the potential Vn1 of the first node n1 is scaled down from the data voltage Vdata by setting an appropriate capacitance of the first and second storage capacitors Cst1 and Cst2. Dowm), the threshold voltage Vth of the driving TFT DR is set to the compensation voltage Vc, which is added to the actual gray voltage Vd.

The potential Vn1 of the first node n1 is equal to the gate voltage of the driving TFT DR, and the potential Vn2 of the second node n2 is equal to the source voltage of the driving TFT DR. The driving current Ioled flowing through the diode OLED is expressed by Equation 5 below.

Here, Vgs denotes a difference voltage between the gate voltage and the source voltage of the driving TFT DR, and k denotes a constant value determined by the mobility and parasitic capacitance of the driving TFT DR, respectively.

Since the function of Equation 5 does not include the threshold voltage Vth factor of the driving TFT DR, the driving current Ioled flowing through the organic light emitting diode OLED is changed in the threshold voltage Vth of the driving TFT DR. It is hardly affected. Accordingly, the luminance unevenness caused by the difference in the threshold voltage Vth change of the driving TFT DR between the pixels is minimized.

8 illustrates the first and second node potentials Vn1 and Vn2 during the programming period T1 and the threshold voltage compensation and emission period T2 according to the difference in the threshold voltage Vth of the inter-pixel driving TFT DR. The simulation results show the change. In FIG. 8, the horizontal axis represents driving time s, and the vertical axis represents voltage V. In FIG. 9 shows the amount of driving current flowing in the organic light emitting diode OLED in the programming period T1 and the threshold voltage compensation and emission period T2 according to the difference in the threshold voltage Vth of the inter-pixel driving TFT DR. The simulation results are also shown. In FIG. 9, the horizontal axis represents driving time s, and the vertical axis represents current A. In FIG.

Here, as a simulation condition, the threshold voltage Vth1 of the first driving TFT DR1 formed in the first pixel is 1.7 V, and the threshold voltage Vth2 of the second driving TFT DR2 formed in the second pixel is 2.7 V. The first and second driving TFTs DR1 and DR2 are supplied with the same data voltage.

Referring to FIG. 8, the first node potential Vn1, which is the gate voltage of the first driving TFT DR1 and the second driving TFT DR2, is 3.4 V and 4.2 V, respectively, during the threshold voltage compensation and light emission period T2. There is a slight difference. The reason for this difference is that the threshold voltage Vth2 of the second driving TFT DR2 is shifted by 58% compared to the threshold voltage Vth1 of the first driving TFT DR1. Accordingly, the current Ioled flowing in the organic light emitting diode OLED is 397.84 mA in the first pixel having the first driving TFT DR1 and 378.86 in the second pixel having the second driving TFT DR2 as shown in FIG. 9. As can be seen, a difference of about 5% occurs between the two. This 5% difference is negligible in terms of current retention to ensure uniformity in brightness. In the prior art in which the threshold voltage compensation circuit is not applied, even if the threshold voltage of the driving TFT between pixels differs by only 25%, the pixel having the driving TFT having a high threshold voltage is 70 compared with the pixel having the driving TFT having a low threshold voltage. This is because the current retention rate is lower than%.

Meanwhile, in the present invention, although the driving current Ioled should not be influenced at all by the change in the threshold voltage Vth of the driving TFT DR, the reason why the driving current Ioled is small as shown in FIG. This is because the function formula includes 'k' which is determined by the mobility and parasitic capacitance of the driving TFT DR. That is, the current Ioled flowing through the organic light emitting diode OLED cannot be completely free from the influence of the mobility variation of the inter-pixel driving TFT DR.

As described above, the organic light emitting diode display and the driving method thereof according to the present invention increase the accuracy of sensing the threshold voltage of the driving TFT through a simple compensation scheme, and based on the driving TFT between pixels. By compensating for the difference in threshold voltages, the luminance unevenness can be prevented.

Furthermore, the organic light emitting diode display and the driving method thereof according to the present invention perform programming by using a data voltage of a level higher than the high potential driving voltage, thereby applying a reverse bias to the organic light emitting diode during the programming period, thereby providing an organic light emitting diode. In this case, the threshold voltage of the driving TFT can be sensed more quickly, and the range of data voltages between the set gray levels can be widened. Thus, it is easy to overcome the difficulty of implementing gray scales due to the high efficiency of the organic light emitting diode.

Furthermore, the organic light emitting diode display and the driving method thereof according to the present invention can further increase the accuracy of the threshold voltage sensing of the driving TFT by using the entire one horizontal period as the programming period.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. For example, in the exemplary embodiment of the present invention, only the case where the driving TFT is implemented as the N type MOSFET has been described. However, the technical concept of the present invention is not limited thereto and may be applied to the P type MOSFET. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

1 is a diagram illustrating a light emission principle of a general organic light emitting diode display.

Fig. 2 is a circuit diagram equivalently showing one pixel in a conventional active matrix organic light emitting diode display.

FIG. 3 is a diagram illustrating an example in which a threshold voltage of a driving TFT increases due to positive gate-bias stress. FIG.

4 is a block diagram illustrating an organic light emitting diode display device according to an exemplary embodiment of the present invention.

FIG. 5 is a timing diagram illustrating a scan pulse pair and a data voltage supplied to a pixel, and a potential change of first and second nodes. FIG.

6 is an equivalent circuit diagram illustrating a [j, k] -th pixel included in the organic light emitting diode display according to the exemplary embodiment of the present invention.

7A is an equivalent circuit diagram of a pixel for the programming period T1 of FIG.

7B is an equivalent circuit diagram of a pixel for the threshold voltage compensation and light emission period T2 of FIG.

FIG. 8 is a simulation result showing changes in first and second node potentials during a programming period T1 and a threshold voltage compensation and emission period T2 according to a difference in threshold voltages of an inter-pixel driving TFT. FIG.

Fig. 9 is a simulation result showing the amount of driving current flowing through the organic light emitting diode in the programming period T1 and the threshold voltage compensation and light emission period T2 according to the threshold voltage difference of the driving pixel between pixels.

<Description of Symbols for Main Parts of Drawings>

116: display panel 118: gate driving circuit

120: data driving circuit 122: pixel

124: timing controller 130: threshold voltage compensation circuit

Claims (8)

A high potential drive voltage source for generating a high potential drive voltage; A base voltage source for generating a base voltage; A plurality of data lines supplied with a data voltage higher than the high potential driving voltage; A plurality of gate line pairs each including a first gate line supplied with a first scan pulse, and a second gate line supplied with a second scan pulse generated out of phase with the first scan pulse; An organic light emitting diode emitting light by a current flowing between the high potential driving voltage source and the low potential driving voltage source; A driving element controlling a current flowing through the organic light emitting diode according to a gate-source voltage Vgs applied between a gate electrode connected to a first node and a source electrode connected to a second node; And In response to the first and second scan pulses, the potential of the first node is initialized to the data voltage during the first period, and the potential of the second node is initialized to the value obtained by subtracting the threshold voltage of the driving device from the data voltage. And a compensation voltage obtained by adding a gray voltage to implement the potential of the first node in conjunction with the potential of the second node falling to the base voltage level during the second period following the first period. And a threshold voltage compensating circuit for scaling down. The method of claim 1, The first scan pulse is generated at a high logic voltage and the second scan pulse is generated at a low logic voltage during the first period; And the first scan pulse is inverted to a low logic voltage and the second scan pulse is inverted to a high logic voltage during the second period. The method of claim 2, The threshold voltage compensation circuit, By turning on in response to the first scan pulse, the potential of the first node is initialized to the data voltage during the first period, and the potential of the second node is subtracted from the data voltage to a value obtained by subtracting the threshold voltage of the driving device. First and second switch elements for initializing; A third switch element that is turned on in response to the second scan pulse to drop the potential of the second node to the base voltage level during the second period; And First and second scaling down to a compensation voltage including a gray voltage to implement the potential of the first node and a threshold voltage of the driving element in association with the potential of the second node falling to the base voltage level during the second period; 2. An organic light emitting diode display comprising: two storage capacitors. The method of claim 3, wherein The first switch element may include a gate electrode connected to the first gate line, a drain electrode connected to the first node, a source electrode commonly connected to the cathode electrode of the organic light emitting diode and the drain electrode of the driving device. have; The second switch element has a gate electrode connected to the first gate line, a drain electrode connected to the data line, and a source electrode connected to the first node; The third switch element has a gate electrode connected to the second gate line, a drain electrode connected to the second node, and a source electrode connected to the ground voltage source; The first storage capacitor has one electrode connected to the second node and the other electrode connected to the first node; And the second storage capacitor has one electrode connected to the first node and the other electrode connected to the base voltage source. The method of claim 3, wherein And the data voltage (Vdata) initialized to the first node during the first period is as follows.

Here, Vdd denotes the high potential driving voltage, Vto denotes the threshold voltage of the organic light emitting diode, Vd denotes the gray scale voltage to be implemented, and α denotes a proportional constant. The method of claim 5, wherein And the compensation voltage Vc that is scaled down during the second period and charged in the first node is represented by the following equation.

Here, C1 denotes the capacitance of the first storage capacitor, C2 denotes the capacitance of the second storage capacitor, and Vth denotes the threshold voltage of the driving element. The method of claim 6, The driving current (Ioled) flowing through the organic light emitting diode during the second period is the following formula.

Here, Vgs denotes a difference voltage between the gate voltage and the source voltage of the driving element, and k denotes a constant value determined by mobility and parasitic capacitance of the driving element, respectively. A plurality of gate line pairs including a high potential driving voltage source, a base voltage source, a plurality of data lines, and first and second gate lines supplied with scan pulses of opposite phases, between the high potential driving voltage source and the low potential driving voltage source. Controls the current flowing through the organic light emitting diode according to the gate-source voltage Vgs applied between the organic light emitting diode emitted by the current flowing through the gate electrode and the gate electrode connected to the first node and the source electrode connected to the second node. A driving method of an organic light emitting diode display device having a driving element and a threshold voltage compensating circuit for scaling down the potential of the first node in response to a potential change of the second node. In response to the first and second scan pulses, during the first period, the potential of the first node is initialized to a data voltage higher than the high potential driving voltage generated from the high potential driving voltage, and the potential of the second node is initialized to the data voltage. Initializing the threshold voltage of the driving device to a subtracted value; The gray level voltage to implement the potential of the first node in conjunction with the potential of the second node which is connected to the base voltage source and falls to the base voltage level during the second period subsequent to the first period is summed. Scaling down to a compensation voltage; And Controlling the driving current flowing through the organic light emitting diode by using the first and second node potentials set to the compensation voltage and the base voltage, respectively, during the second period, to emit the organic light emitting diode. A method of driving an organic light emitting diode display device.

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