KR20090061342A - Phase-change memory device and fabrication method thereof - Google Patents

Abstract

A phase change memory device and a manufacturing method thereof are provided to improve phase change reliability by continuously supplying antimony to a phase change material layer. A bottom electrode contact(117) is formed on a semiconductor substrate(101). An antimony rich core(119A) is formed on the bottom electrode contact. A phase change material layer(125) is formed on the antimony rich core. The antimony rich core is formed by using GeSb2Te4. The phase change material layer is formed by using chalcogenide based material. The antimony rich core is formed on only the bottom electrode contact.

Description

Phase Change Memory Device and Fabrication Method Thereof

The present invention relates to a phase change memory device, and more particularly, to a phase change memory device capable of maintaining the characteristics of a phase change material and a method of manufacturing the same.

Phase-change random access memory (PRAM) is a memory device that records and reads information by a phase change of a phase change material having a high resistance in an amorphous state and a low resistance in a crystalline state. Compared to the above, there is an advantage of having a high operation speed and high integration.

Currently, in manufacturing a PRAM device, the phase change material layer is generally formed through an atomic layer deposition (ALD) method or a chemical vapor deposition (CVD) method.

In addition, the phase change material is a material having a different state of a crystalline state and an amorphous state according to the temperature, and in the crystalline state has a lower resistance than the amorphous state and has a regular ordered atomic arrangement. Representative examples of phase change materials include chalcogenide (GST) -based materials, which are composed of germanium (Ge), antimony (Sb), and tellurium (Te).

When the current is applied through the lower electrode in the PRAM device, the temperature of the phase change material layer is changed by Joule heat generated by this, and the crystal structure of the phase change material layer is determined by changing the applied current appropriately. Can be changed to a state. That is, Joule heat causes a phase change between a low resistance crystalline state (SET state) and a high resistance amorphous state (RESET state). In the write and read modes, the current flowing through the phase change film is sensed to determine whether the information stored in the phase change memory cell is data 0 in the set state or data 1 in the reset state.

However, as the phase change is repeated, each component included in the phase change material layer is thermally diffused, and phase separation occurs, thereby changing the characteristics of the phase change material. In other words, antimony (Sb) in the GST is diffused to the outside, thereby the composition of the GST film is unbalanced, and tellurium (Te) is diffused and grown into the GST film itself.

Accordingly, there is a problem in that the device malfunctions or does not operate, such as a delamination phenomenon in the GST film and, in severe cases, the GST film is physically destroyed.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and there is a technical problem to provide a phase change memory device capable of maintaining the characteristics of a phase change material even after repeated phase changes and a method of manufacturing the same.

Another technical problem of the present invention is to provide a phase change memory device capable of continuously supplying antimony (Sb) to the phase change material layer and maintaining the composition of the phase change material even if the phase change is repeated, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a method of manufacturing a phase change memory device, the method including: providing a semiconductor substrate on which a lower electrode contact is formed; Forming an antimony-rich core on the lower electrode contact; And forming a phase change material layer on the antimony-rich core.

On the other hand, a phase change memory device according to an embodiment of the present invention includes a semiconductor substrate having a junction region; A switching element formed on the junction region; A lower electrode contact formed on the switching element; An antimony-rich core formed on the lower electrode contact; And a phase change material pattern formed on the antimony-rich core.

According to the present invention, by forming an antimony-rich core in the GST film, the antimony component can be continuously supplied to the GST film. Accordingly, even if the phase change is repeated, the composition of the phase change material is maintained unchanged, thereby improving the phase change reliability.

In addition, as the reliability of the phase change material layer is guaranteed, the yield and operation reliability of the phase change memory device may be improved.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1A to 1F are cross-sectional views illustrating a method of manufacturing a phase change memory device according to an embodiment of the present invention.

As shown in FIG. 1A, a substructure for manufacturing a phase change memory device is formed. That is, the device isolation layer 103 is formed on the semiconductor substrate 101 to separate the core region from the cell region, and ions are implanted into the cell region to form the junction region 105. Thereafter, the diffusion barrier layers 107 and 109 and the first interlayer insulating layer 111 are sequentially formed on the entire structure, and then the semiconductor substrate 101 is exposed by removing the designated portion (the PN diode formation region). A PN diode as the switching element 113 is formed in the region.

Next, as shown in Fig. 1B, a second interlayer insulating film 115 is formed on the entire structure in which the switching element is formed. Then, the second interlayer insulating layer 115 is patterned to expose the upper portion of the switching element 113 to form a contact hole, and then the contact hole is filled with a metal material to form the bottom electrode contact (BEC, 117). Form.

Subsequently, as illustrated in FIG. 1C, an antimony-rich (Sb-rich) layer 119 is formed on the entire structure in which the BEC 117 is formed. The antimony-rich layer 119 may be formed using, for example, GeSb ₂ Te ₄ .

Next, the antimony-rich layer 119 is patterned to form an antimony-rich core 119A on the lower electrode contact 117 as shown in FIG. 1D. Here, the antimony-rich core 119A is preferably patterned to exist only on the lower electrode contact 117. For example, when the lower electrode contact 117 is formed in a cylindrical shape, the aperture of the lower electrode contact 117 is formed. Pattern to have a smaller aperture.

As shown in FIG. 1E, the GST layer 121 is formed and planarized over the entire structure, and then a conductive material layer 123 and a mask (not shown) are formed.

Subsequently, the conductive material layer 123 and the GST layer 121 are patterned to form the phase change material layer 125 and the upper electrode 123A including the antimony-rich core 119A and the GST pattern 121A.

The PRAM device manufactured as described above has an antimony component from the GST pattern 121 constituting the phase change material layer 125 when the drive current is supplied to change the state of the phase change material layer 125 to store and read data. Even when discharged to the outside, antimony is continuously supplied to the GST pattern 121 from the antimony-rich core 119A therein, and the composition of the material constituting the GST pattern 121 is not changed. Therefore, it is possible to ensure the operation reliability of the phase change material layer 125.

In addition, the phase change memory device manufactured as described above may include a semiconductor substrate having a junction region, a switching element formed on the junction region, a lower electrode contact formed on the switching element, and an antimony-rich (Sb) formed on the lower electrode contact. -rich) includes a phase change material pattern formed on the core and the antimony-rich core.

Here, the antimony-rich core is formed of GeSb ₂ Te ₄ , and the phase change material pattern is formed using GST. In addition, the antimony-rich core is preferably patterned to remain only on the bottom electrode contact, and the phase change material pattern is formed to cover the top and side surfaces of the antimony-rich core.

As such, those skilled in the art will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, the above-described embodiments are to be understood as illustrative in all respects and not as restrictive. The scope of the present invention is shown by the following claims rather than the detailed description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

According to the present invention, it is possible to maintain the characteristics of the phase change material layer, thereby improving operation reliability of the phase change material layer. Accordingly, the malfunction of the phase change memory device can be prevented and the yield can be improved and applied to various electronic devices.

1A to 1F are cross-sectional views illustrating a method of manufacturing a phase change memory device according to an embodiment of the present invention.

<Description of the symbols for the main parts of the drawings>

101 semiconductor substrate 103 device isolation film

105: junction region 107, 109: diffusion barrier film

111 first interlayer insulating film 113 switching element

115: second interlayer insulating film 117: lower electrode contact (BEC)

119: antimony-rich layer 119A: antimony-rich core

121: GST layer 121A: GST pattern

123: conductive material layer 123A: upper electrode

125: phase change material layer

Claims (11)

As a phase change memory device manufacturing method, Providing a semiconductor substrate having a bottom electrode contact formed thereon; Forming an antimony-rich core on the lower electrode contact; And Forming a phase change material layer on the antimony-rich core; Phase change memory device manufacturing method comprising a. The method of claim 1, The forming of the antimony-rich core may include forming an antimony-rich layer on the semiconductor substrate on which the lower electrode contact is formed; And Patterning the antimony-rich layer to remain on the lower electrode contact; Phase change memory device manufacturing method comprising a. The method according to claim 1 or 2, The antimony-rich core, GeSb ₂ Te _{4 It} is formed using a phase change memory device, characterized in that formed. The method according to claim 1 or 2, And the antimony-rich core is formed only on the lower electrode contact. The method of claim 1, The phase change material layer is a phase change memory device manufacturing method, characterized in that formed using a chalcogenide (Chalcogenide) material. The method of claim 1, After forming the phase change material layer, forming a conductive material layer on an entire structure; And Patterning the conductive material layer and the phase change material layer; Phase change memory device manufacturing method characterized in that it further comprises. A semiconductor substrate on which a junction region is formed; A switching element formed on the junction region; A lower electrode contact formed on the switching element; An antimony-rich core formed on the lower electrode contact; And A phase change material pattern formed on the antimony-rich core; Phase change memory device comprising a. The method of claim 7, wherein The antimony-rich core, GeSb ₂ Te _{4 It} characterized in that the phase change memory device. The method of claim 7, wherein The antimony-rich core, phase change memory device, characterized in that present only on the lower electrode contact. The method of claim 7, wherein The phase change material pattern may cover the upper and side surfaces of the antimony-rich core. The method according to claim 7 or 10, The phase change material pattern is a phase change memory device, characterized in that consisting of a chalcogenide-based material.

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