KR20090038065A - Method for manufcturing phase change memory device - Google Patents

Abstract

A method for manufacturing a phase change memory device is provided to prevent the deterioration of interfacial property between the thin film and the phase change material layer by protecting tellurium(Te) on a phase change material layer surface. A phase change material layer is made of a chalcogenides, and is made of the germanium - antimony - tellurium(Ge-Sb-Te, GST). A hard mask pattern(24) is formed on the top of the phase change material layer, and is made of the conductive film, such as the TiN film. The hard mask pattern is used as the upper electrode of the phase change memory device, and the phase change material layer pattern(23A) is formed by etching the phase change material layer. A photoresist is coated on the front of the result from the phase change material pattern. A buffer layer(25) is formed on the side wall of the phase change material layer pattern by processing the exposure process and the developing process.

Description

Manufacturing method of phase change memory device {METHOD FOR MANUFCTURING PHASE CHANGE MEMORY DEVICE}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a manufacturing technology of a semiconductor device, and more particularly, to a method of manufacturing a phase change memory device.

Recently, a phase change memory device has been proposed as a next generation nonvolatile memory device. A phase change memory device is a method of controlling a crystal state of a material through a method of applying a current or voltage under an appropriate condition using a phase change material whose resistance value changes according to the crystal state of the material. It stores the data and reads the type of stored information from the change of the resistance value according to the crystal state of the material.

1 is a cross-sectional view illustrating a phase change memory device according to the prior art.

Referring to FIG. 1, a method of manufacturing a phase change memory device according to the related art is described. After forming a lower electrode 12 on a substrate 11, the phase change material layer 13 on the lower electrode 12 is described. To form. In this case, the phase change material layer 13 is formed using germanium-antimony-tellurium (Ge-Sb-Te, GST).

Subsequently, after the hard mask pattern 14 is formed on the phase change material layer 13, the phase change material layer 13 is etched using the hard mask pattern 14 as an etch barrier. To form.

In the above-described prior art, a halogen gas is used to etch the phase change material layer 13. The elements constituting the halogen gas and the phase change material layer 13, that is, germanium (Ge), antimony (Sb), Antimony (Sb) is diffused out due to the difference in the reactivity of the tellurium (Te), and due to the external diffusion of the antimony (Te) accumulated in the surface of the phase change material layer (13) (pile) Teile up (pile up) ) Occurs.

The external diffusion of the antimony (Sb) and the accumulation of tellurium (Te) cause a change in the lattice structure or composition of the phase change material layer 13, thereby deteriorating the electrical characteristics of the phase change material layer. In addition, there is a problem that tellurium (Te) accumulated on the surface of the phase change material layer acts as a high resistive source, and the phase change material layer is formed during the formation of the silicon oxide film covering the subsequent phase change material layer 13. There is a problem in that cracks are generated in the silicon oxide film by deteriorating the interface property between the silicon oxide film and the silicon oxide film.

The present invention is to solve the above problems of the prior art, a phase change memory device that can prevent the electrical characteristics of the phase change material layer from deteriorating due to the etching damage generated in the process of etching the phase change material layer Its purpose is to provide a method of manufacturing.

Another object of the present invention is to provide a method of manufacturing a phase change memory device capable of preventing the accumulation of tellurium (Te) on the surface of the phase change material layer.

According to an aspect of the present invention, there is provided a method of manufacturing a phase change memory device, the method including: forming a phase change material layer on a lower electrode; Forming a hard mask pattern on the phase change material layer; Forming a phase change material layer pattern by etching the phase change material layer using the hard mask pattern as an etch barrier, and curing etch damage generated during the phase change material layer etching. do.

The curing may be performed by ion implanting any one of the components of the phase change material layer. In this case, the phase change material layer may include germanium-antimony-tellurium (Ge-Sb-Te, GST), and the ion implantation may be performed using antimony (Sb).

The curing may be performed after the buffer film is formed on the sidewalls of the hard mask pattern, and the buffer film may be formed of a photoresist.

The dose may be less than 5% of the total volume of the phase change material layer pattern, and the dose amount less than 15% of the volume of the region where phase change occurs in the phase change material layer pattern. Can be used.

When the buffer membrane is not formed, the ion implantation may be performed at an ion implantation angle in the range of 0 ° to 9 °. When the buffer membrane is formed, the ion implantation is at an ion implantation angle in the range of 0 ° to 5 °. It can be carried out.

When the ion implantation, the Rp target may be performed so as not to exceed 50% of the total height of the phase change material layer pattern from the lower surface of the phase change material layer pattern contacting the substrate, and the ion may be in the range of 5KeV to 100KeV. This can be done using implanted energy.

After the ion implantation, a heat treatment step for activating the implanted impurities may be further performed.

The etching of the phase change material layer may be performed using a gas in which an inert gas and a halogen gas are mixed, the inert gas may include argon, and the halogen gas may include CL ₂ or CHF ₃ . have.

The hard mask pattern may be formed of a conductive film, for example, a titanium nitride film.

The present invention has the effect of preventing the electrical properties of the phase change material layer from changing by curing the etch damage of the phase change material layer generated in the process of etching the phase change material layer. This prevents the accumulation of tellurium (Te) on the surface of the phase change material layer, thereby preventing deterioration of interfacial properties between the thin film contacting the phase change material layer and the phase change material layer.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

2A through 2B are cross-sectional views illustrating a method of manufacturing a phase change memory device according to an exemplary embodiment of the present invention.

As shown in FIG. 2A, the lower electrode 22 is formed on the substrate 21 having a predetermined structure. In this case, the lower electrode 22 may be formed of any one selected from the group consisting of TiN, WN, TiAlN, and TiW.

Next, a phase change material layer 23 is formed on the lower electrode 22. In this case, the phase change material layer 23 may be formed using a chalcogenide compound. Here, the chalcogenide compounds usable in the phase change material layer 23 are germanium-antimony-tellurium, arsenic-antimony-tellurium, tin-antimony-tellurium, tin-indium-antimony-tellurium, arsenic-germanium- Group 5A elements-antimony-tellurium, tantalum, niobium to vanadium, etc.-Group 6A elements, such as antimony-tellurium, tungsten, molybdenum, to chromium-antimony-tellurium, group 5A elements-antimony-selenium, or group 6A Element-antimony-selenium and the like. Preferably, germanium-antimony-tellurium (Ge-Sb-Te, GST) is used as the phase change material layer 23.

Next, a hard mask pattern 24 is formed on the phase change material layer 23. In this case, the hard mask pattern 24 may be formed of a conductive film, for example, a titanium nitride film, and serves as an upper electrode of the phase change memory device.

As shown in FIG. 2B, the phase change material layer 23 is etched using the hard mask pattern 24 as an etch barrier to form the phase change material layer pattern 23A. In this case, the etching process may be performed using a mixed gas of inert gas and halogen gas. Here, argon gas may be used as the inert gas, and CL ₂ or CHF ₃ may be used as the halogen gas.

Here, antimony (Sb) out diffuses due to a difference in reactivity between the elements constituting the halogen gas and the phase change material layer 23, that is, germanium (Ge), antimony (Sb), and tellurium (Te). In addition, due to the external diffusion of the antimony (Sb), tellurium (Te) is accumulated on the surface of the phase change material layer pattern 23A.

As illustrated in FIG. 2C, a buffer layer 25 is formed on sidewalls of the phase change material layer pattern 23A. In this case, the buffer layer 25 may act as an ion implantation buffer layer during the ion implantation process to cure the etching damage of the subsequent phase change material layer pattern 23A, and may be formed of a photoresist.

Here, the buffer film 25 is formed by applying a photoresist on the entire surface of the resultant material including the phase change material layer pattern 23A, and then performing exposure and development processes using the same mask as the hard mask pattern 24. By proceeding, the buffer film 25 may be formed on the sidewalls of the phase change material layer pattern 23A.

Meanwhile, in the subsequent ion implantation process, when the impurity ion implantation is possible at a desired position in the phase change material layer pattern 23A by adjusting the process conditions such as the ion implantation angle, the buffer film 25 forming process may be omitted.

Next, the etch damage of the phase change material layer pattern 23A generated during the etching process is cured. At this time, the curing process may be performed by a method of compensating for the antimony (Sb) lost by diffusion to the outside in the process of forming the phase change material layer pattern (23A) through the ion implantation process. This compensates for the loss of antimony (Sb) in the phase change material layer pattern 23A, and due to external diffusion of antimony (Sb), tellurium (Te) accumulates on the surface of the phase change material layer pattern. Can be solved. In other words, the modified lattice structure or composition of the phase change material layer pattern 23A may be restored to an initial state through a curing process.

Here, the dose of antimony (Sb) during the ion implantation process to cure the etch damage is less than 5% of the total volume of the phase change material layer pattern 23A to sufficiently compensate for the antimony lost during the etching process. It can be carried out using the dose amount, and as compared to the volume of the region where the phase change occurs in the phase change material layer pattern 23A by joule heating transmitted from the lower electrode 22 as shown in 'A' of the figure. It can be carried out using a dose of less than 15%.

In addition, when the buffer layer 25 is not formed on the sidewall of the phase change material layer pattern 23A, the ion implantation process may be performed at an ion implantation angle in the range of 0 ° to 9 °, and the phase change material layer pattern ( When the buffer film 25 is formed on the sidewall of 23A), it may be performed at an ion implantation angle in the range of 0 ° to 5 °.

In addition, in the ion implantation process, the Rp target may be performed to be lower than 50% of the total height of the phase change material layer pattern 23A from the bottom surface of the phase change material layer pattern 23A in contact with the substrate 21. For example, when the bottom surface of the substrate 21 and the phase change material layer pattern 23A is in contact with each other and the total height of the phase change material layer pattern 23A is 1000 μs, the position of the Rp target is the phase change material layer. It is preferable to adjust so as not to exceed 500 micrometers height from the lower surface of pattern 23A. This is to intensively cure the region (phase contact between the lower electrode and the phase change material layer pattern) where the phase change occurs in the phase change material layer pattern 23A. For this purpose, the ion implantation process may be performed using ion implantation energy in the range of 5KeV to 100KeV.

Here, the Rp target refers to a position where the concentration of impurities, such as antimony (Sb), injected from the ion implantation target layer, for example, the phase change material layer pattern 23A, is the highest.

Next, after the buffer film 25 is removed, a heat treatment process for activating antimony injected into the phase change material layer pattern 23A is performed. At this time, the heat treatment may be carried out using any one method selected from the group consisting of a rapid heat treatment method (Rapid Thermai Annealing (RTA), a furnace annealing method and a laser annealing method.

On the other hand, when sufficient thermal energy is provided to activate the antimony (Sb) injected into the phase change material layer pattern 23A in a subsequent process such as a subsequent interlayer insulating film forming process or a metal wiring process to complete the phase change memory device. The above heat treatment process may be omitted.

Next, although not shown, an insulating film covering the phase change material layer pattern 23A and the hard mask pattern 24 is formed, and a portion of the insulating film is etched to electrically connect the upper electrode, that is, the hard mask pattern 24. A phase change memory device can be completed by performing a wiring process for connecting.

As described above, the present invention can prevent the electrical properties of the phase change material layer from being changed by curing the etching damage of the phase change material layer generated in the process of etching the phase change material layer. This prevents the accumulation of tellurium (Te) on the surface of the phase change material layer, thereby preventing deterioration of interfacial properties between the thin film contacting the phase change material layer and the phase change material layer.

Although the technical spirit of the present invention has been described in detail according to the above preferred embodiment, it should be noted that the above embodiment is for the purpose of description and not of limitation. In addition, those skilled in the art will appreciate that various embodiments within the scope of the technical idea of the present invention are possible.

1 is a cross-sectional view showing a phase change memory device according to the prior art.

2A to 2C are cross-sectional views illustrating a method of manufacturing a phase change memory device according to an embodiment of the present invention.

* Description of symbols on the main parts of the drawings *

21 substrate 22 lower electrode

23: phase change material layer 24: hard mask pattern

25: buffer membrane

Claims (16)

Forming a phase change material layer on the lower electrode; Forming a hard mask pattern on the phase change material layer; Etching the phase change material layer using the hard mask pattern as an etch barrier to form a phase change material layer pattern; And Curing an etch damage generated during the phase change material layer etching; Method of manufacturing a phase change memory device comprising a. The method of claim 1, The curing may be performed by ion implanting one of the components into the phase change material layer. The method of claim 2, The curing may be performed after forming a buffer film on the sidewall of the hard mask pattern. The method of claim 3, And the buffer film is formed of a photoresist. The method of claim 2, The ion implantation dose is less than 5% of the total volume of the phase change material layer pattern manufacturing method of a phase change memory device. The method of claim 2, The dose of the ion implantation method of the phase change memory device of less than 15% of the volume of the region where the phase change occurs in the phase change material layer pattern. The method of claim 2, A method of manufacturing a phase change memory device, wherein the ion implantation is performed at an ion implantation angle in a range of 0 ° to 9 °. The method of claim 3, A method of manufacturing a phase change memory device, wherein the ion implantation is performed at an ion implantation angle in a range of 0 ° to 5 °. The method of claim 2, And the Rp target is lower than 50% of the total height of the phase change material layer pattern from a lower surface of the phase change material layer pattern in contact with the substrate. The method of claim 2, The method of manufacturing a phase change memory device using the ion implantation energy in the range of 5KeV ~ 100KeV during the ion implantation. The method of claim 2, And implanting a heat treatment after the ion implantation. The method according to any one of claims 2 to 11, wherein The phase change material layer includes germanium-antimony-tellurium (Ge-Sb-Te, GST), and the method of manufacturing a phase change memory device using the antimony (Sb) during the ion implantation. The method of claim 1, And etching the phase change material layer using a gas in which an inert gas and a halogen gas are mixed. The method of claim 13, The inert gas comprises argon, the halogen gas comprises Cl ₂ or CHF _{3 The} method of manufacturing a phase change memory device. The method of claim 1, The hard mask pattern is a method of manufacturing a phase change memory device to form a conductive film. The method of claim 1, The hard mask pattern is formed of a titanium nitride film manufacturing method of a phase change memory device.

Images