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KR20080109137A - Luminescence dispaly and driving method thereof - Google Patents

Luminescence dispaly and driving method thereof Download PDF

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Publication number
KR20080109137A
KR20080109137A KR1020070057068A KR20070057068A KR20080109137A KR 20080109137 A KR20080109137 A KR 20080109137A KR 1020070057068 A KR1020070057068 A KR 1020070057068A KR 20070057068 A KR20070057068 A KR 20070057068A KR 20080109137 A KR20080109137 A KR 20080109137A
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switching element
period
during
light emitting
voltage
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KR1020070057068A
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Korean (ko)
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박영주
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엘지디스플레이 주식회사
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Publication of KR20080109137A publication Critical patent/KR20080109137A/en

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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/04Structural and physical details of display devices
    • G09G2300/0421Structural details of the set of electrodes
    • G09G2300/043Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00Aspects of the constitution of display devices
    • G09G2300/08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809Several active elements per pixel in active matrix panels
    • G09G2300/0842Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting display device and a driving method thereof capable of compensating a threshold voltage due to device nonuniformity and preventing a high potential voltage drop phenomenon.

In an exemplary embodiment, a pixel driver includes a capacitor connected between a high potential voltage line and a first node; A first switching element for supplying a high potential voltage to the second node during the light emitting period; A second switching element for supplying a data voltage to the second node during a program period; Diode driven during the initialization and program periods to discharge the previous data voltage stored in the capacitor during the initialization period, charge the current data voltage to the capacitor during the program period, and drive current according to the current data voltage charged to the capacitor during the emission period. A third switching element for generating a; A fourth switching element connecting the gate terminal and the drain terminal of the third switching element during the initialization period and the program period; A fifth switching element connected to the gate terminal and the source terminal by the fourth switching element during the initialization period and the program period to be driven in an inverted diode manner, and supplying a driving current generated from the third switching element to the light emitting diode during the light emitting period; And a sixth switching element which supplies an initialization voltage to the first node during the initialization period.

Description

A light emitting display device and a method of driving the same {LUMINESCENCE DISPALY AND DRIVING METHOD THEREOF}

1 is a circuit diagram illustrating each pixel of a conventional light emitting display device.

2 is a circuit diagram illustrating each pixel of a light emitting display device according to an exemplary embodiment of the present invention.

3A to 3C are circuit diagrams for describing a method of driving each pixel of the light emitting display device according to the present invention.

4 is a diagram for describing voltage drop compensation of a high voltage supply line of a light emitting display device according to an exemplary embodiment of the present invention.

<Description of Symbols for Main Parts of Drawings>

110: pixel driver

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting display device and a driving method thereof, and more particularly, to a light emitting display device and a driving method thereof capable of compensating a threshold voltage due to device unevenness and preventing a high potential voltage drop phenomenon.

In an active matrix organic electroluminescent display, a plurality of pixels are arranged in a matrix to display an image. Each pixel of the organic light emitting display device includes an organic light emitting diode (OLED) as shown in FIG. 1, and a pixel driver 10 driving the OLED independently. The OLED is composed of a cathode connected to the pixel driver 10 and an anode connected to the power supply line PL, and an organic layer formed between the anode and the cathode. The pixel driver 10 includes a gate line GL for supplying a scan signal, a data line DL for supplying a data signal, a power line PL for supplying a power signal, a gate line GL, and a data line. A switch transistor T1 and a driving transistor T2 and a storage capacitor Cst connected between the DL and the power supply line PL drive the OLED.

Meanwhile, the driving transistor T2 of the conventional light emitting display device includes a gate terminal connected to the drain terminal of the switch transistor T1, a source terminal connected to the cathode of the OLED, and a drain terminal connected to the ground. As a positive data signal is always applied to the gate terminal of the driving transistor T1 through the switch transistor T1, the voltage between the gate and source terminals of the driving transistor T2 always has a positive voltage. In addition, since the driving transistor T2 is always turned on during the operation of the light emitting display device, a current always flows between the source and drain terminals of the driving transistor T2. As a result, deterioration of the driving transistor T2 is accelerated to change the threshold voltage of the driving transistor TD. In this case, as shown in Equation 1, the current flowing through the OLED affected by the threshold voltage of the driving transistor is also changed, which causes a problem in that an image quality irregularity occurs.

Figure 112007042355718-PAT00001

In addition, there is a problem in that image quality instability occurs due to uneven high potential voltage VDD due to power consumption, that is, current / resistance drop of the power line PL.

Accordingly, an object of the present invention is to provide a light emitting display device and a driving method thereof capable of compensating a threshold voltage due to device nonuniformity and preventing a high potential voltage drop phenomenon.

In order to achieve the above technical problem, a plurality of pixels including a light emitting diode connected between a high potential voltage line and a low potential voltage line and a pixel driver driving the light emitting diode are divided into an initialization period, a program period, and a light emission period. A light emitting display device according to an embodiment of the present invention, wherein the pixel driver includes: a capacitor connected between the high potential voltage line and a first node; A first switching element for supplying a high potential voltage to a second node during the light emitting period; A second switching element for supplying a data voltage to the second node during the program period; Diode-driven during the initialization period and the program period to discharge the previous data voltage stored in the capacitor during the initialization period, charge the current data voltage to the capacitor during the program period, and A third switching element for generating the driving current according to the charged current data voltage; A fourth switching element connecting the gate terminal and the drain terminal of the third switching element during the initialization period and the program period; A gate terminal and a source terminal connected by the fourth switching element to be driven in a reverse diode manner during the initialization period and the program period, and supplying driving current generated from the third switching element to the light emitting diode during the light emitting period. 5 switching elements; And a sixth switching device configured to supply an initialization voltage to the first node during the initialization period.

In order to achieve the above technical problem, a plurality of pixels including a light emitting diode connected between a high potential voltage line and a low potential voltage line and a pixel driver having first to sixth switching elements to drive the light emitting diode are initialized. In the driving method of the light emitting display device according to the present invention, which is divided into a period, a program period, and a light emission period, a third switching element operates in a diode manner through the fourth switching element and the sixth switching element during the initialization period. Supplying an initializing voltage to a gate terminal of the third switching device whose initial voltage is a first node; During the program period, a data voltage is supplied to a second node through a second switching element, and the third switching element is diode-operated through a fourth switching element to be connected between the first node and the high potential voltage line. Storing a difference between the gate-source terminal voltage of the third switching element and the high potential voltage in an integrated capacitor; And supplying a driving current generated according to the voltage stored in the capacitor through the third switching element to the light emitting diode through the fifth switching element during the light emitting period.

Other technical problems of the present invention in addition to the above technical problem will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to FIGS. 2 to 4.

2 is a circuit diagram illustrating one pixel of a light emitting display device according to an exemplary embodiment of the present invention.

As shown in FIG. 2, each pixel of the light emitting display device according to the first embodiment includes an organic light emitting diode OLED for displaying an image and a pixel driver 110 for driving the light emitting diode OLED. .

The light emitting diode OLED includes an anode connected to the pixel driver 110 and an anode connected to the low potential voltage VSS, and an organic layer formed between the anode and the cathode.

The pixel driver 110 includes a first to sixth switching elements T1 to T6 for controlling the on / off timing of the light emitting diode OLED, and a capacitor to keep the light emitting diode OLED on for one frame. (Cst). Here, the first to sixth switching elements T1 to T6 may use PMOS transistors or NMOS transistors, and the first to sixth switching elements T1 to T5 shown in FIG. 2 are all PMOS transistors.

The first switching element T1 supplies the high potential voltage VDD to the second node n2 in response to the emission control signal EM. For this purpose, the gate terminal of the first switching element T1 is connected to the emission control signal EM, the source terminal to the high potential voltage VDD line, and the drain terminal to the second node n2.

The second switching element T2 supplies the data voltage Vdata to the second node n2 in response to the first selection signal Sel1. For this purpose, the gate terminal of the second switching element T2 is connected to the first selection signal Sel1, the source terminal is connected to the data voltage Vdata, and the drain terminal is connected to the second node n2.

The third switching element T3 supplies the voltage of the second node n2 to the third node n3 in response to the voltage of the first node n1. For this purpose, the gate terminal of the third switching element T3 is connected to the first node n1, the source terminal to the second node n2, and the drain terminal to the third node n3.

The fourth switching device T4 supplies the voltage of the first node n1 to the third node n3 in response to the first selection signal Sel1. For this purpose, the gate terminal of the fourth switching element T4 is connected to the first selection signal Sel1, the source terminal is connected to the first node n1, and the drain terminal is connected to the third node n3.

The fifth switching element T5 supplies the voltage of the third node n3 to the light emitting diode OLED in response to the voltage of the first node n1. To this end, the gate terminal of the fifth switching element T5 is connected to the first node n1, the source terminal to the third node n3, and the drain terminal to the light emitting diode OLED.

The sixth switching element T6 supplies the initial voltage Vini to the first node n1 in response to the second selection signal Sel2. For this purpose, the gate terminal of the sixth switching element T6 is connected to the second selection signal Sel2, the source terminal is connected to the initial voltage Vini source, and the drain terminal is connected to the first node n1.

The capacitor Cst is connected between the first node n1 and the high potential voltage VDD line to charge the difference voltage between the voltage of the first node n1 and the high potential voltage VDD.

3A to 3C are diagrams for describing an operation of a pixel for each period in the light emitting display device according to the present invention.

As shown in FIG. 3A, the first and second selection signals Sel1 and Sel2 maintain a low logic voltage during the initialization period Tini, and the emission control signal EM maintains a high logic voltage.

Accordingly, the second and fourth switching elements T2 and T4 are turned on in response to the first selection signal Sel1 of the low logic voltage and the sixth switching in response to the second selection signal Sel2 of the low logic voltage. Element T6 is turned on. On the other hand, the first switching device T1 is turned off in response to the light emission control signal EM having a high logic voltage.

The data voltage Vdata is supplied to the second node n2 through the turned-on second switching element T2 and the gate terminal and the drain terminal of the third switching element T3 through the turned-on fourth switching element T4. Are connected to each other. Accordingly, the third switching element T3 operates in a diode manner.

In addition, the initialization voltage Vini is supplied to the first node n1 through the turned-on sixth switching element T6, so that the gate terminal of the third switching element T3 is initialized to the initialization voltage.

As such, the reason for initializing the gate terminal of the first node n1, that is, the third switching element, to the initialization voltage is that if the data signal during the previous frame time is at a high level and the data signal at the next frame time is at a low level, This is because the data signal can no longer be applied to the gate terminal of the third switching element T3 due to the diode connection characteristic of the switching element T3. To prevent this, the first node n1 should be initialized to a predetermined voltage Vini every frame.

As shown in FIG. 3B, during the program period Tpro, the first selection signal Sel1 maintains a low logic voltage, and the second selection signal Sel2 and the emission control signal EM maintain a high logic voltage. .

Therefore, in response to the first selection signal Sel1 of the low logic voltage, the second and fourth switching elements T2 and T4 are turned on, and the second selection signal Sel2 and the light emission control signal EM of the high logic voltage are turned on. In response, the first and sixth switching elements T1 and T6 are turned off.

The data voltage Vdata is supplied to the second node n2 through the turned-on second switching element T2. The gate terminal and the drain terminal of the third switching element T3 are connected to each other through the turned on fourth switching element T4. Accordingly, since the third switching element T3 becomes a forward diode, the threshold voltage of the third switching element is sampled at the gate terminal of the third switching element T3, that is, the first node n1, so that the data voltage Vdata The difference voltage between the threshold voltages of the third switching element T3 is supplied. That is, the capacitor Cst connected between the first node n1 and the high potential voltage VDD source has a high voltage at a difference voltage between the data voltage Vdata and the threshold voltage Vth of the third switching element T3. The value (Vdata + Vthp-VDD) minus the above voltage (VDD) is stored.

The gate terminal and the source terminal of the fifth switching device T5 are connected to each other through the turned-on fourth switching device T4. Accordingly, since the fifth switching element T5 becomes a reverse diode, current does not flow to the light emitting diode OLED, thereby preventing light leakage that may occur during the program period Tpro, thereby improving the contrast ratio.

As shown in FIG. 3C, the first and second selection signals Sel1 and Sel2 maintain a high logic voltage during the light emission period Tem, and the light emission control signal EM maintains a low logic voltage.

The first switching element T1 is turned on in response to the light emission control signal EM of the low logic voltage, and the second, fourth, and second signals in response to the first and second selection signals Sel1 and Sel2 of the high logic voltage. The six switching elements T2, T4 and T6 are turned off.

The high potential voltage VDD is charged in the second node n2 through the turned-on first switching element T1, and the voltage between the gate and source terminals of the third switching element T3 is charged in the capacitor Cst. Maintained at voltage. Accordingly, the third switching element T3 generates a driving current based on the voltage stored in the capacitor Cst, and the driving current is supplied to the light emitting diode OLED through the turned on fifth switching element T5. do. Then, the light emitting diode OLED emits light with brightness corresponding to the magnitude of the driving current.

At this time, the driving current supplied to the light emitting diode OLED is represented by Equation 2.

Figure 112007042355718-PAT00002

Here, I is a driving current flowing through the light emitting diode OLED, K is a current gain of the third switching element T3, Vgs is a voltage between the gate and source terminals of the third switching element T3, and Vth is The threshold voltage of three switching elements T3 is shown.

As can be seen from Equation 1, the driving current I flows through the light emitting diode OLED in response to the data voltage Vdata regardless of the threshold voltage Vth of the third switching element T3. . That is, since the driving current for driving the light emitting diode OLED is determined by the data voltage Vdata and the high potential voltage VDD, the driving current is changed to the third switching element T3, which is a driving switch whose threshold voltage changes over time. Image quality defects can be prevented.

On the other hand, the pixels positioned on the same horizontal line are connected to the high potential voltage line VDDL which supplies the same high potential voltage as shown in FIG. 4 in order to prevent voltage drop caused by the self resistance of the high potential voltage line. .

The voltage drop prevention will be described by taking the first pixel P1 and the n-th pixel Pn connected to the same high potential voltage line having the self resistance shown in FIG. 4 as an example.

First, Vdata (P1) + Vth (P1) is supplied to the first node n1 of the first pixel P1 during the program period Tpro, and Vdata is supplied to the first node n1 of the nth pixel P1. (Pn) + Vth (Pn) is supplied. At this time, since the first switching elements T1 of the first and nth pixels P1 and Pn connected to the same gate line are turned off, no current flows through the high potential voltage line VDDL. Therefore, the high potential voltage VDDP (P1) of the first pixel P1 and the high potential voltage VDDP (Pn) of the nth pixel Pn have the same value (VDDP (P1) = VDDP (Pn)). ).

Accordingly, VDDP (P1)-(Vdata (P1) + Vth (P1)) is stored in the capacitor Cst of the first pixel P1, and VDDP (Pn) is stored in the capacitor Cst of the nth pixel Pn. )-(Vdata (Pn) + Vth (Pn)) is stored.

During the light emission period Tem, current flows through the high potential voltage line VDDL, so that the VDDE P1 is supplied to the second node n2 of the first pixel P1, and the second node of the nth pixel pn. VDDE (Pn) is supplied to (n2). That is, the VDDE Pn supplied to the second node n2 of the n th pixel pn during the light emission period Tem is formed by the self resistance of the high potential voltage line VDDL. It is smaller than VDDE (P1) supplied to the second node n2 of (VDDE (Pn) <VDDE (P1)). In addition, the VDDE Pn supplied to the second node n2 of the n th pixel Pn during the emission period Tem is applied during the program period Tpro by the self resistance of the high potential voltage line VDDL. It is smaller than VDDP (Pn) supplied to the nth pixel Pn (VDDE (Pn) <VDDP (Pn)) and supplied to the second node n2 of the first pixel P1 during the light emitting period Tem. VDDE P1 is equal to VDDP P1 supplied to the first pixel P1 during the program period Tpro (VDDE (P1) = VDDP (P1)).

At this time, since the first node n1 of the first and nth pixels P1 and Pn is in a floating state, the capacitor Cst of the first and nth pixels P1 and Pn is charged during the program period Tpro. The applied voltage is maintained even during the light emission period Tem. That is, VDDE (P1)-{VDDP (P1)-(Vdata (P1) + Vth (P1))} is applied to the gate terminal of the third switching element T3 of the first pixel P1 during the light emission period Tem. VDDE (Pn)-{VDDP (Pn)-(Vdata (Pn) + Vth (Pn))} is supplied to the gate terminal of the third switching element T3 of the nth pixel Pn. VDDE (P1) is supplied to the source terminal of the third switching element T3 of the first pixel P1, and VDDE (Pn) is supplied to the source terminal of the third switching element T3 of the nth pixel Pn. Is supplied.

Accordingly, the current flowing through the OLED of the first pixel P1 during the light emitting period Tem is expressed by Equation 3 below.

I (P1) = 1 / 2K [VDDE (P1)-{VDDP (P1)-(Vdata (P1) + Vth (P1))}-VDDE (P1) -Vth] 2

= 1 / 2K [(Vdata (P1) + Vth (P1))-VDDE (P1) -Vth] 2 = 1 / 2K [(Vdata (P1) -VDDE (P1)] 2

The current flowing through the OLED of the nth pixel Pn during the light emission period Tem is represented by Equation 4.

I (P1) = 1 / 2K [VDDE (Pn)-{VDDP (Pn)-(Vdata (Pn) + Vth (Pn))}-VDDE (Pn) -Vth] 2

= 1 / 2K [(Vdata (Pn) -VDDP (Pn)] 2 = 1 / 2K [(Vdata (Pn) -VDDE (Pn)] 2

Where VDDP (Pn) = VDDE (P1) = VDDE (Pn))

As such, since the currents flowing through the OLEDs of the first and nth pixels P1 and Pn are the same during the emission period Tem, the high potential voltage drop due to the self-line resistance of the high potential voltage line VDDL is compensated for. can do.

As described above, the light emitting display device and the driving method thereof according to the present invention sample the threshold voltage of the third switching element, which is the driving switching element, during the program period. Accordingly, the light emitting display device and the driving method thereof according to the present invention can compensate for the difference in the threshold voltage of the third switching device because the third switching device generates a driving current according to the voltage stored in the capacitor. In addition, the light emitting display device and the driving method thereof according to the present invention can prevent the voltage drop of the high potential voltage by supplying the high potential voltage to the pixels arranged side by side in the horizontal direction through the same high potential voltage line.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

A light emitting display device for driving a plurality of pixels including a light emitting diode connected between a high potential voltage line and a low potential voltage line and a pixel driver for driving the light emitting diode divided into an initialization period, a program period, and an emission period. The pixel driver A capacitor connected between said high potential voltage line and a first node; A first switching element for supplying a high potential voltage to a second node during the light emitting period; A second switching element for supplying a data voltage to the second node during the program period; Diode-driven during the initialization period and the program period to discharge the previous data voltage stored in the capacitor during the initialization period, charge the current data voltage to the capacitor during the program period, and charge the capacitor during the emission period. A third switching element for generating the driving current according to a current data voltage; A fourth switching element connecting the gate terminal and the drain terminal of the third switching element during the initialization period and the program period; A gate terminal and a source terminal are connected to each other by the fourth switching device during the initialization period and the program period, and are driven in an inverted diode manner to supply driving current generated from the third switching device to the light emitting diode during the light emitting period. A fifth switching element; And a sixth switching element configured to supply an initialization voltage to the first node during the initialization period. The method of claim 1, The first switching element is switched by an emission control signal, the second and fourth switching elements are switched by a first selection signal, and the sixth switching element is switched by a second selection signal. Light emitting display device. The method of claim 1, And the pixels arranged side by side in the horizontal direction are connected to the same high potential voltage line. A plurality of pixels including a light emitting diode connected between a high potential voltage line and a low potential voltage line, and a pixel driver having first to sixth switching elements to drive the light emitting diode, are configured as an initialization period, a program period, and a light emission period. In the driving method of the light emitting display device to be divided and driven, During the initialization period, the third switching device operates in a diode manner through the fourth switching device, and supplies the gate voltage of the third switching device having the initialization voltage to the first node through the sixth switching device; ; During the program period, a data voltage is supplied to a second node through a second switching element, and the third switching element is diode-operated through a fourth switching element to be connected between the first node and the high potential voltage line. Storing a difference between the gate-source terminal voltage of the third switching element and the high potential voltage in an integrated capacitor; And supplying a driving current generated according to the voltage stored in the capacitor through the third switching element to the light emitting diode through the fifth switching element during the light emitting period. The method of claim 4, wherein The first switching element is switched by an emission control signal, the second and fourth switching elements are switched by a first selection signal, and the sixth switching element is switched by a second selection signal. A method of driving a light emitting display device. The method of claim 4, wherein And the pixels arranged side by side in the horizontal direction are connected to the same high potential voltage line.
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KR101525807B1 (en) * 2009-02-05 2015-06-05 삼성디스플레이 주식회사 Display device and driving method thereof
CN106997746A (en) * 2016-01-26 2017-08-01 株式会社日本显示器 Display device
WO2020114086A1 (en) * 2018-12-05 2020-06-11 京东方科技集团股份有限公司 Pixel circuit, pixel drive method, and display apparatus
WO2021088793A1 (en) * 2019-11-04 2021-05-14 Oppo广东移动通信有限公司 Compensation circuit for oled drive circuit, and display

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* Cited by examiner, † Cited by third party
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KR101525807B1 (en) * 2009-02-05 2015-06-05 삼성디스플레이 주식회사 Display device and driving method thereof
KR101360768B1 (en) * 2012-11-27 2014-02-10 엘지디스플레이 주식회사 Organic light emitting diode display device and method for driving the same
CN103839514A (en) * 2012-11-27 2014-06-04 乐金显示有限公司 Organic light emitting diode display device and method of driving the same
CN103839514B (en) * 2012-11-27 2016-03-02 乐金显示有限公司 Organic LED display device and driving method thereof
US9330603B2 (en) 2012-11-27 2016-05-03 Lg Display Co., Ltd. Organic light emitting diode display device and method of driving the same
CN106997746A (en) * 2016-01-26 2017-08-01 株式会社日本显示器 Display device
CN106997746B (en) * 2016-01-26 2019-07-23 株式会社日本显示器 Display device
WO2020114086A1 (en) * 2018-12-05 2020-06-11 京东方科技集团股份有限公司 Pixel circuit, pixel drive method, and display apparatus
US11132951B2 (en) 2018-12-05 2021-09-28 Mianyang Boe Optoelectronics Technology Co., Ltd. Pixel circuit, pixel driving method and display device
WO2021088793A1 (en) * 2019-11-04 2021-05-14 Oppo广东移动通信有限公司 Compensation circuit for oled drive circuit, and display

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