KR20080102538A - Flip chip type vertical light emitting device and manufacturing method thereof - Google Patents

Abstract

The present invention relates to a flip chip type vertical light emitting device. The flip chip type vertical light emitting device includes a sub-mount and a vertical light-emitting device bonded in an inverted state to solder bumps of the sub-mount. The sub-mount includes a conductive lower substrate, an anode lead formed under the conductive lower substrate, a plating thin film sequentially formed on the conductive lower substrate, a first solder reaction layer, and solder bumps. The vertical light emitting device includes an n-GaN layer, an active layer, and a p-GaN layer formed sequentially, and a metal reflective layer, a diffusion barrier layer, and a second solder reaction layer 252 are sequentially formed on the surface of the p-GaN layer. Irregular irregularities are formed on the surface of the n-GaN layer, and a cathode lead is formed on the surface of the n-GaN layer on which the irregularities are formed. A second solder reaction layer of the vertical light emitting device is bonded to the solder bumps of the submount.

The vertical light emitting device according to the present invention is formed on a sapphire substrate, the sapphire substrate is bonded on the submount and then removed using the LLO technique.

Description

Flip-chip type vertical light emitting device and manufacturing method thereof {Flip-chip type vertical light emitting device and method of fabricating the device}

1 is a cross-sectional view showing the structure of a conventional flip chip type light emitting device.

2 is a cross-sectional view illustrating the structure of a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention.

3 is a cross-sectional view sequentially illustrating a manufacturing process of a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention.

4 is a photograph of a state in which irregular irregularities are formed on a surface of an n-GaN layer in a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention.

FIG. 5 is a cross-sectional view illustrating flip chip type vertical light emitting devices in which two or more GaN thin films share one lower substrate as an anode according to another embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

20: flip chip type vertical light emitting device

b: submount

a: vertical light emitting device

270: conductive Si substrate

280: metal film for anode wire

272: plating thin film

260 solder reaction layer

262: solder bumps

210: n-GaN layer

220: active layer

230: p-GaN layer

240: metal reflective layer

250: diffusion barrier layer

252: solder reaction layer

212: uneven portion

202: metal film for cathode lead wire

The present invention relates to a flip chip type vertical light emitting device and a method of manufacturing the same. More specifically, the surface of the N-GaN surface is exposed and etched by removing the sapphire substrate using a laser lift off (LLO) technique. The present invention relates to a flip chip type vertical light emitting device having improved luminance by forming a cathode lead in the same, and a method of manufacturing the same.

White LEDs require more than a thousand lumens of light output, as well as improving the quality of white light. In order to obtain such a high output light emitting device, the device must be manufactured in consideration of variables such as increasing luminous efficiency, increasing device size, and lowering thermal resistance. In order to satisfy such conditions of a high output light emitting device, a flip-chip method is widely used.

Unlike conventional light emitting devices emitting light upwards, flip chip type light emitting devices (LEDs) emit light through a sapphire substrate.

1 is a cross-sectional view showing the structure of a conventional high power light emitting diode of a flip chip method. As shown in FIG. 1, in the flip-chip type high power light emitting diode 10, the light emitting diode 'a' is electrically and mechanically connected to the submount 'b' by the solder bumps 190, 192, and 194. In this way, the sapphire substrate 100 of the light emitting diode 'a' is configured to face upward. The light emitting diode 'a' sequentially forms the n-GaN layer 110, the active layer 120, and the p-GaN layer 130 on the sapphire substrate 100, and then the n-GaN layer 110, A portion of the active layer 120 and the p-GaN layer 130 are etched to expose a portion of the n-GaN layer 110. Next, a metal reflective layer 140 and a diffusion barrier layer 150 and a solder reaction layer 152 surrounding the reflective layer are formed on the surface of the p-GaN layer 130, and the exposed n-GaN layer 110 is formed. The diffusion barrier layer 150 and the solder reaction layer 152 are also formed on the surface.

In the submount 'b', an insulating film 170 and a patterned conductive film 180 are sequentially formed on the Si substrate 160, and a positive bonding pad (P) is formed in a predetermined region of the patterned conductive film 180. 182 and cathode bonding pads 184 are formed, respectively.

The n-GaN layer 110 of the light emitting diode 10 having the above-described structure is turned upside down, and the p-GaN layer 130 and the exposed n-GaN layer 110 of the light emitting diode are respectively inverted. The metal bumps of the submount 'b' are joined. At this time, between the p-GaN layer 130 and the metal bumps, a metal reflecting layer 140 having a high reflectivity is formed to increase light output, and the metal reflecting layer has p-GaN and ohmic characteristics in consideration of electrical characteristics. Electrical junction.

On the other hand, the diffusion barrier layer 150 and the solder reaction layer 152 is formed under the metal reflective layer 140 to protect the metal reflective layer, the lower portion of the bonding or reacting with the metal bump, an anode electrode or a cathode electrode Solder bumps 194 are formed. The current is applied to the light emitting diode through the above-described positive or negative bonding pad, and at this time, heat generated from the light emitting diode is transferred to the lower Si substrate and released to the lower heat sink.

While the conventional flip chip structure can emit heat generated by applying high current to the light emitting diode efficiently, in terms of the light output, the light due to the difference in refractive index between different materials at the sapphire surface and the interface between sapphire and n-GaN Escape angle of exists. Light that falls below this escape angle passes through the sapphire / GaN interface and is emitted to the outside, but light that falls toward the angle above the escape angle is totally reflected at the interface and is reflected back into the diode again, absorbing and disappearing again and again. do. To this end, irregularities are formed on the interface to prevent re-reflection by changing the propagation path by scattering, but this is possible by first forming irregularities on the sapphire substrate and then forming LEDs on these substrates. There is a limit to the degree of irregularities that can be produced.

Meanwhile, a vertical LED manufacturing technology in which a GaN LED substrate is fixed to a lower substrate, a sapphire substrate is removed, and wet etching of the exposed n-GaN is formed to form irregularities, is applied to heat the lower substrate. While emitting rapidly through, the irregularities formed on the n-GaN surface improves the efficiency of external light extraction. In this technique, a wafer bonding process is performed in which a reflective metal layer and a protective layer thereof are formed on p-GaN on an LED substrate, and a lower substrate is formed by thick electroplating Cu, or a high temperature and high pressure is applied to the lower substrate using a low melting film. need.

In particular, such a process requires a laser lift-off technique that removes only the sapphire substrate without damaging the GaN thin film. When the laser is irradiated, the absorption of the laser occurs at the sapphire / GaN interface. As a result, gallium nitride (GaN) is decomposed and gas is generated through the reaction of GaN-> Ga + 1/2 N ₂ form. It is separated between GaN interfaces, and the generated gas has a problem of inducing cracks by applying severe stress to the GaN thin film at the interface. In order to prevent crack formation, a method of fixing an LED substrate, which has been deeply etched to sapphire at a predetermined interval, on the lower substrate and then irradiating a laser is generally used. This method requires additional patterns and processes to pre-insulate this area in order to prevent degradation of the electrical properties that can be caused by p-GaN and n-GaN contacting the etched vertical wall. In addition, current vertical LED technology uses wafer bonding or electroplating in the state of LED wafer, and all of the pre-fabricated and developed processes are processed to 2 inches, which is the size of a conventional LED wafer, and thus, expensive manufacturing cost and product yield There is a problem with having a lot of loss.

SUMMARY OF THE INVENTION An object of the present invention for solving the above problems is to provide a flip chip type vertical light emitting device having improved heat dissipation effect and increased brightness.

Another object of the present invention is to provide a method of manufacturing a vertical light emitting device that can improve the productivity and manufacturing yield in comparison with the conventional process by utilizing a large area substrate rather than the 2 "process emerged in the conventional process. In particular, by additionally using pre-cut chips, we will provide the problems of LLO process, difficulty of LLO chip manufacturing process and improvement of production yield.

Another object of the present invention is to apply a front anode bump to increase the contact cross-sectional area with the bump, and to remove the sapphire portion by applying a laser lift-off, expose n-GaN, and then wet etching to form irregularities on the surface By applying the process, it is possible to provide a flip chip type vertical light emitting device having improved heat dissipation effect and increased luminance.

A feature of the present invention for achieving the above-described technical problem relates to a vertical type light emitting device of the flip chip method, and comprises a sub-mount, and a vertical light-emitting device bonded inverted to the solder bump of the sub-mount, The sub-mount includes a conductive lower substrate, an anode lead formed under the conductive lower substrate, a plating thin film sequentially formed on the conductive lower substrate, a first solder reaction layer, and a solder bump, and the vertical emission The device includes an n-GaN layer, an active layer, and a p-GaN layer formed sequentially, and a metal reflective layer, a diffusion barrier layer, and a second solder reaction layer 252 are sequentially formed on the surface of the p-GaN layer. Irregular irregularities are formed on the surface of the n-GaN layer, and cathode wires are formed on the surface of the n-GaN layer on which the irregularities are formed. 2, the solder layer is a reaction is characterized in that it is bonded to a solder bump of the sub-mount.

The vertical light emitting device having the above-mentioned characteristics may be formed on a sapphire substrate, and the sapphire substrate may be removed using an LLO technique after bonding on the submount.

According to another aspect of the present invention, a method of manufacturing a flip chip type vertical light emitting device is provided.

(a) fabricating GaN light emitting devices in individual chip states;

(b) manufacturing the submount,

(c) bonding the GaN light emitting devices fabricated in an individual chip state to the solder bumps of the sub-mount,

(d) removing sapphire of the bonded GaN light emitting device,

(e) etching the surface of the exposed n-GaN layer of the GaN light emitting device as the sapphire is removed to form uneven parts,

(f) forming a cathode metal film on the surface of the n-GaN layer on which the uneven portion is formed and patterning the cathode film.

The step (a) of manufacturing a GaN light emitting device of the method of manufacturing a vertical light emitting device having the above-described characteristics is

(a1) forming an LED wafer comprising an n-GaN layer, an active layer, and a p-GaN layer on a sapphire substrate, (a2) sequentially forming a metal reflective layer, a diffusion barrier layer, and a solder reaction layer on the LED wafer, and (a3) preferably separated into individual light emitting device chips.

Producing the (b) sub-mount of the method of manufacturing a vertical light emitting device having the above characteristics

(b1) preparing a lower substrate, (b2) sequentially forming a plating thin film, a solder reaction layer, and a solder bump on an upper portion of the lower substrate, and (b3) a metal for anode lead under the lower substrate. And depositing and patterning a film to form an anode lead, wherein the solder reaction layer is patterned in the same shape to match the solder reaction layer of the light emitting device chip, and the solder bumps are formed on the surface of the solder reaction layer. It is desirable to be.

Hereinafter, a structure and a manufacturing process of a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

2 is a cross-sectional view illustrating a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention. Referring to FIG. 2, the flip chip type vertical light emitting device 20 according to the preferred embodiment of the present invention is a vertical light emitting device ('a' of FIG. 2) on the entire sub-mount ('b' of FIG. 2). It is made of a structure that is bonded by the solder bump 290 in the inverted state.

The sub-mount ('b' in FIG. 2) is a conductive Si substrate 270, a metal film for anode wire 280 formed under the conductive Si substrate, and a plating thin film sequentially formed on the conductive Si substrate. 272, the solder reaction layer 260, and the solder bumps 262.

The vertical light emitting device ('a' in FIG. 2) bonded on the sub-mount includes an n-GaN layer 210, an active layer 220, and a p-GaN layer 230 sequentially formed, and the p-GaN On the surface of the layer 230, a metal reflective layer 240, a diffusion barrier layer 250 for protecting the metal reflective layer, and a solder reaction layer 252 reacting with the solder are sequentially formed.

Irregular irregularities are formed on the surface of the n-GaN layer 210, and a metal film 202 for a cathode conductor is formed in a predetermined region of the n-GaN layer 210 in which the irregularities are formed. The uneven portion 212 of the surface of the n-GaN layer 210 is formed after removing the sapphire substrate using the LLO technique.

The metal reflective layer 240 is formed on the surface of the p-GaN layer 230 and reflects light directed downward from the light generated by the active layer 220 of the light emitting device, and preferably includes Ag. High reflectance metal materials such as Al and Pt can be used. The conductive Si substrate 270 having the anode conductive metal film 280 formed thereunder serves as an anode.

Hereinafter, referring to FIG. 3, a manufacturing process of a flip chip type vertical light emitting device according to an exemplary embodiment of the present invention will be described sequentially.

First, referring to FIG. 3A, a light emitting device chip is prepared.

An LED wafer 208 including an n-GaN layer, an active layer, and a p-GaN layer is formed on the sapphire substrate 200, and a metal reflective layer 240, a diffusion barrier layer 250, and a solder reaction layer 252 are formed on the LED wafer. Are formed sequentially using a general semiconductor thin film process, and then separated into individual chips.

The metal reflective layer 240 has Ag as a main material for high reflectivity and includes a thin film for p-GaN and ohmic contact. As such a thin film, a metal or oxide material such as Ni, Pt, ITO, ZnO, or the like may be used, and any material known to form ohmic contact with p-GaN may be used. In addition, the formation of such a thin film can be generally formed by vacuum vapor deposition.

The diffusion barrier layer 250 is formed to have a larger area than the metal reflection layer so as to completely cover the metal reflection layer, and the material of the diffusion barrier layer is made of an alloy having excellent diffusion prevention ability such as TiW and TiCo, and may be formed by vacuum plasma deposition. Can be.

The solder reaction layer 252 is composed of a thin adhesive layer, a Cu or Ni layer, and an antioxidant layer. The antioxidant layer is composed of a thin Au film. The Cu or Ni layer may be formed by a vacuum deposition method, or may be formed by electroplating or electroless plating, and the thickness thereof is 1 μm or more.

After the thin film is formed, the wafer can be heat-treated for ohmic contact, and a sapphire substrate of 300 μm or more can be ground with a lapping machine to be thinned to about 100 μm, and scratches are formed between chips using a diamond tip or a laser. Along to break the sapphire substrate and separate it into individual light emitting device chips.

Next, referring to FIG. 3B, a submount is prepared.

The Si substrate is prepared as the lower substrate 270. The Si substrate is a conductive substrate having a low resistance, and its diameter is 2 inches or more.

A plating thin film 272, a solder reaction layer 260, and a solder bump 262 are sequentially formed on the lower substrate 270, and an anode lead is formed on the lower substrate 270. A metal film 280 is deposited.

The plating thin film 272 is deposited for electroplating, and is mainly formed of a material such as Al and Cu. The solder reaction layer 260 is composed of a thin adhesive layer, a thin Cu or Ni layer of 1 μm or more, and an anti-oxidation layer. The solder bumps 262 are formed by electroplating in a pattern that matches the solder reaction layer on the individual light emitting device chips. Solder bumps can be formed by applying solder paste by stencil printing rather than electroplating. The formed solder bumps may be heat treated in a reflow machine to form elliptical bumps, and flux may be applied for the heat treatment. In order to reduce the thickness of the substrate on which the solder bumps are formed, lapping is performed like the LED chip, and the metal film 280 for the anode wire is deposited on the lower surface.

Referring to FIG. 3C, a light emitting device chip is bonded on the submount. At this time, the manufactured light emitting device chip is placed on the solder bump 262 of the lower substrate in an inverted position, and when the solder reflows to a temperature above the melting point of the solder, the upper chip is self-aligned due to the surface tension of the molten solder. Will be

Referring to FIG. 3D, the sapphire substrate of the light emitting device chip is removed by an LLO method of irradiating a laser. Compared to the LLO process at the wafer stage, the LLO can be individually applied to a small area of sapphire to reduce stress and crack generation.

Referring to (e) of FIG. 3, the sapphire substrate of the light emitting device chip is removed, and Ga particles remaining on the exposed n-GaN surface are etched with a weak acid or removed by dry etching, and then the cathode lead is removed using a photolithography process. Form. The substrate is immersed in a KOH solution to form uneven portions by etching on the exposed n-GaN surface. At this time, the temperature of the KOH solution is possible to form irregularities about 80 ~ 100 ℃. In addition, after the unevenness is formed, it is also possible to form the cathode lead. Figure 4 shows an example of the unevenness applied in the present invention by an electron micrograph showing the uneven portion formed on the n-GaN surface when soaked for about 10 minutes in 1M KOH solution at a temperature of about 85 ℃.

Next, referring to FIG. 3 (f), the substrate on which the cathode lead is formed is cut into a high speed wheel saw to make an individual chip, thereby manufacturing a flip chip type vertical LED to which LLO is finally applied.

5 is another example of the flip chip LED realized by the process of the present invention, and by cutting two or more chip units, the chip can be mounted at a high density in a limited package space.

Although the present invention has been described above with reference to preferred embodiments thereof, this is merely an example and is not intended to limit the present invention, and those skilled in the art do not depart from the essential characteristics of the present invention. It will be appreciated that various modifications and applications which are not illustrated above in the scope are possible. For example, in the embodiment of the present invention, the structure of the individual light emitting device chips may be variously modified to improve the performance of the LED. And differences relating to such modifications and applications should be construed as being included in the scope of the invention defined in the appended claims.

According to the present invention, it is possible to realize a high brightness LED by presenting a method of more easily realizing a high brightness chip manufacturing process of the vertical LED type. In addition, the present invention enables the introduction of a Si substrate of 2 inches or more, thereby increasing the output of high-brightness LEDs, thereby lowering the production cost of the product.

On the other hand, the conventional vertical LED is limited to the process of the wafer size of 2 inches by performing the wafer bonding, while in the manufacturing process according to the present invention because the chip is bonded separately through the self-alignment effect of the solder, the lower substrate It is not limited to the size of 2 inches, there is an advantage that can proceed to a large area of the lower substrate of the larger size.

And, unlike the existing process that needs to work on a wafer basis, the present invention is separated and bonded into individual chips, so that the poor chip, which is not well grown on the LED wafer, or the damaged part of the chip is primarily selected and removed. There is an advantage that only the normal chips can be selected and bonded.

Similarly, in the manufacturing process according to the present invention, since the laser is irradiated and lift-off only to the sapphire of the portion corresponding to the chip area, the stress applied to the GaN thin film is reduced.

Claims (10)

(a) fabricating GaN light emitting devices in individual chip states; (b) manufacturing the submount; (c) bonding the GaN light emitting devices fabricated in an individual chip state to the solder bumps of the submount; (d) removing sapphire of the bonded GaN light emitting device; (e) etching the surface of the exposed n-GaN layer of the GaN light emitting device as the sapphire is removed to form an uneven portion; (f) forming a cathode conductive metal film on the surface of the n-GaN layer on which the uneven portion is formed and patterning to form a cathode conductive wire A flip chip type vertical light emitting device manufacturing method comprising a. The method of claim 1, wherein the manufacturing of the (a) GaN light emitting device is (a1) forming an LED wafer comprising an n-GaN layer, an active layer, and a p-GaN layer on a sapphire substrate, (a2) sequentially forming a metal reflective layer, a diffusion barrier layer and a solder reaction layer on the LED wafer, and (a3) separating the individual light emitting device chips Method of manufacturing a flip chip type vertical light emitting device, characterized in that consisting of. The method of claim 1, wherein (b) manufacturing the submount (b1) preparing a lower substrate, (b2) sequentially forming a plating thin film, a solder reaction layer, and a solder bump on the lower substrate, and (b3) forming an anode lead by depositing and patterning a metal film for anode lead under the lower substrate. Flip chip type vertical light emitting device manufacturing method characterized in that consisting of. The method of claim 3, wherein in the step (b2), the solder reaction layer is patterned in the same shape to match the solder reaction layer of the light emitting device chip, wherein the solder bump is formed on the surface of the solder reaction layer Flip chip type vertical light emitting device manufacturing method. The method of claim 2, wherein in the step (a3), the method further comprises separating and removing the defective chips after separating them into individual light emitting device chips. The method of claim 3, wherein in the step (b1), the lower substrate uses a large area substrate of 2 inches or more. Submount; And A vertical light emitting device bonded in an inverted state to the solder bumps of the sub-mount, The sub-mount includes a conductive lower substrate, an anode lead formed under the conductive lower substrate, a plating thin film sequentially formed on the conductive lower substrate, a first solder reaction layer, and solder bumps. The vertical light emitting device includes an n-GaN layer, an active layer, and a p-GaN layer formed sequentially, and a metal reflective layer, a diffusion barrier layer, and a second solder reaction layer 252 are sequentially formed on the surface of the p-GaN layer. It is Irregular irregularities are formed on the surface of the n-GaN layer, and a cathode lead is formed on the surface of the n-GaN layer on which the irregularities are formed. And a second solder reaction layer of the vertical light emitting device is bonded to the solder bumps of the sub-mount. 8. The flip chip type vertical type of claim 7, wherein the vertical light emitting device is formed on a sapphire substrate, and the sapphire substrate is bonded to the submount and then removed using an LLO technique. Light emitting element. The flip chip type vertical light emitting device of claim 7, wherein the at least two vertical light emitting devices are bonded on one sub-mount to share one lower substrate as an anode. The flip chip type vertical light emitting device of claim 7, wherein the conductive lower substrate of the sub-mount is an Si substrate having electrical conductivity.

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