KR20070078191A - Photo device epilayer structure of lattice-matched ingaas/ingaasp multiple-quantum-well structure by high-energy ion implantation and method for fabricating the same - Google Patents

Abstract

A photo device epitaxial layer of a lattice-matched InGaAs/InGaAsP multiple-quantum-well structure and a method of manufacturing the same are provided to maximize the wavelength shift of band gap by optimizing a quantum well intermixing process. An n-InP lower cladding layer is formed on a substrate. An active layer is formed on the n-InP lower cladding layer. The active layer is composed of InGaAs well layers and InGaAsP barrier layers alternately stacked each other. A p-InP upper cladding layer and an InGaAs electrode layer are sequentially formed on the resultant structure. An InP protection layer is formed on the InGaAs electrode layer to prevent the contamination of an upper surface of the InGaAs electrode layer and the generation of vacancy due to the deviation of Ga from the InGaAs electrode layer.

Description

Photo epitaxial structure of lattice-matched InGaAs / InGaAsP multiple-quantum-well structure by high-energy ion implantation and method for fabricating the same}

1 is a cross-sectional view showing an epitaxial layer structure of a P-i-N InGaAs / InGaAsP multi-quantum well structure according to the present invention,

2 is a block diagram showing a process of the manufacturing method according to the present invention,

3 to 6 are views for explaining the present invention, Figure 3 is a graph showing the distribution of the ion implantation depth and vacancy calculated as a function of the depth from the epitaxial layer surface using SRIM 2000,

4 is a graph showing the PL peak wavelength measured as a function of heat treatment time in an Ar atmosphere at 675 ° C. using a sample covered with Si _x N _y deposited by PECVD.

5 is a graph showing the change in PL peak wavelength measured according to the type of dielectric covering the sample in a sample heat-treated for 9 minutes in an Ar atmosphere of 675 ℃,

FIG. 6 is a graph showing normalized PL spectra measured as a function of heat treatment temperature in an Ar atmosphere of 675 ° C. to 775 ° C. for 9 minutes using a sample covered with SiO _x deposited by PECVD.

The present invention relates to an epitaxial film layer for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure by high energy ion implantation, and more particularly, to maximize bandgap wavelength shift due to high energy ion implantation. An epitaxial thin film layer for an optical device having an InGaAs / InGaAsP multiple quantum well structure, and a method for manufacturing an epitaxial thin film layer capable of obtaining a bandgap wavelength shift of at least 100 nm by optimizing a quantum well mixing process such as optimization of ion implantation and heat treatment processes.

The single integration of optoelectronic devices plays a key role in implementing low cost and high performance devices with the ability to revolutionize the communications industry.

In particular, the monolithic integration of several optical functional devices is currently very feasible and known as the only way to revive the optical component industry.

In today's technology, light generation and detection, modulation and switching, and transmission on a chip play a major role in reducing costs, but a new generation of high performance photonic integrated circuits, which are small in size and power consumption; It is true that PIC) is required.

Most optoelectronic devices used in the field are individual devices, and in fact, several individual devices having different functions are interconnected by optical fibers to perform one special task.

However, when the system is constructed in this way, it is difficult to connect or disconnect the light to each individual chip, and there is a disadvantage that a large cost is required to individually package each device.

In order to reduce the mounting cost, a copackaging method of integrating individual optoelectronic chips into the same chip must be used.

However, the optical coupling problem persists in device-to-device, and if the optoelectronic devices are integrated on a single chip, there is a high possibility that the optical coupling problem is completely eliminated.

Moreover, the single integration potential of high-functional devices is opening up new avenues for the application of Wavelength Division Multiplexing (WDM), an ultrafast ultra-capacity optical transmission.

Up to now, a method in which multiple devices can be formed on the same chip with a common manufacturing process is provided by offset quantum wells, butt-joint regrowth, selective region growth, and quantum well intermixing. Several methods have been studied.

Among these methods, quantum well mixing is a technology that is suitable for manufacturing a large number of devices, that is, having a large potential of large area single integration.

Integrating multiple optoelectronic or waveguide photonic devices into a single specimen requires the creation of different areas on the specimen with different photoelectric characteristics, such as absorption wavelength, refractive index, and material resistance. Compared to the technique using the quantum limiting stark effect, it is much easier to study the current technology because of the advantage that the conversion of the local energy bandgap and the refraction coefficient is large.

Representative techniques that have been developed over the years to achieve selective intermixing include impurity-induced disordering (IID) and impurity induced by space without impurities. Free Vacancy-Enhanced Disordering (IFVD), Photoabsortion-Induced Disordering (PAID), and Implant-Enhanced Disordering (IED).

Among them, IED technique [S. Charbonneau, P. Poole, Y. Feng, G. Aers, M. Dion, M. Davies, R. Goldberg, and I. Mitchell, "Band-gap tuning of InGaAs / InGaAsP / InP laser using high energy ion implantation," Appl . Phys. Lett., Vol. 67, pp. 2954-2956 (1995).] Rely on point defects generated during implantation of ions to diffuse into the quantum well (QW) region during heat treatment.

This method has a very good spatial resolution and can be controlled using annealing time, annealing temperature, and implant dose. In the ion implantation process, a wide range of ion implantation energy from several MeV to several tens of keV is used. Are used.

Until now, ion implantation has been used to fabricate laser diodes of single wavelength or integrated devices of laser diodes and optical modulators.

At this time, the wavelength of the band edge should be carefully adjusted to obtain the optimal function of the optical integrated circuit.

In particular, in order to integrate several individual devices on the same substrate, the bandgap wavelength must be shifted by at least 100 nm.

However, in the known prior art as in the above cited reference, the process for maximizing the wavelength shift is not optimized.

Accordingly, the present invention has been made in consideration of the above-described aspects, and an epitaxial layer for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure capable of maximizing bandgap wavelength shift due to high energy ion implantation, and multi-quantum It is an object of the present invention to provide an epitaxial thin film manufacturing method capable of obtaining a bandgap wavelength shift of at least 100 nm by optimizing a quantum well mixing process such as optimizing ion implantation and heat treatment for a well substrate.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

The present invention, an n-InP lower cladding layer on the substrate, an active layer consisting of an alternately stacked InGaAs well layer and InGaAsP barrier layer on top of the n-InP lower cladding layer, the p-InP upper cladding layer and the upper side A lattice-matched InGaAs / InGaAsP multi-quantum well structured epitaxial layer for an optical device comprising an InGaAs electrode layer of

An InP protective layer may be formed on the InGaAs electrode layer to prevent Ga from escaping from being formed in the InGaAs electrode layer during surface contamination prevention and heat treatment.

Here, the InP protective layer is characterized in that formed in a thickness of 100nm ~ 200nm.

In addition, the active layer is characterized by consisting of seven InGaAs well layer of 4nm thickness and six InGaAsP (1.3Q) barrier layer of 10nm thickness.

In addition, the upper cladding layer is composed of two regions having different thicknesses, the lower first upper cladding layer doped with a doping concentration of Zn: 5 × 10 ¹⁷ cm ⁻³ , and Zn: ≧ 1 × 10 ¹⁸ cm ⁻ The upper cladding layer is formed to attenuate the extent to which the second upper cladding layer doped with a doping concentration of ³ diffuses into the undoped region during Zn heat treatment.

On the other hand, the present invention, (a) the n-InP lower cladding layer, the InGaAs well layer and the InGaAsP barrier layer is formed by alternately stacking the active layer, the p-InP upper cladding layer and the upper InGaAs electrode layer formed on the substrate in order 1. A method of manufacturing an epitaxial layer for an optical device having a lattice-matched InGaAs / InGaAsP multi-quantum well structure comprising the steps of:

(b) forming an InP protective layer thereon after forming the InGaAs electrode layer;

(c) performing ion implantation on the multi-quantum well substrate prepared as described above;

(d) forming a dielectric cover layer over the InP protective layer;

(e) performing heat treatment on the multiple quantum well substrate on which the dielectric cover layer is formed;

Characterized in that it comprises a.

Here, the InP protective layer is characterized in that formed to a thickness of 100nm ~ 200nm.

Further, the upper cladding layer is a lower first upper cladding layer doped with a doping concentration of Zn: 5 × 10 ¹⁷ cm ⁻³ , and an upper first doped with Zn: ≧ 1 × 10 ¹⁸ cm ⁻³ . By separating and forming the two upper cladding layer to attenuate the extent to which Zn diffuses into the undoped region during heat treatment.

In addition, in step (c), the ion species to be injected is characterized in that the P ion.

Further, in the step (c), it is characterized in that the ion implantation conditions in which both the amount of ions injected into the active layer and the distribution of the generated vacancy is 0 so that the active layer damage by the ion implantation does not occur.

In addition, as the ion implantation conditions of step (c), P ions are implanted at an ion implantation dose of 5 × 0 ¹⁴ cm ⁻³ at an energy of 1MeV.

In addition, in step (c), in order to minimize ion channeling, the multi-quantum well substrate is inclined at 7 ° on the (100) axis, characterized in that the ion implantation is performed.

In addition, in step (c), the temperature of the multiple quantum well substrate is maintained at 200 ° C. during ion implantation.

In the step (d), the SiO _x thin film or the Si _x N _y thin film is deposited on the dielectric cover layer.

In addition, in the step (e), the multi-quantum well substrate on which the dielectric cover layer is formed is heat-treated for 7 minutes to 12 minutes in a temperature range of 675 ℃ ~ 775 ℃.

Preferably, the multiple quantum well substrate on which the dielectric cover layer is formed is heat-treated for 9 minutes at a temperature of 775 ° C.

Hereinafter, the present invention will be described in more detail with reference to the accompanying drawings.

The present invention relates to an epitaxial thin film layer for an optical device having an InGaAs / InGaAsP multi-quantum well structure by high energy ion implantation, and a method of manufacturing the same. The present invention relates to an epitaxial thin film layer manufacturing method capable of obtaining a bandgap wavelength shift of at least 100 nm by optimizing an epitaxial thin film layer structure and quantum well mixing processes such as optimization of ion implantation and heat treatment processes.

The present inventors have completed the present invention by studying the correlation between the heat treatment time and temperature, the wavelength shift according to the sample cover during the heat treatment, and the technique of suppressing thermally induced wavelength shift other than ion implantation at high temperature. .

As is well known, intermixing of multiple quantum wells (MQWs) has been used to fabricate laser structures with multiple wavelengths on a single wafer by shifting the gain distribution of the grown material.

The present invention is to inject high energy phosphorous ions to increase the diffusion of thermally generated quantum wells and barrier materials in the InP-based 1527nm laser structure, and InGaAs electrode layer (cap By growing an InP protective layer having a predetermined thickness on the electrode layer to prevent contamination of the sample (multi-quantum well substrate) during the process, and suppressing the escape of Ga from the InGaAs electrode layer during the heat treatment and the formation of vacancy. There is a main characteristic on the back.

1 is a detailed cross-sectional view of an epitaxial film layer structure according to the present invention. Hereinafter, the epitaxial film layer structure according to the present invention will be described with reference to the following.

The epitaxial layer of the present invention uses a lattice-matched InGaAs / InGaAsP multi-quantum well structure, and is a component using a metal-organic chemical vapor deposition method (hereinafter referred to as MOCVD) on a substrate. Each layer to be grown can be formed.

FIG. 1 shows a preferred embodiment configuration of the present invention grown on S-doped InP substrates ((100) -oriented n ⁺ -type InP substrates) using a MOCVD reactor.

In the configuration, an n-InP lower cladding layer, a lower confinement layer, and an InGaAs well layer, each of which is divided into a first lower cladding layer and a second lower cladding layer, immediately above the substrate. active layer, upper confinement layer, buffer layer, and etch stop layer formed by stacking at least one pair in a pair of wells and InGaAsP (1.3Q) barrier layers. an etch stop layer, a p-InP upper cladding layer, an InGaAs cap electrode layer, and an InP protection layer, which are separated into a first upper cladding layer and a second upper cladding layer, are sequentially grown. It is a structure made.

More specifically, in order to form the epitaxial layer structure of the preferred embodiment, 200 nm thick n-InP cladding as the first and second lower cladding layers on the S-doped InP substrate (> 2 × 10 ¹⁸ cm ⁻³ ). layer (≥1 × 10 ¹⁸ cm ^-3) with a 800nm thick n-InP cladding layer (5 × 10 ¹⁷ cm ^-3) was grown in turn, above the 120nm thick _{i-in 0 .74 Ga 0 .26} as _{0 .57} P _{0 .43} sikimyeo growing a bottom confinement layer, so that on the _{i-in 0.74 Ga 0.26 as 0.57} P 0.43 barrier layers six mutually alternating in the i-InGaAs well layers 7 and one of 10nm thickness 4nm thickness as the active layer repetition of, after growing, 120nm thick _{i-in 0.74 Ga 0.26 As 0.57} P 0.43 the upper confinement layer, a 60nm thick p-InP buffer layer, and a 20nm thick _{p-in 0 .74 Ga 0 .26} As 0 .57 P 0 _{.43 An} etch stop layer was sequentially grown, followed by an 800 nm thick p-InP cladding layer (Zn: 5 × 10 ¹⁷ cm ⁻³ ) and 200 nm thick p on the etch stop layer as the first and second upper cladding layers. -InP class Below dingcheung ^{(Zn: ≥1 × 10 18 cm} -3) was grown following the turn, back to the top of a 200nm thick _{^{P + -In 0 .53 Ga 0 .47}} As the electrode layer ^{(> 2 × 10 19 cm -3} ) and It is formed by sequentially growing a 100 nm thick p ⁺ -InP protective layer (> 2 x 10 ¹⁹ cm ^-3 ).

As described above, in the preferred embodiment of the present invention, the active layer of the multi-quantum well structure is composed of seven undoped doped 4nm-InGaAs well layers and six 10nm-InGaAsP (1.3Q) barrier layers.

The first upper cladding layer is doped with Zn at a doping concentration of Zn: 5 × 10 ¹⁷ cm ⁻³ , and the second upper cladding layer is doped with Zn at a doping concentration of Z ≧ 1 × 10 ¹⁸ cm ⁻³ . Thus, the first and second upper cladding layers are formed to form an upper cladding layer that attenuates the extent to which Zn is diffused into an undoped region during heat treatment of 675 ° C. or higher in a heat treatment process described later.

In order to prevent the InGaAs electrode layer from being contaminated in ion implantation, heat treatment, and other semiconductor laser manufacturing processes, an InP protective layer having a predetermined thickness is grown on the InGaAs electrode layer. In consideration of the process conditions of 100nm ~ 200nm is preferred.

In this case, when the thickness of the InP protective layer is less than 100 nm, the effect of suppressing the escape of Ga from the InGaAs electrode layer during the subsequent heat treatment and the formation of empty spaces is insufficient, and the thickness of the InP protective layer is too thin. It is not preferable because it is not suitable for protecting the sample surface in the well mixing process and the optical device manufacturing process.

In addition, when the thickness is formed to exceed 200 nm, it is not preferable because additional costs are inevitable in the epitaxial layer growth and ion implantation process in proportion to the thickness of the InP protective layer.

In the embodiment of FIG. 1, the thickness of the InP protective layer was set to 100 nm in consideration of heat treatment conditions thereafter.

As described above, in the structure of the present invention, by growing the InP protective layer on the InGaAs electrode layer, it is possible to prevent the sample (multi-quantum well substrate) from being contaminated in the process, and Ga escapes from the InGaAs electrode layer during the heat treatment. ) Can be suppressed, so that the thermal shift induced other than ion implantation can be suppressed to the maximum as described later.

Meanwhile, in the present invention, an InGaAs / InGaAsP multi-quantum well structure is formed on a substrate by MOCVD as described above, and then high energy ion implantation, dielectric cover layer deposition, and annealing are performed on the multi-quantum well substrate. As a result, a locally different band gap is formed on the substrate formed of the quantum well.

2 is a block diagram illustrating a process of the manufacturing method according to the present invention. First, the ion implantation process will be described below.

In InP-based quantum well structures, the degree of mixing is proportional to the number of point defects created in the material by ion implantation.

In addition, direct ion implantation into the wells dramatically reduces the photoluminescence (PL) intensity, which means that ion implantation creates nonradiative recombination centers that are not lost by heat treatment [S. Charbonneau, PJ Poole, Y. Feng, GC Aers, M. Dion, M. Davies, RD Goldberg, and IV Mitchell, "Band-gap tuning of InGaAs / InGaAsP / InP laser using high energy ion implantation," Appl . Phys. Lett ., Vol. 67, pp. 2954-2956 (1995).

In the present invention, it is advantageous for the point defects to be made closer to the quantum well (QW) in order to maximize the number of point defects contributing to the mixing process due to heat diffusion, so that instead of As, phosphorus (P) ions are produced at an energy of 1MeV. Selected to be injected.

SRIM 2000, JF Ziegler, Handbook of Ion Implantation Technology, 1st ed. (North-Holland, Amsterdam, 1992), Chap. 1, pp. 1-68.] Shows that the average implantation depth (range) expected when the phosphorus ion (P ⁺ ) is implanted into the epitaxial layer at 1MeV is 0.966㎛.

This ion implantation depth is much shorter than the active region of the epitaxial layer structure at 1.5 탆 below the surface.

3 shows the ion implantation range and induced vacancy distribution.

In the epitaxial layer structure of the present invention, since the active layer is located at 1500 nm (1.5 μm) from the surface, both the amount of ions injected into the active layer and the distribution of the generated space are zero (zero). It is expected that there will be no damage of the active layer.

In the ion implantation process according to the present invention, by injecting P ⁺ into the sample at an ion implantation of 5 × 0 ¹⁴ cm ⁻³ at an energy of 1MeV, vacancies, interstitials, and other defects ( Defects are created in the cladding layer, which is advantageous in that when phosphorus ions are used, additional dopings do not enter the laser structure.

The present inventors used 2.0 MV Tandem of NEC Co., Ltd. for high energy ion implantation of epitaxial thin film layer. In the present invention, during ion implantation, the sample is 7 ° on the (100) axis to minimize ion channeling effect. Tilt it up.

The temperature of the sample is then maintained at 200 ° C. during ion implantation to avoid the formation of defect aggregates that require higher diffusional activation energy.

Next, a dielectric cover layer is deposited on the surface of the ion implanted encapsulation substrate, that is, plasma enhanced chemical vapor deposition (PECVD) on the InP protective layer.

In this case, a Si _x N _y or SiO _x thin film may be deposited to a predetermined thickness, for example, a Si ₃ N ₄ or SiO ₂ thin film is deposited to a thickness of 300 nm.

Then, after ion implantation and dielectric cover layer deposition, annealing is performed to shift the bandgap wavelength to the multi-quantum well substrate. After the heat treatment is completed, the dielectric cover layer is removed.

Hereinafter, the heat treatment process of the substrate in the present invention will be described.

In the present invention, the heat treatment process may be performed using a rapid thermal annealer (RTA), and the quantum well structure substrate, which has completed ion implantation and deposition of a dielectric cover layer, is used for 7 minutes to 12 minutes in a temperature range of 675 ° C to 775 ° C. Conduct.

If the heat treatment process is performed below 675 ℃, the desired level of bandgap wavelength shift cannot be obtained due to the low heat treatment temperature. If the heat treatment is performed above 775 ℃, there is a problem that P is excessively released from the sample surface. , Not preferred.

In addition, when the heat treatment is performed in less than 7 minutes, there is a problem that it is difficult to obtain a bandgap wavelength shift of 100 nm or more, and as shown in FIG. 4, since the PL peak wavelength is saturated after the heat treatment time of 7 minutes, the heat treatment is performed for 7 minutes or more. It is preferable.

In addition, when the heat treatment is carried out for more than 12 minutes, it is not preferable because the wavelength shifting effect is small compared to the increase in the heat treatment time, which is not preferable. The optimum heat treatment time is 9 minutes.

In order to derive the optimum conditions of the heat treatment process as described above, the present inventors first heat-treated the quantum well substrate before depositing the dielectric cover layer, P is removed from the surface of the sample when the heat treatment for 1 minute at 675 ℃ in Ar atmosphere Traces left were identified under a microscope.

In order to prevent out-diffusion of P from the surface of the sample, a dielectric cover layer of Si _x N _y or SiO _x is deposited on the surface of the quantum well substrate by PECVD, and then heat-treated.

During the heat treatment, it is preferable to heat-treat the sample on an undoped silicon wafer so that the quartz sample holder of the RTA is not contaminated by P diffused externally from the substrate side.

Mixing at the boundary of multiple quantum wells (MQW) is created by point-defect-induced disordering and thermally induced disordering.

Point defects are generated by ion implantation and then diffused in the epitaxial layer structure during heat treatment, and this method provides the advantage of spatial selectivity in which the amount of ion implantation changes from one region of the sample to another using an appropriate ion implantation mask. To provide.

However, if the heat treatment temperature is too high, the thermal energy is sufficient to cause mixing even in the absence of point defects, which is an undesirable effect since there is no spatial control of the degree of mixing.

For InGaAs / InGaAsP multi-quantum well structures with a compressively strained active layer, the annealing temperature of 685 ° C corresponds to the highest annealing temperature that does not shift the PL spectrum of the non-ion implanted material [M. Paquette, J. Beauvais, J. Beerens, PJ Poole, S. Charbonneau, CJ Miner, and C. Blaauw, "Blue-shifting of InGaAsP / InP laser diodes by low-energy ion implantation," Appl . Phys. Lett . , vol. 71, pp. 3749-3751 (1997).]

Therefore, although 675 ° C. was selected as the heat treatment temperature in the present invention, the lattice matched quantum well structure is known to be thermally stable compared to the strain structure, and thus heat treatment is possible at a higher temperature.

Figure 4 shows the change in the room temperature PL peak wavelength measured as a function of the heat treatment temperature, the heat-treated sample was etched to the upper cladding layer is ion implanted for PL measurement, the PL spectrum was measured at room temperature.

Referring to FIG. 4, the PL wavelength measured in the sample without ion implantation is 1527 nm, and as the heat treatment time increases, the PL wavelength rapidly shifts to a short wavelength, and then the wavelength shift is saturated in a section about 9 minutes before and after the heat treatment time. Can be.

The blue shift increases linearly as the vacancy front moves past the quantum well (QW) region, and once the space front passes through the quantum well region, the blue shift stops, so the PL wavelength It tends to be saturated.

Therefore, the vacancy seems to move through the entire device structure to the n-type substrate.

When the heat treatment time is 12 minutes, the maximum wavelength shift Δλ is 113 nm because the PL wavelength is 1414 nm.

FIG. 5 shows PL wavelengths measured at room temperature in the absence of a dielectric covering layer in a condition that no external diffusion occurs during heat treatment and in the presence of a dielectric covering layer of Si _x N _y and SiO _x thin films deposited by PECVD.

The Ar gas pressure of the RTA chamber was 420 Torr in the presence of Si _x N _y and SiO _x , whereas it was 590 Torr without the cover, and the sample heat-treated at 590 Torr was confirmed by the microscope that phosphorus did not leak out.

And the heat processing temperature and time were all fixed at 675 degreeC and 9 minutes.

The results of FIG. 5 show that the bandgap due to thermally-induced disordering is because the PL wavelengths in the absence of the dielectric covering layer and in the case of the dielectric covering layer of SiO _x are almost equal to 1426 nm and 1417 nm, respectively. It can be seen that the shift of wavelength rarely occurs.

This is believed to be because Ga in the InGaAs electrode layer cannot escape even when there is no dielectric cover layer by the 100 nm thick InP protective layer on the InGaAs electrode layer in the epitaxial layer structure of the present invention.

From the above results, it can be seen that the maximum bandgap wavelength change that can be obtained regardless of the type and presence of the dielectric cover layer is about 110 nm when the heat treatment is performed for 9 minutes at 675 ° C. Need to be increased.

Figure 6 shows the PL spectrum measured at room temperature as a function of heat treatment temperature.

A 300 nm thick SiO ₂ thin film was deposited on the InP protective layer using PECVD at 250 ° C., and then heat treated at an interval of 50 ° C. from 675 ° C. to 825 ° C. when the operating pressure of the chamber was 422 Torr in argon (Ar) atmosphere. In this case, the heat treatment time was fixed to 9 minutes.

First, at 825 ° C, all phosphorus was released from the sample heat-treated for 9 minutes, and only In remained. Therefore, in order to perform heat treatment at this temperature or higher, a new condition must be found.

The PL spectrum was measured with the InP cladding layer etched.

6, the intensity of PL is the largest in the as-grown sample and the smallest in the sample heat treated at 675 ° C.

In addition, the PL strength gradually increased as the temperature was increased, and the untreated heat-treated sample was about 20 times larger than the heat-treated sample at 675 ° C even though the InP cladding layer was measured without etching.

It is interpreted that the sample heat-treated at 675 ° C. is severely damaged by ion implantation, and thus the PL intensity is reduced and the PL spectrum is not smooth.

Supporting this is the result that the spectrum of the sample heat-treated at 725 ℃ or more in Figure 6 is smooth and the PL intensity is increased.

It can be seen that the damage caused by ion implantation is reduced by recrystallization when the heat treatment temperature is higher than 725 ° C., and thus the non-luminescent recombination centers generated by ion implantation disappear when heat treated at 725 ° C. for 9 minutes.

Meanwhile, the bandgap wavelength shift of the sample heat-treated at 775 ° C. for 9 minutes was 140 nm, which is about 30 nm more blue shifted than the wavelength measured at 675 ° C. FIG.

It is meaningful that this result is compared to wavelength shifts shifted only to thermal disorders created without ion implantation.

When the InGaAs / InGaAsP multi-quantum well structure is covered with 150nm thick PECVD SiO ₂ thin film and then heat treated at 775 ° C for 30 seconds, the wavelength shift becomes more than 200nm [Hyun-Soo Kim, Jeong Woo Park, Dae Kon Oh, Kwang Ryong Oh, Sung June Kim, and In-Hoon Choi, "Quantum well intermixing of In _{1 - x} Ga _x As / InP and In _{1 - x} Ga _x As / In _{1 - x} Ga _x As1-yP _y muliple-quantum-well structures by using the impurity-free vacancy diffusion technique, "Semicon. Sci. Technol. 15, pp. 1005-1009 (2000)]

Therefore, the present invention shows a result of about 7 times reduction in thermally generated wavelength shift.

For this reason, in this reference, because the SiO ₂ thin film is directly above InGaAs, Ga ₂ O ₃ is formed at a high temperature, a lot of Ga vacancies are generated and diffused into the multi-quantum well (MQW) region, so that the band gap shift is caused. Big.

In the present invention, on the other hand be a Ga in the InGaAs electrode layer decreases the chance that the Ga ₂ O ₃ generated by combining with oxygen in SiO ₂ since the InP protective layer of 100nm thickness between the SiO ₂ deposited by InGaAs layer and PECVD Therefore, Ga vacancies generated in the epitaxial film layer are interpreted to be relatively reduced.

As a result, there was obtained an effect that the thermal shift induced wavelength shift can be suppressed by the InP protective layer.

In addition, when the heat treatment temperature is 725 ℃, the wavelength shift is within 10 nm compared with the result of 675 ℃ and is suitable for the fabrication of optical devices because the damage caused by ion implantation is greatly reduced.

Thus, according to the present invention, an epitaxial film layer for an optical device having an InGaAs / InGaAsP multi-quantum well structure capable of maximizing bandgap wavelength shift due to high energy ion implantation, and a quantum well mixing process such as optimization of ion implantation and heat treatment processes It is possible to provide a method for manufacturing an epitaxial thin film layer that can be obtained by optimizing the bandgap wavelength shift of at least 100nm or more.

As described above, according to the present invention, an epitaxial film layer for an optical device having an InGaAs / InGaAsP multi-quantum well structure capable of maximizing bandgap wavelength shift due to ion implantation, and a quantum well mixing process such as optimization of ion implantation and heat treatment processes By optimizing the present invention, it is possible to provide a method for manufacturing an epitaxial layer which can obtain a bandgap wavelength shift of at least 100 nm or more.

Optimization conditions for maximizing bandgap wavelength shift according to the present invention are suitable for integrating a large number of individual devices on a single chip. The wavelength can be shifted up to 140nm depending on the heat treatment temperature and conditions, making it easy to apply to the fabrication of a single integrated optical circuit. Development of a single integrated optical circuit according to the present invention can facilitate the implementation of low-cost and high-function devices that can revolutionize the optical communication industry, it is possible to greatly contribute to the development of the overall optical component industry.

Claims (15)

An n-InP lower cladding layer on the substrate, an active layer consisting of an alternately stacked InGaAs well layer and an InGaAsP barrier layer on top of the n-InP lower cladding layer, a p-InP upper cladding layer, and an InGaAs electrode layer on top thereof An epitaxial thin film layer for an optical device having a lattice-matched InGaAs / InGaAsP multi-quantum well structure comprising: A lattice matched InGaAs / InGaAsP multi-quantum well structure, wherein an InP protective layer is formed on the InGaAs electrode layer to prevent Ga from escaping from the surface of the InGaAs electrode layer and to prevent vacancy. Epitaxial layer for optical devices. The method according to claim 1, The InP protective layer is an epitaxial film layer for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure, characterized in that formed in a thickness of 100nm ~ 200nm. The method according to claim 1, The active layer comprises a lattice matched InGaAs / InGaAsP multiple quantum well structure optical epitaxial layer, characterized in that the active layer is composed of seven InGaAs well layer of 4nm thickness and six InGaAsP (1.3Q) barrier layer of 10nm thickness. The method according to claim 1, The upper cladding layer is composed of two regions having different thicknesses, the lower first upper cladding layer doped with a doping concentration of Zn: 5 × 10 ¹⁷ cm ⁻³ , and Zn: ≧ 1 × 10 ¹⁸ cm ⁻³ . A lattice matched InGaAs / InGaAsP multi-quantum well structure wherein the upper cladding layer doped with a doping concentration forms the upper cladding layer to attenuate the diffusion of Zn into the undoped region during heat treatment. Epitaxial layer for optical devices. (a) a lattice comprising sequentially forming an n-InP lower cladding layer, an InGaAs well layer and an InGaAsP barrier layer alternately stacked on top of each other, an active layer, a p-InP upper cladding layer, and an InGaAs electrode layer on top thereof; 1. A method of manufacturing an epitaxial layer for an optical device having a matched InGaAs / InGaAsP multi-quantum well structure, (b) forming an InP protective layer thereon after forming the InGaAs electrode layer; (c) performing ion implantation on the multi-quantum well substrate prepared as described above; (d) forming a dielectric cover layer over the InP protective layer; (e) performing heat treatment on the multiple quantum well substrate on which the dielectric cover layer is formed; A method of manufacturing an epitaxial thin film layer for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure, comprising: a. The method according to claim 5, The InP protective layer is formed in a thickness of 100nm ~ 200nm lattice matched InGaAs / InGaAsP multi-quantum well structure optical device epitaxial film layer manufacturing method. The method according to claim 5, The upper cladding layer is a lower first upper cladding layer doped with a doping concentration of Zn: 5 × 10 ¹⁷ cm ⁻³ and a second upper part doped with a doping concentration of Zn: ≧ 1 × 10 ¹⁸ cm ⁻³ A method of manufacturing an epitaxial thin film layer for an optical device having an InGaAs / InGaAsP multi-quantum well structure, characterized by dividing and forming a cladding layer to attenuate the diffusion of Zn into an undoped region during heat treatment. The method according to claim 5, In the step (c), the implanted ion species is characterized in that the P ion, lattice matched InGaAs / InGaAsP multi-quantum well structure optical device epitaxial film layer manufacturing method. The method according to claim 5, In step (c), the lattice matched InGaAs is performed under ion implantation conditions in which both the amount of ions injected into the active layer and the distribution of generated vacancy become 0 so that the active layer is not damaged by ion implantation. A method of manufacturing an epitaxial thin film layer for an optical device having a multi-quantum well structure. The method according to any one of claims 5, 8 and 9, As the ion implantation condition of the step (c), the lattice matched InGaAs / InGaAsP multiple quantum well structure is characterized in that the P ion is implanted at an ion implantation dose of 5 × 0 ¹⁴ cm ⁻³ at an energy of 1MeV. Method for producing epi-film thin layer for self. The method according to claim 5, In the step (c), in order to minimize the ion channeling, the multi-quantum well substrate for the optical device of the lattice matched InGaAs / InGaAsP multi-quantum well structure characterized in that the ion implantation is performed by tilting 7 ° from the (100) axis Epi thin film manufacturing method. The method according to claim 5, In the step (c), the epitaxial film layer manufacturing method for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure characterized in that the temperature of the multi-quantum well substrate is maintained at 200 ℃ during ion implantation. The method according to claim 5, In the step (d), the lattice matched InGaAs / InGaAsP multi-quantum well structure epitaxial film manufacturing method of the epitaxial layer, characterized in that for depositing the SiO _x thin film or Si _x N _y thin film to the dielectric cover layer. The method according to claim 5, In the step (e), the lattice matched InGaAs / InGaAsP multi-quantum well structure, characterized in that for heat treatment for 7 to 12 minutes at a temperature range of 675 ℃ to 775 ℃ the multiple quantum well substrate on which the dielectric cover layer is formed Epi thin film layer manufacturing method for optical devices. The method according to claim 14, A method of manufacturing an epitaxial thin film layer for an optical device having a lattice matched InGaAs / InGaAsP multi-quantum well structure, wherein the multi-quantum well substrate on which the dielectric cover layer is formed is heat-treated at a temperature of 775 ° C. for 9 minutes.

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