KR20060108945A - Method of manufacturing thin film transistor and thin film transistor manufactured by the same - Google Patents

Abstract

A method for manufacturing a TFT(Thin Film Transistor) and the TFT manufactured thereby are provided to improve the bonding between an electrode and an insulating layer and to perform easily an electrode patterning process by using the irradiation of a laser beam. A gate insulating layer(13) is formed on a gate electrode(12). A bonding layer(14a) is formed on the gate insulating layer. A conductive layer(14b) is formed on the bonding layer. Source and drain electrodes spaced apart from each other are formed on the resultant structure by etching simultaneously the bonding layer and the conductive layer using a laser beam irradiation. A semiconductor layer for contacting the source and drain electrodes is formed on the resultant structure.

Description

Method of manufacturing thin film transistor and thin film transistor manufactured thereby

1 is a cross-sectional view schematically showing a conventional inverted coplanar thin film transistor.

2 is a cross-sectional view schematically showing another conventional inverted coplanar thin film transistor.

3A and 3B are cross-sectional views schematically illustrating a part of a manufacturing process of the thin film transistor illustrated in FIG. 2.

4A to 4C are cross-sectional views schematically illustrating a part of another manufacturing process of the thin film transistor illustrated in FIG. 2.

5A through 5C are cross-sectional views schematically illustrating processes by a method of manufacturing a thin film transistor according to an exemplary embodiment of the present invention.

6A and 6B are cross-sectional views schematically illustrating processes by a method of manufacturing a thin film transistor according to another exemplary embodiment of the present invention.

7 is a schematic cross-sectional view of a thin film transistor manufactured by a method of manufacturing a thin film transistor according to another exemplary embodiment of the present invention.

<Explanation of symbols for the main parts of the drawings>

11: substrate 12: gate electrode

13: gate insulating film 14a: junction layer

14b: conductive layer 15: source electrode / drain electrode

16: semiconductor layer 17: interlayer insulating film

The present invention relates to a method for manufacturing a thin film transistor and a thin film transistor manufactured by the same, and more particularly, to a method for manufacturing a thin film transistor, in which electrode patterning is facilitated while the bonding between the electrode and the insulating film of the thin film transistor is improved. It relates to a thin film transistor.

A typical thin film transistor (TFT) is a semiconductor layer having a source / drain region doped with a high concentration of impurities and a channel region formed between the source / drain region, and insulated from the semiconductor layer. And a gate electrode positioned in a corresponding region, and a source / drain electrode in contact with the source / drain region, respectively.

Such thin film transistors are used as switching elements or driving elements for controlling the operation of each pixel of a flat panel display device such as a liquid crystal display apparatus or an organic light emitting display apparatus. It is used in various fields such as a smart card, an electronic paper and a roll-up display. Since the common feature required for the thin electronic devices included in such a device is flexibility, the substrate having the thin film transistor is required to be a flexible substrate such as a plastic substrate. However, since these plastic substrates are poor in heat resistance and cannot be subjected to a high temperature process, researches on thin film transistors which are manufactured through low temperature processes and have excellent flexibility have recently been in the spotlight as such thin film transistors. An organic thin film transistor having a. The organic thin film transistor can be manufactured in a low temperature process and has the advantage of realizing a flexible thin film transistor having low manufacturing cost.

FIG. 1 is a schematic cross-sectional view of an inverted coplanar type thin film transistor among these organic thin film transistors. Referring to FIG. 1, a gate electrode 2 is provided on a substrate 1, and a gate insulating film 3 is provided to cover the gate electrode 2. A source electrode and a drain electrode 5 are provided on the gate insulating film 3, and a semiconductor layer 6 is provided in contact with the gate insulating film 3.

However, in the case of the organic thin film transistor having such a structure, gold (Au) as a material of the source electrode and the drain electrode 5 may be used for ohmic contact between the source electrode and the drain electrode 5 and the organic semiconductor layer 6. The same noble metal (Noble metal) is mainly used, the noble metal such as gold (Au) had a problem that the adhesion to the insulating film formed of a material such as silicon nitride or silicon oxide is not good.

In order to solve this problem, Korean Patent Laid-Open Publication No. 2003-3067 discloses, in order to improve the bonding property between the source electrode and the drain electrode 5 and the insulating film of SiO ₂ disposed thereunder, as shown in FIG. A thin film transistor having a source electrode and a drain electrode 5 having an electrode portion 5b formed of Pt) or the like and a junction portion 5a made of titanium (Ti) or the like is disclosed.

The source electrode and the drain electrode of the two-layer structure are formed by forming a bonding layer 4a and a conductive layer 4b on the gate insulating film 3 as shown in FIG. 3A and patterning them simultaneously through a photolithography process. In this case, the under cut causes the edge of the junction 5a of the source electrode and the drain electrode 5 to be more etched than the edge of the upper electrode portion 5b, as shown in FIG. 3B. There was a problem that would cause a defect.

In order to solve this problem, a manufacturing method of forming a source electrode and a drain electrode through a photolithography method over two times has been devised. That is, after forming the bonding layer first as shown in Fig. 4a and patterning it by the photolithography method to form the bonding portion 5a, after forming the conductive layer 4b as shown in Fig. 4b and then again the photolithography method By forming the electrode portion 5b as shown in Fig. 4C, the source electrode and the drain electrode 5 are formed. Of course, other methods other than the photolithography method can also be used in a patterning process.

However, this method has to go through the patterning process twice, there is a problem that the manufacturing process is complicated, the production cost increases, and the yield decreases.

Disclosure of Invention The present invention has been made to solve various problems including the above problems, and provides a method of manufacturing a thin film transistor in which electrode patterning is facilitated while the bonding between the electrode and the insulating film of the thin film transistor is improved, and the thin film transistor manufactured thereby is provided. For the purpose of

In order to achieve the above object and various other objects, the present invention provides a method of forming a gate electrode, (i) forming a gate electrode, (ii) forming a gate insulating film to cover the gate electrode, and (iii) Forming a bonding layer on the gate insulating film, (iv) forming a conductive layer on the bonding layer, and (v) simultaneously etching the bonding layer and the conductive layer by irradiating a laser beam on the conductive layer. Thereby forming a source electrode and a drain electrode spaced apart from each other, and (vi) forming a semiconductor layer in contact with the source electrode and the drain electrode, respectively.

In order to achieve the above object, the present invention also provides the steps of (i) forming a semiconductor layer, and (ii) a first contact hole and a second covering the semiconductor layer, each exposing at least a portion of the semiconductor layer. Forming a gate insulating film having two contact holes, (iii) forming a bonding layer on the gate insulating film, (iv) forming a conductive layer on the bonding layer, and (v) the conductive layer By irradiating a layer with a laser beam to simultaneously etch the bonding layer and the conductive layer, a source electrode and a drain electrode are in contact with the semiconductor layer through the first contact hole and the second contact hole and spaced apart from each other. It provides a method for manufacturing a thin film transistor comprising the step of forming a.

In order to achieve the above object, the present invention also provides the steps of (i) forming a semiconductor layer, (ii) forming a gate insulating film to cover the semiconductor layer, and (iii) a gate on the gate insulating film. Forming an electrode, (iv) forming an interlayer insulating film to cover the gate electrode, (v) forming a first contact hole in the interlayer insulating film and the gate insulating film so that at least a portion of the semiconductor layer is exposed; Forming a second contact hole, (vi) forming a bonding layer on the interlayer insulating film, (vii) forming a conductive layer on the bonding layer, and (viii) lasering the conductive layer Irradiating a beam to simultaneously etch the junction layer and the conductive layer to form source and drain electrodes that are in contact with the semiconductor layer and spaced apart from each other through the first contact hole and the second contact hole, respectively. It provides a method for manufacturing a thin film transistor, characterized in that provided.

According to another aspect of the present invention, the conductive layer is gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), rhodium (Rh), ruthenium (Ru), iridium (Ir) and osmium ( Os) may be formed of one or more materials.

According to another feature of the invention, the bonding layer may be formed of one or more materials of titanium (Ti), chromium (Cr), aluminum (Al) and molybdenum (Mo).

According to another feature of the invention, the insulating film may be formed of silicon nitride or silicon oxide.

According to another feature of the invention, the semiconductor layer may be formed of an organic material.

The present invention also provides a thin film transistor which is manufactured by the above method, in order to achieve the above object.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings.

5A to 5C are cross-sectional views schematically illustrating processes by a method of manufacturing an inverted coplanar thin film transistor according to an exemplary embodiment of the present invention.

First, the gate electrode 12 is formed on the substrate 11 as shown in FIG. 5A. The substrate 11 may be a substrate of various materials such as a glass substrate, a metal substrate, and a plastic substrate. As the method of forming the gate electrode 12, a method of forming a layer of a conductive material on the entire surface of the substrate 11 by deposition or the like may be used, and a method of deposition using a mask may be used. Various methods may be used, such as an inkjet printing method of dropping a conductive material to a predetermined position may be used. Of course, the gate electrode 12 may be formed by forming a conductive layer on the entire surface of the substrate 11 and then patterning the same using a laser ablation technique used for patterning source and drain electrodes, which will be described later.

After the gate electrode 12 is formed, the gate insulating film 13 is formed so as to cover the gate electrode 12. As the gate insulating film, an inorganic material such as silicon oxide or silicon nitride may be used.

After the gate insulating film 13 is formed, the bonding layer 14a and the conductive layer 14b are formed. The bonding layer 14a may be formed of at least one of titanium (Ti), chromium (Cr), aluminum (Al), and molybdenum (Mo). In addition, the bonding layer 14a may have a good bonding property with the gate insulating layer 13 below. Any material may be used as long as it is a conductive material.

The conductive layer 14b may be any material as long as it is a conductive material. In particular, when the semiconductor layer formed later is formed of an organic material, a material capable of making ohmic contact with the organic semiconductor layer, such as gold (Au), It may be formed of one or more of palladium (Pd), platinum (Pt), nickel (Ni), rhodium (Rh), ruthenium (Ru), iridium (Ir) and osmium (Os).

After the bonding layer 14a and the conductive layer 14b are formed, they are patterned using a laser ablation technique (LAT). That is, the laser beam is irradiated to a predetermined region of the conductive layer 14b as shown by the arrow in FIG. 5A. The area of the conductive layer 14b to which the laser beam is irradiated is the portion to be removed after the laser beam is irradiated. Thus, by irradiating a laser beam to the conductive layer 14b and simultaneously etching and patterning the conductive layer 14b and the bonding layer 14a thereunder, the source electrode and the drain electrode 15 spaced apart from each other as shown in FIG. 5B. To form. The source electrode and the drain electrode 15 may be overlapped with the predetermined gate electrode 12, as shown in FIG. 5B, but is not necessarily limited thereto. In FIG. 5B, the ends of the source electrode and the drain electrode 15 are shown to have a vertical shape, but may have various inclinations by adjusting the intensity of the irradiated laser beam as the etching proceeds.

In this way, the source electrode and the drain electrode 15 have the junction portion 15a and the electrode portion 15b so that the bondability with the gate insulating layer 13 at the lower side can be improved, and the formation thereof is made using laser ablation technology. Can be easily achieved.

After the source electrode and the drain electrode 15 are formed as described above, the thin film transistor is formed by contacting the source electrode and the drain electrode 15 as shown in FIG. 5C, that is, by forming the semiconductor layer 16 thereon. Complete The semiconductor layer 16 may be formed of various inorganic semiconductor materials or organic semiconductor materials.

When formed of an inorganic semiconductor material, it may include CdS, GaS, ZnS, CdSe, CaSe, ZnSe, CdTe, SiC, or Si. The present invention is particularly useful in organic thin film transistors in which the semiconductor layer 16 is formed of an organic semiconductor material. In the case where the semiconductor layer 16 is formed of an organic semiconductor material, polythiophene and its derivatives, polyparaphenylenevinylene and Derivatives thereof, polyparaphenylene and derivatives thereof, polyfluorene and derivatives thereof, polythiophenevinylene and derivatives thereof, polythiophene-heterocyclic aromatic copolymers and derivatives thereof, and as a low molecule, pentacene , Oligoacenes and derivatives thereof of tetracene, naphthalene, oligothiophenes and derivatives thereof of alpha-6-thiophene, alpha-5-thiophene, phthalocyanine and derivatives thereof, with or without metal, pyro Mellitic dianhydrides or pyromellitic diimides and derivatives thereof, perylenetetracarboxylic dianhydrides or perylenetetracarboxylics It may already contain the codes and their derivatives. When the semiconductor layer 16 is formed of an organic semiconductor material, various methods such as deeping or spin coating may be used.

6A and 6B are cross-sectional views schematically illustrating processes by a method of manufacturing a coplanar thin film transistor according to another exemplary embodiment of the present invention.

As shown in FIG. 6A, a semiconductor layer 16 is first formed on a substrate 11. The materials constituting the substrate 11 and the semiconductor layer 16 are the same as described in the above-described embodiment, and other components are also the same below. After the semiconductor layer 16 is formed, the semiconductor layer 16 is covered and has a first contact hole 13a and a second contact hole 13b exposing at least a portion of the semiconductor layer 16, respectively. The gate insulating film 13 is formed. Then, the bonding layer 14a and the conductive layer 14b are formed on the gate insulating film 13.

Thereafter, the conductive layer 14b is irradiated with a laser beam to simultaneously etch the bonding layer 14a and the conductive layer 14b so that the gate electrode 12, the first contact hole 13a and the second contact hole ( The thin film transistor is formed by forming the source electrode and the drain electrode 15 which are in contact with the semiconductor layer 16 and spaced apart from each other through 13b). Through such a manufacturing process, the thin film transistor can be manufactured more easily and at low cost while increasing the bonding between the gate insulating film 13, the source electrode and the drain electrode 15, and further, the gate electrode 12.

Fig. 7 is a sectional view schematically showing another coplanar thin film transistor of this embodiment. In order to manufacture such a thin film transistor, first, a semiconductor layer 16 is formed on a substrate 11, and a gate insulating film 13 is formed to cover the semiconductor layer 16. The gate electrode 12 is formed on the gate insulating film 13. The method of forming the gate electrode 12 may be the same as the method of forming the gate electrode in the method of manufacturing the inverted coplanar thin film transistor described above.

After the gate electrode 12 is formed, an interlayer insulating film 17 is formed over the entire surface of the substrate 11 to cover it. The first contact hole 13a and the second contact hole 13b are formed in the interlayer insulating layer 17 and the gate insulating layer 13 so that at least a portion of the semiconductor layer 16 is exposed. Then, a bonding layer and a conductive layer are formed on the interlayer insulating film 17. Finally, the bonding layer and the conductive layer are simultaneously etched by irradiating a laser beam to the conductive layer, thereby contacting the semiconductor layer 16 through the first contact hole 13a and the second contact hole 13b and being spaced apart from each other. The source electrode and the drain electrode 15 are formed. Through this manufacturing process, it is possible to manufacture the thin film transistor more easily and at a lower cost while increasing the bonding between the gate insulating film 13 and the source electrode and the drain electrode 15.

According to the method of manufacturing the thin film transistor of the present invention made as described above and the thin film transistor manufactured thereby, it is possible to manufacture a thin film transistor with improved electrode patterning while improving the bonding between the electrode and the insulating film of the thin film transistor, Therefore, the manufacturing cost can be reduced and the yield can be increased.

Although the present invention has been described with reference to the embodiments shown in the drawings, these are merely exemplary, and those skilled in the art will understand that various modifications and equivalent other embodiments are possible. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims.

Claims (8)

Forming a gate electrode; Forming a gate insulating film to cover the gate electrode; Forming a bonding layer on the gate insulating film; Forming a conductive layer on the bonding layer; Irradiating the conductive layer with a laser beam to simultaneously etch the bonding layer and the conductive layer to form source and drain electrodes spaced apart from each other; And Forming a semiconductor layer in contact with the source electrode and the drain electrode, respectively. Forming a semiconductor layer; Forming a gate insulating layer covering the semiconductor layer, the gate insulating layer having a first contact hole and a second contact hole respectively exposing at least a portion of the semiconductor layer; Forming a bonding layer on the gate insulating film; Forming a conductive layer on the bonding layer; And Simultaneously irradiating the conductive layer with a laser beam to etch the junction layer and the conductive layer, thereby forming a gate electrode, a source electrode contacting the semiconductor layer and spaced apart from each other through the first contact hole and the second contact hole; Forming a drain electrode; Forming a semiconductor layer; Forming a gate insulating film to cover the semiconductor layer; Forming a gate electrode on the gate insulating film; Forming an interlayer insulating film to cover the gate electrode; Forming a first contact hole and a second contact hole in the interlayer insulating film and the gate insulating film so that at least a portion of the semiconductor layer is exposed; Forming a bonding layer on the interlayer insulating film; Forming a conductive layer on the bonding layer; And By irradiating the conductive layer with a laser beam to simultaneously etch the bonding layer and the conductive layer to form a source electrode and a drain electrode that are in contact with the semiconductor layer and spaced apart from each other through the first contact hole and the second contact hole, respectively. The manufacturing method of a thin film transistor comprising the; The method according to any one of claims 1 to 3, The conductive layer is formed of at least one of gold (Au), palladium (Pd), platinum (Pt), nickel (Ni), rhodium (Rh), ruthenium (Ru), iridium (Ir), and osmium (Os). A method of manufacturing a thin film transistor, characterized in that. The method according to any one of claims 1 to 3, The bonding layer is a method of manufacturing a thin film transistor, characterized in that formed of at least one material of titanium (Ti), chromium (Cr), aluminum (Al) and molybdenum (Mo). The method according to any one of claims 1 to 3, The insulating film is a method of manufacturing a thin film transistor, characterized in that formed of silicon nitride or silicon oxide. The method according to any one of claims 1 to 3, The semiconductor layer is a method of manufacturing a thin film transistor, characterized in that formed of an organic material. A thin film transistor, which is produced by the method of any one of claims 1 to 3.

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