KR20040103996A - Plasma display panel and method of fabricating the same - Google Patents

Abstract

PURPOSE: A plasma display panel and method for manufacturing the plasma display panel are provided to improve picture quality by forming the dielectric layer of a display area in a thickness different from the thickness of the dielectric layer of a non-display area to compensate a height difference between barriers of the display area and non-display area. CONSTITUTION: A plasma display panel includes the first barrier(124a) formed in a display area on the first substrate(118), the second barrier(124b) formed in a non-display area of the first substrate, and dielectric layers(114a,114b) formed on the second substrate(110) opposite to the first substrate. The dielectric layers have different thicknesses in the display area and the non-display area. The first and second barriers have different heights. The second barrier is higher than the first barrier. The dielectric layer formed in the display area is thicker than the dielectric layer formed in the non-display area.

Description

Plasma display panel and manufacturing method thereof {PLASMA DISPLAY PANEL AND METHOD OF FABRICATING THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to a plasma display panel capable of improving image quality by uniform bonding of upper and lower substrates, and a method of manufacturing the same.

Recently, various flat panel displays have been developed to reduce weight and volume, which are disadvantages of cathode ray tubes. Such flat panel displays include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (hereinafter referred to as "PDPs"), and electroluminescence (Electro). -Luminescence (EL) display.

PDP is a display device using a gas discharge has the advantage that it is easy to manufacture a large panel. As a PDP, a three-electrode AC surface discharge type PDP having three electrodes and driven by an alternating voltage is typical.

The discharge cells of the PDP shown in FIG. 1 are a pair of sustain electrodes formed on the upper substrate 10, that is, a scan / hold electrode 12Y and a common sustain electrode 12Z, and an address formed on the lower substrate 18. FIG. An electrode 12X is provided. Lower substrate 18 shown in Figure 1 is shown rotated 90 °.

The sustain electrode pairs 12Y and 12Z consist of a transparent electrode 12a and a bus electrode 12b, and intersect with the address electrode 12X.

The upper dielectric layer 14 and the passivation layer 16 are formed on the upper substrate 10 on which the sustain electrode pairs 12Y and 12Z are formed. The upper dielectric layer 14 accumulates wall charges generated during gas discharge. The passivation layer 16 prevents damage to the upper dielectric layer 14 due to sputtering generated during plasma discharge and increases emission efficiency of secondary electrons. As the protective film 16, magnesium oxide (MgO) is usually used.

The lower dielectric layer 22 for wall charge accumulation is formed on the lower substrate 18 on which the address electrode 12X is formed. The first partition wall 24a is formed on the lower dielectric layer 22, and the phosphor 20 is coated on the surfaces of the lower dielectric layer 22 and the first partition wall 24a. The first partition wall 24a prevents ultraviolet rays and visible rays generated by the discharge from leaking into the adjacent discharge cells. The phosphor 20 is excited by ultraviolet rays generated during plasma discharge to generate visible light of any one of red, green, and blue. Inert gas for gas discharge is injected into the discharge space provided between the upper and lower substrates 10 and 18 and the first partition wall 24a.

The discharge cell of this structure is selected by the counter discharge between the address electrode 12X and the scan / hold electrode 12Y, and then sustains the discharge by the surface discharge between the sustain electrode pairs 12Y and 12Z. In such a discharge cell, the fluorescent substance 20 emits light by ultraviolet rays generated during sustain discharge, so that visible light is emitted to the outside of the cell. As a result, the discharge cells adjust the period during which the discharge is maintained to implement gray scale, and the PDP in which the discharge cells are arranged in a matrix form displays an image.

2 is a view showing the overall cross-sectional structure of a conventional PDP.

The upper substrate 110 and the lower substrate 118 of the PDP shown in FIG. 2 are bonded by a bonding process using the sealing material 35. In this case, in order to prevent the sealing material 35 from invading the display area by the upper and lower substrates 10 and 18 that are pressed, the second partition wall 24b is formed in the non-display area of the lower substrate 18.

The first and second partitions 24a and 24b are formed on the lower substrate 18 on which the lower dielectric (not shown) or the like is formed by using any one of screen printing, sandblasting, and etching methods. . For example, it is formed by firing after repeating the printing and drying process of the partition material paste on the lower substrate 18 using the screen printing method.

In this case, the second partition 24b is frequently formed to be relatively higher than the first partition 24a due to the process deviation. Specifically, when the screen is printed, the amount of partition paste paste discharged to the non-display area P1 corresponding to the beginning and the end of the printing is discharged to the display area P2 corresponding to the center of the printing due to the tension of the screen mark. It will be larger than the bulk paste.

Accordingly, as the bulkhead paste is discharged in a larger amount than the display area P2, the second partition wall 24b is formed higher than the first partition wall 24a.

Due to the height difference between the first and second partitions 24a and 24b, the upper substrate 10 is bent toward the lower substrate 18 when the upper and lower substrates 10 and 18 are bonded. The curved upper substrate 10 causes the upper and lower substrates 10 and 18 to be unevenly spaced, thereby causing partial discharge. In addition, as the contact between the upper and lower substrates 10 and 18 is uneven, friction occurs between the upper and lower substrates 10 and 18 due to vibration caused by discharge. This friction generates noises ranging from tens of thousands of tons.

Accordingly, it is an object of the present invention to provide a plasma display panel and a method of manufacturing the same which can improve image quality by uniform bonding of upper and lower substrates.

1 is a cross-sectional view showing the discharge cell structure of a conventional three-electrode alternating current plasma display panel.

2 is a view showing the overall structure of a conventional plasma display panel.

3 is a view showing a cross-sectional structure of a plasma display panel according to the present invention.

4 is a flowchart illustrating a manufacturing process of a plasma display panel.

5A to 5B are cross-sectional views illustrating in detail a process of forming a dielectric layer of a plasma display panel.

<Explanation of symbols for the main parts of the drawings>

10,110: upper substrate 12X: address electrode

12Y: scanning holding electrode 12Z: common holding electrode

14 dielectric layer 16 protective film

18: lower substrate 20: phosphor

24a, 124a: 1st partition 24b, 124b: 2nd partition

In order to achieve the above object, the PDP according to the embodiment of the present invention and the first partition wall formed in the display area on the first substrate; A second partition wall formed in a non-display area other than the display area of the first substrate; And a dielectric layer formed on a second substrate facing the first substrate and having different thicknesses in the display area and the non-display area.

The first and second barrier ribs may have different heights.

The second partition has a height higher than that of the first partition.

The dielectric layer may be formed to be thicker in the display area than in the non-display area.

The dielectric layer of the display area is about 5 to 30 μm thicker than the dielectric layer of the non-display area.

And a sealing material formed in the outermost regions of the first substrate and the second substrate.

A method of manufacturing a PDP according to an embodiment of the present invention includes forming a first partition in a display area on a first substrate and forming a second partition in a non-display area other than the display area;

And forming dielectric layers having different thicknesses in the display area and the non-display area on the second substrate facing the first substrate.

The first and second barrier ribs may have different heights.

The second partition has a height higher than that of the first partition.

The dielectric layer may be formed to be thicker in the display area than in the non-display area.

The dielectric layer of the display area is about 5 to 30 μm thicker than the dielectric layer of the non-display area.

And forming a sealing material in outermost regions of the first substrate and the second substrate.

Other objects and features of the present invention in addition to the above objects will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 3 to 5.

3 is a diagram illustrating a PDP according to an embodiment of the present invention.

The PDP shown in FIG. 3 includes an upper substrate 110 on which an upper dielectric layer 114 having a step is formed, and a lower substrate 118 and upper / lower substrates 110 and 118 on which first and second partitions 124a and 124b are formed. The sealing material 135 for bonding is provided.

The upper dielectric formed on the upper substrate 110 is formed to have different heights in the non-display area P1 except for the area where the display area P2 and the sealing material 135 are formed.

The upper dielectric layer 114a corresponding to the display area P2 is formed relatively thicker than the upper dielectric layer 114b corresponding to the non-display area P1. For example, the thickness D1 of the upper dielectric layer 114a corresponding to the display area P2 is formed to be about 5 to 30 μm higher than the thickness D2 of the upper dielectric layer 114b corresponding to the non-display area P1. do. Since the upper dielectric layer 114a corresponding to the display area P2 is formed higher than the upper dielectric layer 114b corresponding to the non-display area P1, the first partition wall 124a and the second partition wall generated by the process deviation described later. The height difference of 124b is compensated.

The partition wall formed on the lower substrate 118 is divided into a first partition 124a formed in the display area P2 and a second partition wall 124b formed in the non-display area P1.

The first partition wall 124a is formed in the display area P2 to prevent the ultraviolet rays and the visible light generated by the discharge from leaking to the adjacent discharge cells. The second partition wall 124b is formed in the non-display area P1 between the real area where the sealing material 135 is formed and the display area P2 to prevent contamination of the display area P2 due to the encroachment of the sealing material 135. Done.

At this time, the second partition 124b is formed at a height higher than the first partition 124a due to the process deviation.

The sealing material 135 bonds the upper substrate 110 on which the upper dielectric layers 114a and 114b and the like are formed, and the lower substrate 118 on which the first and second partitions 124a and 124b are formed.

The upper and lower substrates 110 and 118 bonded in this manner have a height difference between the first and second partitions 124a and 124b of the lower substrate 118 and the non-display area P2 of the upper substrate 110. The heights of the dielectric layers 114a and 114b of P1 are uniformly bonded.

4 is a flowchart illustrating a manufacturing process of the PDP according to the present invention.

First, the upper substrate 110 is manufactured, and then a transparent electrode pattern and a metal bus electrode pattern (not shown) are sequentially formed on the upper substrate 110. (S1 and S2) Next, the transparent electrode pattern and the metal bus are formed. First and second dielectric layers 113 and 115 are formed on the upper substrate 110 having the electrode patterns formed thereon (S3 and S4).

Referring to the formation process of the first and second dielectric layers 113 and 115 in detail, as shown in FIG. After the printing and drying processes a plurality of times, the first dielectric layer 113 is formed as shown in FIG. 5A. The dielectric paste is baked after a plurality of printing and drying processes using a screen printing method in a region corresponding to the display area P2 on the upper substrate 110 on which the first dielectric layer 113 is formed, as shown in FIG. 5B. 115) is formed. For example, the thickness of the second dielectric layer 115 is about 5-30 μm.

A passivation layer (not shown) is formed on the upper substrate 110 on which the first and second upper dielectric layers 113 and 115 are formed (S5).

On the lower substrate 118, an address electrode (not shown) is formed by using a photo method, a printing method, or the like. A lower dielectric layer (not shown) is formed by using S (S11).

First and second barrier ribs 124a and 124b are formed on the lower substrate 118 on which the lower dielectric layer is formed by using any one of a screen printing method, a sand blasting method, and an etching method (S13).

Subsequently, a phosphor (not shown) is formed on the surface of the lower substrate 118 on which the lower dielectric is formed by using screen printing, printing, or the like. (S15)

next. The upper substrate 110 on which the first and second dielectric layers 113 and 115 are formed and the lower substrate 118 on which the first and second partitions 124a and 124b are formed are bonded by the sealing material 135 (S17).

The method for manufacturing the dielectric layer of the upper substrate according to the embodiment of the present invention is not limited to the screen printing method described above, any known method for forming a dielectric layer such as a thick film coating method, laminating may be applied.

As described above, in the plasma display panel and the method of manufacturing the same, the height difference between the non-display area partition wall and the display area partition wall is compensated by forming different thicknesses of the dielectric layer of the display area and the dielectric layer of the non-display area. Accordingly, the upper and lower substrates are uniformly bonded to prevent mis-discharge and noise.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (12)

A first barrier rib formed in the display area on the first substrate; A second partition wall formed in a non-display area other than the display area of the first substrate; And a dielectric layer formed on a second substrate facing the first substrate and having a different thickness in the display area and the non-display area. The method of claim 1, And the first and second barrier walls have different heights. The method of claim 1, The second partition wall has a height higher than the first partition wall. The method of claim 1, And the dielectric layer is formed to be thicker in the display area than in the non-display area. The method of claim 4, wherein And the dielectric layer of the display area is about 5 to 30 [mu] m thicker than the dielectric layer of the non-display area. The method of claim 1, And a sealing material formed in outermost regions of the first substrate and the second substrate. Forming a first partition in a display area on the first substrate and forming a second partition in a non-display area other than the display area; Forming a dielectric layer having a different thickness in the display area and the non-display area on a second substrate facing the first substrate. The method of claim 7, wherein And wherein the first and second barrier walls have different heights. The method of claim 7, wherein The second partition wall has a height higher than the first partition wall manufacturing method of the plasma display panel. The method of claim 7, wherein And the dielectric layer is formed to be thicker in the display area than in the non-display area. The method of claim 10, And a dielectric layer of the display area is about 5 to 30 [mu] m thicker than the dielectric layer of the non-display area. The method of claim 7, wherein And forming a sealing material in outermost regions of the first substrate and the second substrate.