KR20040088592A - 프린트 배선판 및 그의 제조방법 - Google Patents
프린트 배선판 및 그의 제조방법Info
- Publication number
- KR20040088592A KR20040088592A KR10-2004-7015189A KR20047015189A KR20040088592A KR 20040088592 A KR20040088592 A KR 20040088592A KR 20047015189 A KR20047015189 A KR 20047015189A KR 20040088592 A KR20040088592 A KR 20040088592A
- Authority
- KR
- South Korea
- Prior art keywords
- opening
- printed wiring
- wiring board
- resin
- pad
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
- H05K1/116—Lands, clearance holes or other lay-out details concerning the surrounding of a via
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0201—Thermal arrangements, e.g. for cooling, heating or preventing overheating
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
- H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
- H05K1/0224—Patterned shielding planes, ground planes or power planes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/115—Via connections; Lands around holes or via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0213—Electrical arrangements not otherwise provided for
- H05K1/0237—High frequency adaptations
- H05K1/025—Impedance arrangements, e.g. impedance matching, reduction of parasitic impedance
- H05K1/0253—Impedance adaptations of transmission lines by special lay-out of power planes, e.g. providing openings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/06—Thermal details
- H05K2201/062—Means for thermal insulation, e.g. for protection of parts
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/0929—Conductive planes
- H05K2201/093—Layout of power planes, ground planes or power supply conductors, e.g. having special clearance holes therein
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09454—Inner lands, i.e. lands around via or plated through-hole in internal layer of multilayer PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09536—Buried plated through-holes, i.e. plated through-holes formed in a core before lamination
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/0959—Plated through-holes or plated blind vias filled with insulating material
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09627—Special connections between adjacent vias, not for grounding vias
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09681—Mesh conductors, e.g. as a ground plane
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09727—Varying width along a single conductor; Conductors or pads having different widths
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/0979—Redundant conductors or connections, i.e. more than one current path between two points
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
- H05K2201/09881—Coating only between conductors, i.e. flush with the conductors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T428/00—Stock material or miscellaneous articles
- Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
- Y10T428/24802—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.]
- Y10T428/24917—Discontinuous or differential coating, impregnation or bond [e.g., artwork, printing, retouched photograph, etc.] including metal layer
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Electromagnetism (AREA)
- Manufacturing & Machinery (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Applications Claiming Priority (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2196596A JPH09191171A (ja) | 1996-01-11 | 1996-01-11 | プリント配線板 |
JP3715596A JP3143389B2 (ja) | 1996-01-30 | 1996-01-30 | バイアホールを有するプリント配線板及びその製造方法 |
JP7529796 | 1996-03-04 | ||
PCT/JP1996/003718 WO1997025839A1 (fr) | 1996-01-11 | 1996-12-19 | Tableau d'interconnexions imprime et son procede de fabrication |
Publications (1)
Publication Number | Publication Date |
---|---|
KR20040088592A true KR20040088592A (ko) | 2004-10-16 |
Family
ID=27283646
Family Applications (3)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2004-7015189A KR20040088592A (ko) | 1996-01-11 | 1996-12-19 | 프린트 배선판 및 그의 제조방법 |
KR10-2004-7015188A KR20040108691A (ko) | 1996-01-11 | 1996-12-19 | 프린트 배선판 및 그의 제조방법 |
KR1019970706293A KR100485628B1 (ko) | 1996-01-11 | 1996-12-19 | 프린트배선판및그의제조방법 |
Family Applications After (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR10-2004-7015188A KR20040108691A (ko) | 1996-01-11 | 1996-12-19 | 프린트 배선판 및 그의 제조방법 |
KR1019970706293A KR100485628B1 (ko) | 1996-01-11 | 1996-12-19 | 프린트배선판및그의제조방법 |
Country Status (7)
Country | Link |
---|---|
US (2) | US6316738B1 (ko) |
EP (3) | EP1981317A3 (ko) |
KR (3) | KR20040088592A (ko) |
CN (1) | CN1098023C (ko) |
DE (1) | DE69636010T2 (ko) |
MY (1) | MY128551A (ko) |
WO (1) | WO1997025839A1 (ko) |
Families Citing this family (47)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN100426491C (zh) * | 1997-10-17 | 2008-10-15 | 揖斐电株式会社 | 封装基板 |
JP2000232269A (ja) * | 1999-02-10 | 2000-08-22 | Nec Toyama Ltd | プリント配線板およびプリント配線板の製造方法 |
US6574862B1 (en) * | 1999-02-23 | 2003-06-10 | Samsung Electro-Mechanics Co., Ltd. | Method for coupling PCB sheet |
KR100333612B1 (ko) * | 1999-09-21 | 2002-04-24 | 구자홍 | 인쇄회로기판의 회로패턴 노출부 형성방법 |
US6898773B1 (en) | 2002-01-22 | 2005-05-24 | Cadence Design Systems, Inc. | Method and apparatus for producing multi-layer topological routes |
US6630743B2 (en) * | 2001-02-27 | 2003-10-07 | International Business Machines Corporation | Copper plated PTH barrels and methods for fabricating |
US7310793B1 (en) | 2001-06-03 | 2007-12-18 | Cadence Design Systems, Inc. | Interconnect lines with non-rectilinear terminations |
US6829757B1 (en) | 2001-06-03 | 2004-12-07 | Cadence Design Systems, Inc. | Method and apparatus for generating multi-layer routes |
US6882055B1 (en) * | 2001-06-03 | 2005-04-19 | Cadence Design Systems, Inc. | Non-rectilinear polygonal vias |
US6859916B1 (en) | 2001-06-03 | 2005-02-22 | Cadence Design Systems, Inc. | Polygonal vias |
US6976238B1 (en) | 2001-06-03 | 2005-12-13 | Cadence Design Systems, Inc. | Circular vias and interconnect-line ends |
US6895569B1 (en) | 2001-06-03 | 2005-05-17 | Candence Design Systems, Inc. | IC layout with non-quadrilateral Steiner points |
KR100416000B1 (ko) * | 2001-07-11 | 2004-01-24 | 삼성전자주식회사 | 다수의 핀을 갖는 부품이 실장되는 인쇄회로기판 |
TWI286826B (en) | 2001-12-28 | 2007-09-11 | Via Tech Inc | Semiconductor package substrate and process thereof |
US7080329B1 (en) | 2002-01-22 | 2006-07-18 | Cadence Design Systems, Inc. | Method and apparatus for identifying optimized via locations |
US7089524B1 (en) | 2002-01-22 | 2006-08-08 | Cadence Design Systems, Inc. | Topological vias route wherein the topological via does not have a coordinate within the region |
US6938234B1 (en) | 2002-01-22 | 2005-08-30 | Cadence Design Systems, Inc. | Method and apparatus for defining vias |
CN1324697C (zh) * | 2002-01-28 | 2007-07-04 | 威盛电子股份有限公司 | 半导体构装基板 |
US20030152309A1 (en) * | 2002-02-14 | 2003-08-14 | Howard James Robert | Printed circuit board containing optical elements |
KR100878236B1 (ko) * | 2002-06-12 | 2009-01-13 | 삼성전자주식회사 | 금속 패턴의 형성 방법 및 이를 이용한 박막 트랜지스터기판의 제조 방법 |
US7029529B2 (en) * | 2002-09-19 | 2006-04-18 | Applied Materials, Inc. | Method and apparatus for metallization of large area substrates |
US7088008B2 (en) * | 2003-03-20 | 2006-08-08 | International Business Machines Corporation | Electronic package with optimized circuitization pattern |
TWI284967B (en) * | 2003-03-20 | 2007-08-01 | Endicott Interconnect Tech Inc | Electronic package with strengthened conductive pad |
US7034544B2 (en) | 2003-06-30 | 2006-04-25 | Intel Corporation | Methods for minimizing the impedance discontinuity between a conductive trace and a component and structures formed thereby |
US20050112344A1 (en) * | 2003-08-20 | 2005-05-26 | Redfern Sean M. | Apparatus and method for use in printed circuit board drilling applications |
US7096451B2 (en) * | 2003-09-09 | 2006-08-22 | International Business Machines Corporation | Mesh plane generation and file storage |
JP2006108211A (ja) * | 2004-10-01 | 2006-04-20 | North:Kk | 配線板と、その配線板を用いた多層配線基板と、その多層配線基板の製造方法 |
CN100459828C (zh) * | 2005-07-11 | 2009-02-04 | 建兴电子科技股份有限公司 | 印刷电路板 |
WO2007052674A1 (ja) * | 2005-11-02 | 2007-05-10 | Ibiden Co., Ltd. | 半導体装置用多層プリント配線板及びその製造方法 |
US20070177363A1 (en) * | 2006-01-31 | 2007-08-02 | Symbol Technologies, Inc. | Multilayer printed circuit board having tamper detection circuitry |
JP2008197472A (ja) * | 2007-02-14 | 2008-08-28 | Shinko Electric Ind Co Ltd | 回路基板の製造方法 |
JP2008262989A (ja) * | 2007-04-10 | 2008-10-30 | Toshiba Corp | 高周波回路基板 |
US8323798B2 (en) | 2007-09-28 | 2012-12-04 | Tri-Star Laminates, Inc. | Systems and methods for drilling holes in printed circuit boards |
JP2009231818A (ja) * | 2008-03-21 | 2009-10-08 | Ibiden Co Ltd | 多層プリント配線板及びその製造方法 |
JPWO2009141929A1 (ja) * | 2008-05-19 | 2011-09-29 | イビデン株式会社 | 配線板とその製造方法 |
JP2010118635A (ja) * | 2008-11-12 | 2010-05-27 | Ibiden Co Ltd | 多層プリント配線板 |
KR101609597B1 (ko) * | 2009-02-16 | 2016-04-07 | 삼성디스플레이 주식회사 | 회로기판 및 이를 갖는 표시패널 어셈블리 |
JP5855905B2 (ja) * | 2010-12-16 | 2016-02-09 | 日本特殊陶業株式会社 | 多層配線基板及びその製造方法 |
US20130299966A1 (en) * | 2012-05-10 | 2013-11-14 | Texas Instruments Incorporated | Wsp die with offset redistribution layer capture pad |
TWI429352B (zh) * | 2012-05-18 | 2014-03-01 | Au Optronics Corp | 可撓性電路模組 |
WO2014188945A1 (ja) * | 2013-05-22 | 2014-11-27 | 三菱製紙株式会社 | 配線基板の製造方法 |
KR101474642B1 (ko) | 2013-05-23 | 2014-12-17 | 삼성전기주식회사 | 인쇄회로기판 및 인쇄회로기판 제조 방법 |
US20150016069A1 (en) * | 2013-07-09 | 2015-01-15 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Printed circuit board |
JP6600176B2 (ja) * | 2015-06-19 | 2019-10-30 | ホシデン株式会社 | 多層プリント配線板及び多層プリント配線板とコネクタとの接続構造 |
WO2017029767A1 (ja) * | 2015-08-20 | 2017-02-23 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US10790241B2 (en) | 2019-02-28 | 2020-09-29 | Advanced Semiconductor Engineering, Inc. | Wiring structure and method for manufacturing the same |
JP7381323B2 (ja) * | 2019-12-17 | 2023-11-15 | 日東電工株式会社 | 両面配線回路基板の製造方法および両面配線回路基板 |
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US4361634A (en) * | 1975-07-03 | 1982-11-30 | Ncr Corporation | Artwork master for production of multilayer circuit board |
FR2468279A1 (fr) * | 1979-10-19 | 1981-04-30 | Dujardin Editions | Procede de fabrication de plaques comportant au moins un circuit imprime |
JPS59182974U (ja) * | 1983-05-24 | 1984-12-06 | 株式会社ノーリツ | プリント基板 |
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JPH0650504B2 (ja) | 1987-07-01 | 1994-06-29 | 株式会社日立製作所 | かな漢字変換装置 |
JPS6437073A (en) * | 1987-08-03 | 1989-02-07 | Sony Corp | Printed board |
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JPH0734505B2 (ja) | 1989-01-18 | 1995-04-12 | イビデン株式会社 | 多層プリント配線板およびその製造方法 |
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JPH0797705B2 (ja) * | 1989-07-17 | 1995-10-18 | 日本電気株式会社 | 多層セラミツク基板 |
JPH03142896A (ja) * | 1989-10-27 | 1991-06-18 | Fujitsu Ltd | 多層回路基板 |
JP2503725B2 (ja) * | 1990-05-18 | 1996-06-05 | 日本電気株式会社 | 多層配線基板 |
JPH0455555A (ja) | 1990-06-25 | 1992-02-24 | Misawa Homes Co Ltd | 建物の手摺支柱の設置構造 |
JPH05183273A (ja) * | 1990-09-07 | 1993-07-23 | Hitachi Ltd | 多層配線基板装置とその製造方法ならびにそれを用いた電子装置 |
JPH04192495A (ja) * | 1990-11-26 | 1992-07-10 | Fujitsu Ltd | 薄膜多層プリント配線板 |
JPH0518476A (ja) | 1991-07-09 | 1993-01-26 | Sanmei Denki Kk | 電磁弁用端子箱 |
JP3142896B2 (ja) * | 1991-07-19 | 2001-03-07 | 三井化学株式会社 | オレフィン重合用触媒成分の製造方法およびそれを用いたオレフィンの重合方法 |
JP2752305B2 (ja) * | 1991-10-29 | 1998-05-18 | 工業技術院長 | 回路基板 |
JPH0543569U (ja) * | 1991-11-15 | 1993-06-11 | 株式会社富士通ゼネラル | プリント配線板のはんだ付け構造 |
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-
1996
- 1996-12-19 KR KR10-2004-7015189A patent/KR20040088592A/ko not_active Application Discontinuation
- 1996-12-19 CN CN96192508A patent/CN1098023C/zh not_active Expired - Lifetime
- 1996-12-19 EP EP08011580A patent/EP1981317A3/en not_active Ceased
- 1996-12-19 US US08/894,342 patent/US6316738B1/en not_active Expired - Lifetime
- 1996-12-19 KR KR10-2004-7015188A patent/KR20040108691A/ko not_active Application Discontinuation
- 1996-12-19 KR KR1019970706293A patent/KR100485628B1/ko not_active IP Right Cessation
- 1996-12-19 EP EP96942586A patent/EP0817548B1/en not_active Expired - Lifetime
- 1996-12-19 DE DE69636010T patent/DE69636010T2/de not_active Expired - Lifetime
- 1996-12-19 WO PCT/JP1996/003718 patent/WO1997025839A1/ja active IP Right Grant
- 1996-12-19 EP EP05027867A patent/EP1677582B1/en not_active Expired - Lifetime
-
1997
- 1997-01-03 MY MYPI97000026A patent/MY128551A/en unknown
-
2000
- 2000-08-07 US US09/633,881 patent/US6342682B1/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
DE69636010T2 (de) | 2007-01-18 |
EP1677582A2 (en) | 2006-07-05 |
EP0817548A4 (en) | 1999-12-01 |
WO1997025839A1 (fr) | 1997-07-17 |
EP1981317A2 (en) | 2008-10-15 |
EP1677582B1 (en) | 2011-10-12 |
DE69636010D1 (de) | 2006-05-18 |
US6316738B1 (en) | 2001-11-13 |
EP1981317A3 (en) | 2008-10-29 |
CN1178625A (zh) | 1998-04-08 |
KR100485628B1 (ko) | 2005-09-14 |
US6342682B1 (en) | 2002-01-29 |
KR19980702885A (ko) | 1998-08-05 |
EP0817548B1 (en) | 2006-04-05 |
CN1098023C (zh) | 2003-01-01 |
EP0817548A1 (en) | 1998-01-07 |
EP1677582A3 (en) | 2007-04-11 |
MY128551A (en) | 2007-02-28 |
KR20040108691A (ko) | 2004-12-24 |
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A107 | Divisional application of patent | ||
WITN | Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid |