KR20040080158A - Addressing method and apparatus of plasma display panel - Google Patents

Abstract

PURPOSE: An addressing apparatus of a plasma display panel and its method are provided to reduce an address period by single scan. CONSTITUTION: According to the addressing apparatus of a plasma display panel, an average data calculation part(73) calculates an average value of two data adjacent vertically in two frame periods. A data driver part(76) supplies average data inputted via a display data processor part and a subfield mapping part to a PDP. And a scan driver part(77) scans the PDP by two lines in sequence.

Description

ADDRESSING METHOD AND APPARATUS OF PLASMA DISPLAY PANEL}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel, and more particularly, to an addressing method and apparatus for a plasma display panel designed to reduce an address period in a single scan.

Plasma Display Panel (hereinafter referred to as "PDP") allows an ultraviolet light generated when an inert mixed gas such as He + Xe, Ne + Xe, He + Xe + Ne, etc. to discharge to emit an phosphor to display an image. do. Such PDPs are not only thin and large in size, but also have improved in image quality due to recent technology development. Recently, a three-electrode AC surface discharge type PDP that lowers the driving voltage using wall charges accumulated in a dielectric has been developed and sold.

Referring to FIG. 1, in the conventional three-electrode AC surface discharge type PDP, n scan electrodes Y1 to Yn and n sustain electrodes Z have m data electrodes X1 to Xm with a discharge space therebetween. ), M x n cells 1 are formed at the intersection. A partition 2 is formed between the adjacent data electrodes X1 to Xm to block electrical and optical interference between horizontally adjacent cells 1.

After the scan signals are sequentially applied to the scan electrodes Y1 to Yn to select the scan lines, the sustain pulses are commonly applied to generate the sustain discharge for the selected cells. The sustain electrodes Z are applied with sustain pulses alternate with the sustain pulses supplied to the scan electrodes Y1 to Yn to cause sustain discharge for the selected cell. The data electrodes X1 to Xm select a cell 1 by applying a data pulse synchronized with the scan signal.

The PDP is time-divisionally driven by dividing one field period (NTSC system: 16.67 ms) into several subfields with different number of emission times in order to realize grayscale of an image. Each subfield has a reset period for initializing the full screen, a sustain period for expressing the gray level according to an address period for selecting a scan line and selecting a cell from the selected scan line, and the number of discharges (or It is divided into (sustain period). For example, when the image is to be displayed with 256 gray levels, a frame period (16.67 ms) corresponding to 1/60 second is divided into eight subfields SF1 to SF8 as shown in FIG. As described above, each of the eight subfields SF1 to SF8 is divided into a reset period, a scan period, and a display period. Here, the reset period and the address period of each subfield are the same for each subfield, while the display period is 2 ⁿ (n = 0,1,2,3,4,5,6,7) in each subfield. Is increased. Before the reset period, an erasing period for erasing wall charge remaining in the cell by the sustain discharge may be arranged.

3 schematically illustrates a conventional single scan PDP device.

Referring to FIG. 3, the conventional single scan type PDP apparatus includes a data driving circuit 31 for supplying video data to the data electrodes X1 to Xm of the PDP 30, and the scan electrodes Y1 to Yn. Scan driving circuit 32 for supplying an initialization signal, scan pulses and sustain pulses, and sustain drive circuit 33 for supplying sustain pulses to the common sustain electrode (Z).

The PDP 30 has data electrodes X1 to Xm formed on the lower plate. In addition, the scan electrodes Y1 to Yn and the common sustain electrode Z are formed on the upper surface of the PDP 30 so as to cross the data electrodes X1 to Xm.

The data driving circuit 31 supplies video data to the data electrodes X1 to Xm to be synchronized with the scan pulses sequentially supplied to the scan electrodes Y1 to Yn.

The scan driving circuit 32 simultaneously supplies the rising ramp waveform Ramp-up and the falling ramp waveform Ramp-down to the scan electrodes Y1 to Yn during the reset period. The scan driving circuit 32 sequentially supplies the scan pulses to the scan electrodes Y1 to Yn during the address period.

During the sustain period, the scan driving circuit 32 and the sustain driving circuit 33 alternately operate to supply the sustain pulses to the scan electrodes Y1 to Yn and the common sustain electrode Z.

4 illustrates a driving waveform of the PDP generated from the driving circuit shown in FIG. 3.

Referring to FIG. 4, during the reset period, the rising ramp waveform Ramp-up and the falling ramp waveform Ramp-down are simultaneously applied to all scan electrodes Y. FIG. Ramp-up causes a slight discharge in the cells of the full screen, resulting in wall charges in the cells of the full screen. Ramp-down generates a weak erase discharge in the cells, thereby eliminating unnecessarily excessive charges during wall charges and space charges generated by the setup discharge, thereby uniforming the wall charges required for address discharge in the cells of the full screen. Is left.

In the address period, a negative scan pulse (-scn) is sequentially applied to the scan electrodes (Y) and a positive data pulse (data) is applied to the data electrodes (X) so as to be synchronized with the scan pulse (-scn). do. As the voltage difference between the scan pulse (-scn) and the data pulse (data) and the wall voltage generated during the reset period are added, an address discharge is generated in the cell to which the data pulse (data) is applied.

On the other hand, a positive DC voltage Zdc is supplied to the sustain electrode Z during the period in which the falling ramp waveform Ramp-down is supplied and the address period.

In the sustain period, sustain pulses sus are alternately applied to the scan electrodes Y and the sustain electrodes Z. FIG. Each time the sustain pulse (sus) is applied to the cell selected by the address discharge in the form of surface discharge between the scan electrode (Y) and the sustain electrode (Z) is added to the wall voltage and the voltage of the sustain pulse (sus) in the cell Sustain discharge occurs. At the end of the sustain period, an erase signal in the form of a ramp waveform for canceling the sustain discharge can be supplied.

This single scan method can be scanned in reverse order as indicated by the dotted line in FIG. 3.

However, in the conventional PDP, it is difficult to sufficiently maintain the sustain period (display period) when a subfield is added to increase the resolution accompanied by an increase in the number of lines and cells or to reduce the contour noise in a video. There is a problem.

For example, in the resolution of VGA (640x480) class, the erasing period before resetting is 8 (number of subfields) x 0.2 [ms] = 1.6 [ms] per frame period (16.67 [ms]). At VGA resolution, the reset period is about 2 [ms] per frame period, and the address period is 480 (horizontal lines) x 8 (subfields) x 1.8 [μs] = 6.9 [ms] per frame period. . Therefore, the sustain period that can be secured in one frame period in a PDP of VGA class is about 6 [ms].

If the resolution is increased to XGA (1024 x 768) level, the sustain period can hardly be secured by the single scan method. For example, at VGA resolution, the reset period is about 2 [ms] per frame period, and the address period is 480 (horizontal lines) x 8 (subfields) x 1.8 [μs] = 6.9 [ms] per frame period. to be. Therefore, the sustain period which can be secured in one frame period in the VGA class PDP is only about 6 [ms].

For this reason, the XGA class PDP is driven by the double scan method as shown in FIG.

5 and 6, the double scan PDP apparatus includes a first data driving circuit 41A for supplying video data to the data electrodes Xt1 to Xtm formed on the upper half of the PDP 40, and a PDP. The second data driving circuit 41A for supplying video data to the data electrodes Xb1 to Xbm formed in the lower half of the 40, and the initialization signal (reset signal) and scan pulse to the scan electrodes Y1 to Yn. And a scan drive circuit 42 for supplying the sustain pulse, and a sustain drive circuit 43 for supplying the sustain pulse to the common sustain electrode Z.

In the PDP 40, data electrodes Xt1 to Xtm and Xb1 to Xbm separated from the center are formed on the lower plate so that separate data can be simultaneously supplied to the upper half and the lower half. In addition, the scan electrodes Y1 to Yn and the common sustain electrode Z are formed on the upper surface of the PDP 40 so as to intersect the data electrodes Xt1 to Xtm and Xb1 to Xbm.

The first data driving circuit 41A provides video to the upper data electrodes Xt1 to Xtm to be synchronized with the scan pulse scn which is sequentially supplied to the first to n / 2th scan electrodes Y1 to Y2 / n. Supply the data.

The second data driving circuit 41B includes the lower data electrodes Xb1 to synchronously with the scan pulse scn sequentially supplied to the n / 2 + 1 to nth scan electrodes Yn / 2 + 1 to Yn. Xbm) is supplied with video data.

The scan driving circuit 42 simultaneously supplies the rising ramp waveform Ramp-up and the falling ramp waveform Ramp-down to the scan electrodes Y1 to Yn during the reset period. The scan driving circuit 42 simultaneously scans the upper half and the lower half of the PDP 40 during the address period. At this time, scan pulses (-scn) are simultaneously supplied to one scan electrode present in the upper half of the PDP 40 and one scan electrode present in the lower half of the PDP 40.

During the sustain period, the scan driving circuit 42 and the sustain driving circuit 43 alternately operate to supply the sustain pulse SUS to the scan electrodes Y1 to Yn and the common sustain electrode Z.

In the double scan method, as illustrated by a dotted line in FIG. 5, the upper half and the lower half of the PDP 40 may be scanned in the reverse sequential direction.

This double scan method can reduce the address period to about 2/1 as compared to the single scan method of the same resolution, but drive the data driving circuit 41A for driving the data electrodes in the upper half and the data electrodes in the lower half. Since the data driver circuit 41B is required, the number of integrated circuits in which the data driver circuit is integrated increases.

Accordingly, it is an object of the present invention to provide an addressing method and apparatus of a PDP in which the address period is reduced by a single scan.

1 is a plan view showing the electrode arrangement of a conventional three-electrode alternating surface discharge type plasma display panel.

2 is a diagram illustrating a frame structure of a conventional plasma display panel.

3 is a block diagram schematically illustrating a conventional single scan type plasma display panel device.

4 is a waveform diagram showing driving waveforms of a conventional single scan type plasma display panel.

5 is a block diagram schematically illustrating a conventional double scan type plasma display panel device.

6 is a waveform diagram showing driving waveforms of a conventional double scan type plasma display panel.

7 is a block diagram schematically illustrating an address device of a plasma display panel according to an exemplary embodiment of the present invention.

FIG. 8 is a diagram illustrating average value data output by the frame memory and the average data calculator shown in FIG. 7.

FIG. 9 is a waveform diagram illustrating driving waveforms of the address apparatus illustrated in FIG. 7.

10 is a diagram illustrating an example of a low-weight subfield in which a line doubling scan is performed.

<Description of Symbols for Main Parts of Drawings>

30, 40, 80: plasma display panel 31, 41A, 41B, 77: data driving circuit

32,42,78: scan drive circuit 33,43,79: sustain drive circuit

71: gamma & gain adjusting unit 72: error diffusion & dither processing unit

73: frame memory 74: average data calculator

75: display data processing unit 76: subfield mapping unit

In order to achieve the above object, the addressing method of the PDP according to the first embodiment of the present invention comprises the steps of: addressing a cell by supplying the same data to at least two or more lines in a subfield having a low weight among the subfields Include.

The addressing method of the PDP further includes calculating an average value of data of two frames.

The addressing method of the PDP further includes selecting an average value as the data.

The subfields having a low weight are subfields whose weight is set to '8' or less.

An address method of a PDP according to a second embodiment of the present invention includes the steps of: calculating an average value of the same data lines in two frames; Selecting a cell by supplying an average value to at least two lines.

The addressing apparatus of the PDP according to the first embodiment of the present invention includes an address circuit for supplying the same data to at least two lines in a subfield having a low weight among the subfields to address a cell.

The address circuit includes an average data calculator which calculates an average value of data of two frames.

The address circuit is characterized by selecting an average value as the data.

The address circuit may be configured to supply the same data to two lines in subfields whose weight is set to '8' or less.

The address circuit includes a scan circuit for simultaneously supplying a scan pulse synchronized with data to at least two lines.

According to a second embodiment of the present invention, an address device of a PDP includes: an average data calculator configured to calculate an average value of the same data lines in two frames; An address circuit for selecting a cell by supplying an average value to at least two lines is provided.

Other objects and features of the present invention in addition to the above object will become apparent from the description of the embodiments with reference to the accompanying drawings.

Hereinafter, exemplary embodiments of the present invention will be described with reference to FIGS. 7 to 10.

Referring to FIG. 7, an address device of a PDP according to an embodiment of the present invention includes an average data calculator 73 and a display data processor 34 that calculate an average value of two vertically adjacent data in two frame periods. And a data driver 76 for supplying average data input via the subfield mapping unit 35 to the PDP 79, and a scan driver 77 for sequentially scanning the PDP 39 by two lines. It is provided.

In the PDP 80, a sustain electrode pair including the scan electrode 81 and the sustain electrode 82, and an address electrode 83 intersecting the sustain electrode pair are formed. Discharge cells are arranged in a matrix at the intersection of the sustain electrode pairs and the address electrodes 83.

The digital video data RGB is input to the average data calculator 73 through the gamma & gain adjuster 71 and the error diffusion & dither processor 72.

The gamma & gain adjusting unit 71 gamma corrects and gain corrects the digital video data RGB.

The error diffusion & dither processing unit 72 spreads the quantization error component of the digital video data RGB input from the gamma & gain adjustment unit 71 to adjacent pixel data using a Floyd-Steinberg error diffusion filter. In addition, the error diffusion & dither processing unit 72 performs dither processing by thresholding the input data with a dither mask (or dither matrix) having a threshold set corresponding to each pixel.

The frame memory 73 stores data for one frame and then outputs the data to delay the data by one frame period, and supply the delayed data to the average data calculator 74.

The average data calculator 74 calculates an average of odd horizontal line data and even horizontal line data from each of two adjacent frame data, and outputs the sum of the calculated average values as data of two adjacent lines. For example, the average data calculator 74 may determine the first and second line data HL1 and HL2 of the n-th frame (where n is a positive integer of 2 or more) as shown in FIG. The average value is calculated and the average value of the first and second line data HL1 and HL2 of the nth frame is calculated. The average data calculator 74 outputs data obtained by adding the average value calculated in each of the n-1 th frame and the n th frame as the first and second data tar1 of the frame 1. Similarly, the average data calculator 74 calculates an average value of the first and second line data HL1 and HL2 of the n-th frame as shown in FIG. 8 and Equation 2, and first and second of the n + 1th frame. The average value of the line data HL1 and HL2 is calculated, and the data obtained by adding the average value calculated in each of the nth frame and the n + 1th frame is output as the first and second data tar2 of the frame 2.

In Equations 1 and 2, 'pre1' and 'pre2' are data of the first and second lines of the n-1th frame, and 'cur1' and 'cur2' are the first and second lines of the nth frame. Data. 'Nxt1' and 'nxt2' mean data of the first and second lines of the n + 1 th frame.

When the logo is displayed on a dark background, the display data processing unit 75 fades out the logo data so that the brightness of the logo is gradually lowered and disappears.

The subfield mapping unit 76 maps the data from the display data processing unit 75 to a preset subfield pattern. The output data of the subfield mapping unit 76 is supplied to the data driver 77.

The data driver 77 latches data from the subfield mapping unit 76 and supplies the latched data to the address electrodes 83 of the PDP 80 by one line for each horizontal period.

The scan driver 78 supplies the reset pulse of the reset period, the scan pulse of the address period, the sustain pulse of the sustain period, and the erase signal to the scan electrode 81 of the PDP 80.

The sustain driver 79 alternately operates with the scan driver 78 to supply the sustain pulses to the sustain electrode 82 of the PDP 80.

FIG. 9 shows driving waveforms of the address device of the PDP as shown in FIG.

Referring to FIG. 9, the addressing apparatus of the PDP according to the present invention simultaneously applies the rising ramp waveform Ramp-up and the falling ramp waveform Ramp-down to all scan electrodes Y during the reset period. Ramp-up causes a slight discharge in the cells of the full screen, resulting in wall charges in the cells of the full screen. Ramp-down generates a weak erase discharge in the cells, thereby eliminating unnecessarily excessive charges during wall charges and space charges generated by the setup discharge, thereby uniforming the wall charges required for address discharge in the cells of the full screen. Is left.

During the address period, the scan driver 78 sequentially applies the negative scan pulse scn to the scan electrodes Y1 to Yn by two adjacent lines. The scanning direction can be both a forward sequential direction from top to bottom or a reverse sequential direction from bottom to top, as indicated by the dotted line in FIG. 7. The data driver 77 supplies the average value data Adata from the average data calculator 74 to the address electrodes X1 to Xm in synchronization with the scan pulses which are simultaneously supplied for two lines during the address period.

As the voltage difference between the scan pulse (-scn) and the average value data pulse (Adata) and the wall voltage generated during the reset period are added, an address discharge is generated in the cell to which the data pulse (data) is applied.

In the sustain period, sustain pulses sus are applied to the scan electrodes Y1 to Yn and the sustain electrodes Z alternately. Each time the sustain pulse (sus) is applied to the cell selected by the address discharge in the form of surface discharge between the scan electrode (Y) and the sustain electrode (Z) is added to the wall voltage and the voltage of the sustain pulse (sus) in the cell Sustain discharge occurs. At the end of the sustain period, an erase signal in the form of a ramp waveform for canceling the sustain discharge can be supplied.

As described above, the PDP address method and apparatus according to the present invention simultaneously scan two lines at the same time, reduce the address period by sequentially scanning like the single scan method, and reduce the number of driving circuits required compared to the double scan method. Can be reduced. The addressing method and apparatus of the PDP according to the present invention compensates for the loss of resolution and sharpness caused by writing the same data on two lines as an average value between two frames. Furthermore, as shown in FIG. 10, the addressing method and apparatus of the PDP according to the present invention include low-weight weighting subfields, for example, a first subfield SF1 having a brightness weight of '1' to a fourth subfield of brightness weight '8'. Degradation of the display quality can be minimized by addressing the above line doubling scan only at (SF4).

Meanwhile, the addressing method and apparatus of the PDP according to the present invention may simultaneously write average data on two or more lines, for example, three lines, to further reduce the address period.

As described above, the addressing method and apparatus of the PDP according to the present invention can reduce the address period by writing average data two lines at a time and scanning the PDP in a substantially single scan method. Furthermore, the addressing method and apparatus of the PDP according to the present invention can minimize the deterioration of display quality by performing a line doubling scan using data between two frames and performing the line doubling scan only at low luminance weight.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (11)

A method of driving a plasma display panel in which one frame period is divided into a plurality of subfields and time-dividedly driven, And addressing a cell by supplying the same data to at least two lines in a subfield having a low weight among the subfields. The method of claim 1, And calculating an average value of the data of the two frames. The method of claim 2, And selecting the average value as the data. The method of claim 1, The subfields having a low weight are subfields having a weight less than or equal to '8'. A method of driving a plasma display panel in which one frame period is divided into a plurality of subfields and time-dividedly driven, Calculating an average value of the same data lines in two frames; And supplying the average value to at least two lines to select a cell. 1. A plasma display panel in which one frame period is divided into a plurality of subfields for time division driving. And an address circuit for supplying the same data to at least two lines in the subfield having a low weight among the subfields to address a cell. The method of claim 6, The address circuit, And an average data calculator configured to calculate an average value of data of two frames. The method of claim 7, wherein And the address circuit selects the average value as the data. The method of claim 6, The address circuit, An address device of a plasma display panel, wherein the same data is supplied to two lines in subfields whose weight is set to '8' or less. The method of claim 6, The address circuit, And a scan circuit for simultaneously supplying scan pulses synchronized with the data to the at least two lines. 1. A plasma display panel in which one frame period is divided into a plurality of subfields for time division driving. An average data calculator for calculating an average value of the same data lines in two frames; And an address circuit which selects a cell by supplying the average value to at least two lines.