KR20030024215A - Method of forming trench isolation in SOI wafer - Google Patents

Abstract

PURPOSE: A method for forming a trench isolation layer of an SOI substrate is provided to prevent the increase of leakage current by forming a trench isolation layer without a bending phenomenon of a semiconductor layer. CONSTITUTION: A substrate(130) including a base layer(110), a buried oxide layer(115), and a semiconductor layer(120) is prepared. A trench(150) is formed within the semiconductor layer(120) in order to define an active region of the semiconductor layer(120). A thermal oxidation process for the remaining semiconductor layer(120) of a bottom portion of the trench(150) is performed. A thermal oxide layer(155) is formed on an inner wall and the bottom of the trench(150) by performing the thermal process. An insulating layer is formed thereon in order to bury the trench(150) including the thermal oxide layer(155). An isolation layer(180) including the thermal oxide layer(155), a nitride layer liner pattern(165a), and an oxide layer pattern(170a) is formed within the trench(150).

Description

Method of forming trench isolation film in SOI substrate {Method of forming trench isolation in SOI wafer}

The present invention relates to a device isolation method of manufacturing a semiconductor device, and more particularly to a method of forming a trench device isolation film on a silicon on insulator (SOI) substrate.

Unlike a general bulk silicon substrate, an SOI substrate has a stacked structure of a base layer, a buried oxide (Buried Oxide), and a semiconductor layer on which a device is to be formed. In such a structure, the influence of the base layer on the semiconductor layer is eliminated by the investment oxide film, which is an insulating layer, so that the processing, efficiency and characteristics of the semiconductor layer can be greatly improved. Accordingly, ultra-fine circuit processing is possible and the performance of the finished device is improved, so that high integration, high breakdown voltage, high function device, radiation resistance, and high added value can be expected.

The trench isolation layer formed for isolation of an element from an SOI substrate includes a partial trench isolation layer formed shallow so that its bottom does not come into contact with the buried oxide film, and a full portion formed so that its bottom contacts the investment oxide. ) There is a trench isolation layer.

When the partial trench device isolation layer is formed, a body voltage may be applied to the semiconductor layer under the device isolation layer to apply a predetermined voltage, thereby preventing floating body effects and thus operating characteristics thereof. It has the advantage of being stable. However, there is a problem in that a junction is formed between the semiconductor layer to which a voltage is applied and the source / drain region, thereby increasing the junction capacitance.

On the contrary, when the full trench isolation layer is formed, the junction capacitance can be reduced, thereby reducing the power consumption and speed. The present invention relates to a method of forming a full trench device isolation film.

1 and 2 are diagrams according to a process sequence to explain a method of forming a trench isolation layer in a conventional SOI substrate. Elements denoted by the same reference numerals in the drawings means the same element.

Referring to FIG. 1, a buffer oxide film 35 is formed on a substrate 30 on which the base layer 10, the buried oxide film 15, and the semiconductor layer 20 are sequentially stacked, and then the semiconductor layer 20 of the semiconductor layer 20 is formed. The nitride film pattern 40 is formed to expose the region to be separated from the device defining the active region. Next, the buffer oxide film 35 and the semiconductor layer 20 are etched using the nitride film pattern 40 as an etching mask to form a trench 50 exposing the buried oxide film 15.

Referring to FIG. 2, a thermal oxide film 55 is formed on the inner wall and the bottom of the trench 50. The thermal oxide film 55 is applied to the substrate 30 in a subsequent process of curing dislocation defects generated during the formation of the trench 50 and filling the inside of the trench 50 with an insulator. Loss must be formed to relieve thermal stress. Although not shown in the drawings, an isolation layer is formed by filling the inside of the trench 50 with an insulator in a subsequent process, and then removing the nitride layer pattern 40 and the buffer oxide layer 35. As shown in FIG. 2, since the bottom of the thermal oxide film 55 is in contact with the investment oxide film 15, the device formed in the active region is surrounded by the device isolation film and the investment oxide film 15, thereby completing the device. Separation can be achieved.

However, since the trench 50 is formed to expose the buried oxide film 15, oxygen atoms penetrate into the interface between the semiconductor layer 20 and the buried oxide film 15 while the thermal oxide film 55 is formed. easy to do. As a result, when the oxygen atoms penetrated and the atoms of the semiconductor layer 20 at the interface portion oxidize, the interface between the semiconductor layer 20 and the buried oxide film 15 is excited as indicated by reference numeral 60 in FIG. 2. In addition, the semiconductor layer 20 may be bent. When the semiconductor layer 20 is bent, there is a problem that a potential defect occurs and a leakage current increases.

An object of the present invention is to provide a method for forming a trench isolation layer without the problem that the semiconductor layer is bent in the SOI substrate.

1 and 2 illustrate a method of forming a trench isolation layer in a conventional SOI substrate according to a process sequence.

3 to 7 are diagrams illustrating a method of forming a trench isolation layer in an SOI substrate according to an embodiment of the present invention in a process sequence.

<Explanation of symbols for the main parts of the drawings>

110: base layer, 115: investment oxide film, 120: semiconductor layer,

150 trench, 155 thermal oxide film, 165 nitride film liner

170: insulating film, 180: device isolation film

In order to achieve the above technical problem, in the trench isolation layer forming method of the SOI substrate according to the present invention, a substrate in which a base layer, a buried oxide film and a semiconductor layer are sequentially stacked is provided. A trench is formed in the semiconductor layer so as to define an active region of the semiconductor layer, and a semiconductor layer having a predetermined thickness is left under the trench. A thermal oxidation process is performed to consume all of the semiconductor layer remaining in the lower portion of the trench, thereby forming a thermal oxide film on the inner wall and the bottom of the trench, the thermal oxide film contacting the buried oxide film. Next, an insulating film which completely fills the trench in which the thermal oxide film is formed is formed.

In the present invention, even if the thermal oxidation process is performed only until the semiconductor layer remaining in the lower portion of the trench is exhausted, the thickness of the semiconductor layer remaining in the lower portion of the trench may have a predetermined thickness so as to form a thermal oxide film having a desired thickness. It is preferable to determine the thickness of the semiconductor layer when forming the thermal oxide film.

According to the present invention, a semiconductor layer having a predetermined thickness is left under the trench, and all the remaining semiconductor layers are consumed to form a thermal oxide film in contact with the buried oxide film. Therefore, since oxygen atoms are prevented from penetrating into the interface between the semiconductor layer and the buried oxide film while the thermal oxide film is formed, a trench device isolation film can be formed without the problem that the semiconductor layer is bent.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, embodiments of the present invention may be modified in many different forms, and the scope of the present invention should not be construed as being limited to the embodiments described below. The embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and the like of the elements in the drawings are exaggerated to emphasize a more clear description, and the elements denoted by the same reference numerals in the drawings means the same elements. In addition, where a layer is described as being "on" another layer or semiconductor substrate, a layer may exist in direct contact with said other layer or semiconductor substrate, or a third layer therebetween. Can be done.

3 to 7 are diagrams illustrating a method of forming a trench isolation layer in an SOI substrate according to an embodiment of the present invention in a process sequence.

Referring to FIG. 3, a substrate 130 in which the base layer 110, the buried oxide film 115, and the semiconductor layer 120 are sequentially stacked is provided. First, a buffer oxide layer 135 and a nitride layer 140 are sequentially formed on the semiconductor layer 120, and a device isolation region, which defines an active region of the semiconductor layer 120, is formed on the nitride layer 140. The photosensitive film pattern 145 to be exposed is formed. The nitride layer 140 is formed to act as a planarization end point in a subsequent process, and the buffer oxide layer 135 is formed to act as a buffer between the nitride layer 140 and the semiconductor layer 130 having different physical properties.

Subsequently, the nitride film 140 is etched using the photoresist pattern 145 as an etch mask, and the buffer oxide film 135 and the semiconductor layer (using the photoresist pattern 145 and the patterned nitride film 140 as an etch mask). The trench 150 is formed by etching a portion of the 120. At this time, the semiconductor layer 120 having a predetermined thickness h is left below the trench 150. The thickness h of the semiconductor layer 120 remaining below the trench 150 may be determined in consideration of the thickness of the semiconductor layer 120 when the thermal oxide film having a predetermined thickness is formed. This will be described later.

Referring to FIG. 4, after removing the photoresist pattern 145, a thermal oxide layer 155 is formed on the inner wall and the bottom of the trench 150 at the bottom of the trench 150. . To this end, a thermal oxidation process is performed to heat-treat the resultant product in which the trench 150 is formed in a gas atmosphere including oxygen, thereby consuming all of the semiconductor layer 120 remaining under the trench 150. The thermal oxide film 155 cures the potential defect generated during the formation of the trench 150, and thermal stress applied to the substrate 130 in a subsequent process of filling the trench 150 with an insulator. To mitigate.

In FIG. 3, the thickness h of the semiconductor layer 120 remaining under the trench 150 is determined in consideration of the thickness of the semiconductor layer 120 when the thermal oxide film having a predetermined thickness is formed. This is to form the thermal oxide film 155 having a desired thickness t even when the thermal oxidation process is performed only until the semiconductor layer 120 remaining under the trench 150 is exhausted.

In general, the thickness of the semiconductor layer consumed when forming a thermal oxide film having a predetermined thickness may be calculated as a ratio of the density and the molecular weight of each material constituting the thermal oxide film and the semiconductor layer. Accordingly, when the silicon layer is consumed to form the silicon oxide film, it is generally calculated that the silicon layer of 45 thickness is consumed in order to form the silicon oxide film having a thickness of 100. Therefore, when the semiconductor layer 120 is a silicon layer, the thickness of the semiconductor layer 120 remaining under the trench 150 to form the thermal oxide film 155 having a thickness t of about 50 nm ( h) is determined to be about 22.5 nm. Thus, even if the thermal oxidation process is performed only until the entire semiconductor layer 120 remaining at about 22.5 nm is consumed, the thermal oxide film 155 having a thickness t of about 50 nm can be formed as desired. Since the semiconductor layer 120 remaining under the trench 150 is exhausted, the thermal oxide film 155 is formed in contact with the buried oxide film 115. Thus, a full trench device isolation film is formed that can reduce the junction capacitance. As such, the thermal oxidation process is performed only until the semiconductor layer 120 remaining in the lower portion of the trench 150 is exhausted so that oxygen atoms penetrate into the interface between the semiconductor layer 120 and the buried oxide film 115. Can be prevented as much as possible.

As described above, conventionally, since a trench for exposing the buried oxide film is formed and then a thermal oxidation process is performed, oxygen atoms penetrate into the interface between the semiconductor layer and the buried oxide film, thereby causing the semiconductor layer to bend. . However, according to the present exemplary embodiment, the semiconductor layer 120 having a predetermined thickness is left in the lower portion of the trench 150 so as not to expose the buried oxide film 115, and then the semiconductor 150 is left in the lower portion of the trench 150. A thermal oxidation process that consumes layer 120 is performed. Therefore, since the penetration of oxygen atoms into the interface between the semiconductor layer 120 and the buried oxide film 115 is prevented as much as possible, the interface between the semiconductor layer 120 and the buried oxide film 115 as shown by the reference numeral 160 of FIG. 4. The semiconductor layer 120 is not bent at the portion. As a result, according to the present embodiment, it is possible to prevent the phenomenon that the leakage current increases because potential occurrence defects are alleviated.

Referring to FIG. 5, an inner wall and a bottom of the trench 150 in which the thermal oxide film 155 is formed may be formed so that the thermal oxide film 155 is no longer oxidized in the subsequent process and the insulation characteristics of the device isolation layer may be enhanced. The nitride film liner 165 is formed on the substrate. Next, a USG (Undoped Silicate Glass) film is formed as an oxide film 170 which completely fills the trench 150 in which the nitride film liner 165 is formed, or by using HDP-CVD (High Density Plasma-Chemical Vapor Deposition) method. An oxide film is formed.

Referring to FIG. 6, the patterned nitride layer 140 is exposed by planarizing the upper surface of the resultant product on which the oxide layer 170 is formed by chemical mechanical polishing (CMP). At this time, as the patterned nitride film 140 is also polished to a considerable thickness, the patterned nitride film 140a is shown in the drawing as a reduced thickness. In this step, the oxide film 170 and the nitride film liner 165 are also patterned to form the oxide film pattern 170a and the nitride film liner pattern 165a, respectively. Since there is a difference in polishing rate according to the film quality in the CMP process, the upper surface of the oxide pattern 170a may be slightly lower than the upper surface of the patterned nitride layer 140a.

Referring to FIG. 7, the upper surface of the semiconductor layer 120 is exposed by removing the patterned nitride layer 140a and the buffer oxide layer 135 from the resultant of FIG. 6. The patterned nitride layer 140a may be removed by a phosphoric acid (H ₃ PO ₄ ) strip method. The buffer oxide layer 135 may be removed using diluted hydrofluoric acid (HF). As a result, an isolation layer 180 including the thermal oxide layer 155, the nitride layer liner pattern 165a, and the oxide layer pattern 170a is formed in the trench 150. After that, a transistor or the like is formed in the active region according to a conventional method to manufacture an SOI device.

In the above, the present invention has been described in detail with reference to preferred embodiments, but the present invention is not limited to the above embodiments, and various modifications can be made by those skilled in the art within the technical idea of the present invention. Is obvious.

According to the present invention described above, when a trench is formed in the semiconductor layer so as to define an active region of the semiconductor layer of the SOI substrate, a semiconductor layer having a predetermined thickness is left under the trench. In the subsequent thermal oxidation process, the semiconductor layer remaining in the lower portion of the trench is consumed to form a thermal oxide film on the inner wall and the bottom of the trench at the bottom of the trench. Therefore, as compared with the conventional process of forming a trench for exposing the buried oxide film and then performing a thermal oxidation process, the problem of oxygen atoms penetrating into the interface between the semiconductor layer and the buried oxide film is prevented as much as possible. As a result, a trench isolation layer may be formed without the problem of bending the semiconductor layer while the thermal oxide layer is formed. By solving the bending problem of the semiconductor layer, it is possible to prevent the phenomenon that the leakage current increases due to the potential defect.

Claims (5)

Providing a substrate in which a base layer, an investment oxide film, and a semiconductor layer are sequentially stacked; Forming a trench in the semiconductor layer to define an active region of the semiconductor layer, but leaving a semiconductor layer having a predetermined thickness below the trench; Performing a thermal oxidation process that consumes all of the semiconductor layer remaining in the lower portion of the trench to form a thermal oxide film on the inner wall and the bottom of the trench, the thermal oxide film contacting the buried oxide film at the bottom of the trench; And And forming an insulating film that completely fills the trench in which the thermal oxide film is formed. The semiconductor layer of claim 1, wherein the thickness of the semiconductor layer remaining in the lower portion of the trench is lower than a predetermined thickness so that a thermal oxidation layer having a desired thickness may be formed even if the thermal oxidation process is performed only until the semiconductor layer remaining in the lower portion of the trench is consumed. The method of forming a trench device isolation film, characterized in that determined in consideration of the thickness consumed by the semiconductor layer when forming a thermal oxide film. The method of claim 1, wherein forming a trench in the semiconductor layer, but leaving a semiconductor layer having a predetermined thickness under the trench, Sequentially forming a buffer oxide film and a nitride film on the semiconductor layer; Patterning the nitride film to expose an isolation region to define the active region; And And etching a portion of the buffer oxide film and the semiconductor layer using the patterned nitride film as an etching mask. The semiconductor layer of claim 3, wherein the thickness of the semiconductor layer remaining in the lower portion of the trench is lower than a predetermined thickness so that a thermal oxidation layer having a desired thickness can be formed even if the thermal oxidation process is performed only until the semiconductor layer remaining in the lower portion of the trench is consumed. The method of forming a trench isolation layer, characterized in that determined in consideration of the thickness of the semiconductor layer is consumed when forming a thermal oxide film. The method of claim 3, wherein the step of forming an insulating film filling the trench in which the thermal oxide film is formed is completely filled. Forming a nitride film liner on an inner wall and a bottom of the trench in which the thermal oxide film is formed; Forming an oxide film completely filling the trench in which the nitride film liner is formed; Planarizing an upper surface of the resultant product on which the oxide film is formed to expose the patterned nitride film; And And removing the patterned nitride layer and the buffer oxide layer.