KR20020056110A - array panel of liquid crystal display device and manufacturing method thereof - Google Patents

Abstract

PURPOSE: An array substrate of a liquid crystal display and a method of fabricating the array substrate are provided to reduce the number of fabrication process steps so as to decrease manufacturing cost and to prevent light leakage. CONSTITUTION: An array substrate of a liquid crystal display includes a substrate, a plurality of gate lines(121) formed on the substrate in one direction, a gate electrode(122) connected to each gate line, the first and second light-shielding patterns(123,124) formed of the same material as the material of the gate lines and arranged being perpendicular to the gate lines. The first and second light-shielding patterns have a specific distance between the two patterns. The array substrate further includes a gate insulating layer formed on the gate lines, the gate electrode, the first and second light-shielding patterns, a semiconductor layer(141) formed on the gate insulating layer, and an ohmic contact layer formed on the semiconductor layer. The array substrate also has data lines each of which intersects the gate lines and is placed between the first and second light-shielding patterns, a source electrode(162) extended from a data line, and a drain electrode(163) placed opposite to the source electrode. The array substrate further has a passivation layer that is formed on the data lines, source and drain electrodes and has a contact hole(171) exposing a part of the drain electrode, and a pixel electrode(181) formed on the passivation layer, connected to the drain electrode and partially superposed on the first and second light-shielding patterns.

Description

Array substrate for liquid crystal display device and manufacturing method thereof

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device and a manufacturing method thereof, and more particularly, to an array substrate for a liquid crystal display device and a manufacturing method thereof.

Recently, with the rapid development of the information society, there is a need for a flat panel display having excellent characteristics such as thinning, light weight, and low power consumption. Among them, a liquid crystal display having excellent color reproducibility, etc. displays are actively being developed.

In general, a liquid crystal display device arranges two substrates on which electrodes are formed so that the surfaces on which the two electrodes are formed face each other, injects a liquid crystal material between the two substrates, and applies a voltage to the two electrodes to generate an electric field. By moving the liquid crystal molecules, the image is expressed by the transmittance of light that varies accordingly.

Hereinafter, a structure of a general liquid crystal display device will be described with reference to the accompanying drawings.

1 is a cross-sectional view of a general liquid crystal display.

As shown in FIG. 1, a gate electrode 21 made of a conductive material such as a metal is formed on a transparent first substrate 10, and a silicon nitride film (SiN _x ) or a silicon oxide film (SiO ₂ ) is formed thereon. The gate insulating film 30 covers the gate electrode 21. An active layer 41 made of amorphous silicon is formed on the gate insulating layer 30 on the gate electrode 21, and ohmic contact layers 51 and 52 made of amorphous silicon doped with impurities are formed thereon.

Source and drain electrodes 61 and 62 made of a conductive material such as metal are formed on the ohmic contact layers 51 and 52, and the source and drain electrodes 61 and 62 are formed together with the gate electrode 21. (T).

Subsequently, a passivation layer 70 made of a silicon nitride film, a silicon oxide film, or an organic insulating layer is formed on the source and drain electrodes 61 and 62, and the passivation layer 70 has a contact hole 71 exposing the drain electrode 62. Has

A pixel electrode 81 made of a transparent conductive material is formed on the passivation layer 70, and the pixel electrode 81 is connected to the drain electrode 62 through the contact hole 71.

On the other hand, the second substrate 90 is spaced apart from the first substrate 10 at regular intervals on the first substrate 10 and a transparent second substrate 90 is disposed, and the black matrix 91 is disposed on the inner surface of the second substrate 90. ) Is formed at a position corresponding to the thin film transistor T. A color filter 92 is formed below the black matrix 91, and the color filter 92 sequentially repeats the colors of red (R), green (G), and blue (B). It corresponds to one pixel area. The common electrode 93 made of a transparent conductive material is formed under the color filter 92.

The liquid crystal layer 100 is injected between the two substrates 10 and 90.

The liquid crystal display is formed through a process of forming a lower array substrate and an upper color filter substrate, and arranging the lower pixel electrode and the upper color filter in a one-to-one correspondence.

2 is a plan view of an array substrate for a general liquid crystal display device.

As shown in FIG. 2, the horizontal gate line 22 and the vertical data line 63 cross each other, and the thin film transistor T is formed at the intersection of the gate line 22 and the data line 63. It is.

The pixel electrode 81 is formed in the pixel region defined by the gate wiring 22 and the data wiring 63, and the pixel electrode 81 is connected to the thin film transistor T. In addition, the pixel electrode 81 partially overlaps the gate wiring 22 to form a storage capacitor together with the gate wiring 22.

When arranging the array substrate and the color filter substrate, the pixel electrode 81 and the color filter must correspond one-to-one, and the upper black matrix should be disposed to cover an area except the pixel electrode 81. The black matrix and the pixel It is difficult to accurately match the edge portion of the electrode 81. Therefore, there is a high probability of misalignment, and when misalignment occurs, a gap is generated between the black matrix and the pixel electrode 81, and light leakage may occur in this portion.

In order to prevent this, the black matrix is formed to be wider in consideration of the bonding margin, so that the black matrix overlaps the pixel electrode by the bonding margin. In this case, the bonding margin is about 5 μm in consideration of problems such as aperture ratio.

However, when the color filter substrate and the array substrate are bonded to each other and the subsequent process is performed, the size of the substrate may vary depending on the temperature of the process, and since the types of the color filter substrate and the array substrate are different, the degree of change in the size of the substrate is different. do. As a result, even if the width of the black matrix is widened, there is a problem that light is leaked due to a portion that is displaced between the black matrix and the pixel electrode.

Meanwhile, an array substrate of a liquid crystal display device is formed by repeating a process of forming a thin film and performing photolithography. The photolithography process involves various processes such as cleaning, photoresist coating, exposure and development, and etching. Thus, shortening the photolithography process only once significantly reduces manufacturing time and reduces manufacturing costs. In general, the number of masks used in the photolithography process represents the number of processes. The array substrate having the structure as shown in FIG. 2 is manufactured using five masks, but it is necessary to reduce the manufacturing cost by reducing the number of masks.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems, and an object of the present invention is to provide an array substrate for a liquid crystal display device and a method of manufacturing the same, which can reduce manufacturing costs by reducing the number of processes and prevent light leakage. .

1 is a cross-sectional view of a general liquid crystal display device.

2 is a plan view of an array substrate for a general liquid crystal display device.

3 is a plan view of an array substrate for a liquid crystal display device according to the present invention;

4 is a cross-sectional view taken along the line IV-IV of FIG. 3.

FIG. 5 is a cross-sectional view taken along the line VV of FIG. 3. FIG.

6A-6D and 7A-7D are cross-sectional views illustrating a process of fabricating an array substrate in accordance with the present invention.

8 is a cross-sectional view of a mask according to the present invention.

In the array substrate for a liquid crystal display device according to the present invention for achieving the above object, a plurality of gate wirings having one direction and a gate electrode connected to the gate wirings are formed on the substrate. Subsequently, first and second light shielding patterns made of the same material as the gate wiring and having a direction perpendicular to the gate wiring and spaced apart from each other by a predetermined interval are formed, and a gate insulating film is formed thereon. A semiconductor layer and an ohmic contact layer are sequentially formed on the gate insulating layer, and a data wiring orthogonal to the gate wiring and positioned between the first and second light blocking patterns on the ohmic contact layer, a source electrode extending from the data wiring, and a source electrode. A drain electrode located on the opposite side is formed. Next, a passivation layer having a contact hole exposing a part of the drain electrode is formed on the data line and the source and drain electrodes, and a pixel electrode connected to the drain electrode thereon and partially overlapping the first and second light blocking patterns. Formed. Here, the ohmic contact layer has the same shape as the data line, the source and the drain electrode, and the semiconductor layer has the same shape as the data line and the source and the drain electrode except between the source and the drain electrode.

In the present invention, the first light blocking pattern may be connected to the gate line.

In addition, the second light blocking pattern may partially overlap the data line.

In the method of manufacturing an array substrate according to the present invention, after the substrate is provided, a metal material is deposited on the substrate and patterned with a first mask to form first and second light shields having a direction perpendicular to the gate wiring, the gate electrode, and the gate wiring. Form a pattern. Subsequently, a gate insulating film, an amorphous silicon layer, an impurity amorphous silicon layer, and a metal layer are sequentially deposited on the gate wiring. Next, the metal layer, the impurity amorphous silicon layer, and the amorphous silicon layer are sequentially patterned using the second mask to form a semiconductor layer, an ohmic contact layer, a data line, a source electrode, and a drain electrode. Subsequently, an insulating material is deposited on the data line, and a protective layer having a contact hole partially exposing the drain electrode is formed by a patterning process using a third mask. Next, a transparent conductive material is deposited on the passivation layer and patterned with a fourth mask to form a pixel electrode partially overlapping the first and second light blocking patterns.

The first light blocking pattern may be connected to the gate line.

The present invention may further include the step of partially overlapping the second light blocking pattern with the data line and shorting the data line and the second light blocking pattern.

In the present invention, the second mask may have a slit pattern at a portion corresponding between the source and drain electrodes.

As described above, in the present invention, an array substrate is manufactured using four masks, thereby reducing the number of processes and forming a light shielding pattern overlapping with the pixel electrode to improve the bonding margin of the upper and lower substrates. In addition, any one of the light blocking patterns may be connected to the gate line to increase the storage capacitor capacity, and the other may overlap the data line to repair the data line when the data line is disconnected.

Hereinafter, an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

3 is a plan view of an array substrate for a liquid crystal display according to an exemplary embodiment of the present invention, and FIGS. 4 and 5 are cross-sectional views taken along lines IV-IV and V-V in FIG. 3, respectively. .

3, 4, and 5, the gate electrode 122, which is a branch of the gate wiring 121 in the horizontal direction, and the gate wiring 121, and the gate wiring 121 are disposed on the transparent insulating substrate 110. The first light blocking pattern 123 extending in the vertical direction and the second light blocking pattern 124 in the vertical direction spaced apart from the first light blocking pattern 123 at regular intervals are formed.

Next, a gate insulating layer 130 is formed on the gate wiring 121, the gate electrode 122, and the first and second light blocking patterns 123 and 124 to cover them.

An active layer 141 made of amorphous silicon and ohmic contact layers 151 and 152 made of amorphous silicon doped with impurities are sequentially formed on the gate insulating layer 130.

The vertical data lines 161 are formed on the ohmic contact layers 151 and 152, and the data lines 161 define a pixel area by crossing the gate lines 121, and extend from the data lines 161. The source electrode 162 and the drain electrode 163 formed opposite the source electrode 162 face each other with respect to the gate electrode 122.

The ohmic contact layers 151 and 152 have the same shape as the data line 161, the source electrode 162, and the drain electrode 163, and the active layer 141 is formed between the source and drain electrodes 162 and 163. Except for the channel portion, the data line 161, the source electrode 162, and the drain electrode 163 have the same shape.

A protective layer 170 made of a silicon nitride film, a silicon oxide film, or an organic insulating film is formed on the data line 161 and the source and drain electrodes 162 and 163, and the protective layer 170 partially covers the drain electrode 163. It has a contact hole 171 to expose.

A pixel electrode 181 made of a transparent conductive material is formed in the pixel region above the passivation layer 170. The pixel electrode contacts the drain electrode 163 through the contact hole 171, and the front gate wiring 121. And some overlap to form a storage capacitor. In this case, a storage capacitor may be formed by forming a pattern connected to the pixel electrode 181 by using the same material as the data line 161 on the gate line 121. In addition, the pixel electrode 181 partially overlaps the first and second light blocking patterns 123 and 124.

In general, the upper black matrix (not shown) and the pixel electrode 181 are formed to overlap by about 5 μm in consideration of the bonding margin. In the present invention, the first and second light blocking patterns 123 and 124 are formed of the pixel electrode ( The width of the portion not overlapping with 181) is about 2 μm. Therefore, the bonding margin is increased to about 7 μm compared with the conventional, so that light leakage can be prevented even if the size change of the upper substrate and the lower substrate is different.

In addition, since the first light blocking pattern 123 is connected to the gate line 121 to form a capacitor, the capacity of the storage capacitor is increased.

On the other hand, in recent years, as the size and size of liquid crystal display devices have increased, the length of the wiring has become longer and the width thereof has decreased. As a result, the probability of disconnection of the wire increases, and when the data wire 161 is disconnected, a defect such as a line defect occurs.

Here, the upper and lower portions of the second light blocking pattern 123 extend to overlap with the data line 161. When the data line 161 is disconnected, the short circuit part is shorted to repair the disconnection of the data line 161. can do.

Meanwhile, in a typical liquid crystal display device, the pixel electrode 181 and the data line 161 are usually spaced apart by about 3 μm. In this case, the pixel electrode 181 and the data line 161 are separated by the parasitic capacitance between the pixel electrode 181 and the data line 161. Coupling may occur. However, in the present invention, the distance between the pixel electrode 181 and the data line 161 is increased by reducing the width of the pixel electrode 181 within a range overlapping the light blocking patterns 123 and 124. ) And the parasitic capacitance between the data line 161 can be reduced. Therefore, the image quality of the liquid crystal display device can be improved.

A method of manufacturing the array substrate for a liquid crystal display device will be described in detail with reference to FIGS. 6A to 6D and 7A to 7D.

6A to 6D are cross-sectional views corresponding to line IV-IV in FIG. 3, and FIGS. 7A to 7D are cross-sectional views corresponding to line V-V in FIG. 3.

First, as illustrated in FIGS. 6A and 7A, a metal material is deposited on a transparent substrate 110 such as glass by a sputtering method, and patterned by a photolithography process using a first mask to form a horizontal gate line 121. And the gate electrode 122, which is a branch of the gate wiring 121, and the vertical direction spaced apart from the first light blocking pattern 123 and the first light blocking pattern 123 extending in the vertical direction from the gate wiring 121. The second light blocking pattern 124 is formed.

Here, the gate wiring 121 may be formed of a material having a small specific resistance and having good adhesion to the substrate 110.

Next, as illustrated in FIGS. 6B and 7B, a silicon nitride film, a silicon oxide film 130, an amorphous silicon film, and an amorphous silicon film doped with impurities are sequentially deposited, and then a metal layer is deposited by a sputtering method. Subsequently, the metal layer, the impurity amorphous silicon film, and the amorphous silicon film are sequentially patterned using the second mask, so that the data line 161, the source and drain electrodes 162 and 163, the ohmic contact layers 151 and 152, and the active layer are patterned. 141 is formed.

In this case, the second mask used includes three parts having different light transmitting regions, and the second mask is illustrated in FIG. 8.

As shown, a film for blocking light is formed on the transparent substrate 210, so that light does not pass through the portion A corresponding to the data line 161 and the source and drain electrodes 162 and 163. The portion B corresponding to the channel between the source and drain electrodes 162 and 163 transmits only part of the light, and the remaining part C transmits all of the light. A fine pattern such as a slit is formed in the portion B, and the light transmittance becomes smaller than the portion C due to the diffraction phenomenon of the light.

By using such a mask to form a photoresist pattern having a different thickness on the metal layer and performing an etching process, the data wiring 161, the source and drain electrodes 162 and 163, and the ohmic contact layers 151 and 152 in one etching process. And the active layer 141 may be formed.

Next, as illustrated in FIGS. 6C and 7C, the protective layer 170 is formed by depositing or applying a silicon nitride film, a silicon oxide film, or an organic insulating film, and patterning the protective layer 170 by a photolithography process using a third mask. The contact hole 171 is formed on the drain electrode 163.

Next, as shown in FIGS. 6D and 7D, a material such as indium-tin-oxide (ITO) or indium-zinc-oxide (IZO) is deposited, and the fourth layer is deposited. The pixel electrode 181 is formed by patterning using a mask. The pixel electrode 181 is connected to the drain electrode 162 through the contact hole 171, and partially overlaps the front gate line 121 and the first and second light blocking patterns 123 and 124.

As described above, since the array substrate for the liquid crystal display device according to the present invention is manufactured using four masks, the manufacturing process and the manufacturing cost can be reduced compared to the conventional array substrate using the five masks.

The present invention is not limited to the above embodiments, and various changes and modifications can be made without departing from the spirit of the present invention.

The liquid crystal display according to the present invention can reduce manufacturing costs by manufacturing using four masks, and improves process margins by forming first and second light blocking patterns partially overlapping the pixel electrodes with a material such as a gate wiring. It can prevent light leakage defect. In addition, one of the light blocking patterns is connected to the gate wiring to improve the capacity of the storage capacitor, and the other light blocking pattern is partially overlapped with the data wiring so that when the data wiring is disconnected, the data wiring and the light blocking pattern are shorted. The break can be repaired.

On the other hand, by reducing the area of the pixel electrode within the overlapping width of the light blocking pattern and the pixel electrode, the distance between the data line and the pixel electrode can be increased to reduce the parasitic capacitance between the pixel electrode and the data line. Therefore, it is possible to improve spots and to improve image quality.

Claims (7)

Board; A plurality of gate lines having one direction on the substrate and a gate electrode connected to the gate lines; First and second light blocking patterns made of the same material as the gate wiring and having a direction perpendicular to the gate wiring and spaced apart from each other by a predetermined interval; A gate insulating layer formed on the gate wiring, the gate electrode, and the first and second light blocking patterns; A semiconductor layer formed on the gate insulating layer; An ohmic contact layer formed on the semiconductor layer; A data line formed on the ohmic contact layer and orthogonal to the gate line and positioned between the first and second light blocking patterns, a source electrode extending from the data line, and a drain electrode disposed opposite the source electrode; ; A protective layer formed over the data line and the source and drain electrodes and having a contact hole partially exposing the drain electrode; A pixel electrode formed on the passivation layer and connected to the drain electrode and partially overlapping the first and second light blocking patterns Including; The ohmic contact layer has the same shape as the data line, the source and drain electrodes, and the semiconductor layer has the same shape as the data line and the source and drain electrodes except between the source and drain electrodes. Array substrate for devices. The method of claim 1, And the first light blocking pattern is connected to the gate line. The method of claim 2, And the second light shielding pattern partially overlaps the data line. Providing a substrate; Depositing a metal material on the substrate and patterning it with a first mask to form first and second light blocking patterns having a gate wiring, a gate electrode, and a direction perpendicular to the gate wiring; Sequentially depositing a gate insulating film, an amorphous silicon layer, an impurity amorphous silicon layer, and a metal layer on the gate wiring; Patterning the metal layer, the impurity amorphous silicon layer, and the amorphous silicon layer with a second mask in order to form a semiconductor layer, an ohmic contact layer, a data line, a source electrode, and a drain electrode; Depositing an insulating material on the data line and forming a protective layer having a contact hole partially exposing the drain electrode through a patterning process using a third mask; Depositing a transparent conductive material on the passivation layer and patterning it with a fourth mask to form a pixel electrode partially overlapping the first and second light blocking patterns Method of manufacturing an array substrate for a liquid crystal display device comprising a. The method of claim 4, wherein The first light blocking pattern is connected to the gate wiring. The method of claim 5, And partially overlapping the second light blocking pattern with the data line, and shorting the data line and the second light blocking pattern. The method of claim 4, wherein And the second mask has a slit pattern at a portion corresponding to the source and drain electrodes.