KR20020018898A - driving apparatus and method for plasma display panel - Google Patents

Abstract

PURPOSE: An apparatus and a method for driving a plasma display panel are provided to improve luminance and resolution by simplifying a drive apparatus and a drive method of the plasma display panel. CONSTITUTION: A drive waveform of one line is formed with 8 sub-fields. Each sub-field is formed with an initial discharge signal, a scan signal of a falling part or a rising part, a sustain discharge signal corresponding to the sub-fields, and an erase period. The initial discharge signal is used for generating an initial wall charge. The scan signal of the falling part or the rising part is used for performing an address discharge. The brightness of the sub-field is determined by the number of the sustain discharge signal. In the erase period, the sustain discharge signal is not applied during a predetermined period to remove an influence of the wall charge on the next sub-field independently of the sustain discharge of the sub-field.

Description

Plasma display panel driving apparatus and driving method {driving apparatus and method for plasma display panel}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AC plasma display panel, and more particularly, to a plasma display panel driving method and a driving apparatus for driving a high resolution plasma display panel with high brightness.

In general, it is well known that a plasma display panel is classified into an AC type and a DC type based on the discharge method. In the AC PDP, the discharge is generated by the AC driving voltage through the dielectric layer, and the DC PDP is caused by the DC driving voltage supplied when the two opposing electrodes are directly exposed to the discharge space. These PDPs are subdivided into various types according to their accompanying structure. Recently, a display panel has been proposed to improve low luminance, which is a disadvantage of PDP, and to improve responsiveness. Representative examples thereof include the "DC type pulse memory plasma display panel" of the Japan NHK Broadcasting Technology Research Institute disclosed in Japanese Laid-Open Patent Publication No. 64-211831, and the "trigger discharge type plasma display panel" of Japan Sony Corporation disclosed in US Patent 4,562,434. . The structure mainly adopted at present is an alternating-type three-electrode surface discharge plasma display panel (hereinafter referred to as PDP).

The PDP 100 according to the prior art is configured as shown in FIG. That is, the front electrode 10 and the rear substrate 20 face each other at a predetermined interval, and the X electrode 11 and the Y electrode 13 are disposed on the opposite surface of the front substrate 10 facing the rear substrate 20. A plurality of address electrodes 21 are disposed at regular intervals on the opposite surface of the rear substrate 20 facing the front substrate 10 and alternately arranged with each other at a predetermined interval, and the X electrodes 11 ) Extends in the longitudinal direction to be orthogonal to the Y electrode 13. Here, the pair of electrode lines of the X electrode 11 and the Y electrode 13 is set to one line. There is a major task that must be preceded in order for a PDP having such a structure to be distributed to general households for TV. In order to realize the most important picture quality among these problems, it is closely related to the driving method. The driving method applied in the AC PDP is largely divided into the addressing period and the display period in time or proceeds simultaneously. It is divided into AWD (address while display) driving method. In the conventional ADS driving method, as shown in FIG. 3, the screen is divided into eight screens having a brightness of 2 ^N-1 , and combined to display 256 gray levels. The screen divided by 2 ^N-1 brightness is called Nth subfield. One subfield of the ADS driving method is divided into three parts between the initial discharge period, the address period, and the sustain discharge, as shown in FIG. In the initial discharge period, high voltage is applied to all the X electrodes and all the Y electrodes so that the plasma inside the panel cells is discharged by the strong electric field in all the lines of the panel. Subsequently, when voltage is continuously applied, the discharged space charge accumulates on the surface of the dielectric (not shown) on the electrode inside the cell, which is called wall charge. The wall charge, which stores the previous discharge, has a memory effect in which the discharge occurs even at a voltage lower than the initial discharge. Then, in the address period, scan pulses are sequentially applied from the top to the bottom of each Y electrode, and an address signal is applied to the address electrodes according to the screen data at the time of applying the scan pulses to the corresponding lines. When the cells in the line discharge in accordance with the signal, the wall charges are erased. Otherwise, the wall charges are maintained. Finally, in the sustain discharge period, high voltage signals are alternately applied to all the X electrodes and all the Y electrodes, and the cells of the entire screen are discharged depending on whether or not the wall charge is maintained. The number of discharges is determined according to the number of signals of the entire X electrode and the Y electrode, and the brightness of the subfield is determined. In this way, one screen is composed of a combination of eight subfields having different brightnesses.

However, in the conventional ADS driving method illustrated in FIG. 2, as the resolution of the screen increases, the number of scan pulses increases in each subfield, thereby increasing the address time, and thus, occupies a large portion of the address time in the entire screen driving time. Reduce the time to discharge and discharge them. Therefore, if the brightness of the screen is low or severe, there is a limit of the number of lines that can be driven due to the lack of time for sustain discharge.

Like the conventional ADS driving method, the conventional AWD driving method divides the screen into a screen having a brightness of 2 ^N-1 as shown in FIG. 5 and displays 256 gray levels by combining the screens. Unlike the ADS driving method, as shown in FIG. 4, the AWD driving method is different from the initial discharge period, the address period, and the sustain discharge period in each subfield in time. Address the line. In the case of 256 gradations, as shown in FIG. 5 during one gradation expression time (65 μs = 1H), the addresses of each subfield are overlapped eight times and divided into eight time intervals during one gradation representation to solve this problem. As shown, each of the eight subfields is addressed. Therefore, when there are 256 or more lines to be driven, the number of overlapping addresses is eight or more during the time to express one gray scale, thereby limiting the number of lines that can be driven. In order to drive a VGA (640X480) panel, the 480 lines are driven using a two-block driving method in which an address electrode is physically divided into an upper part and a lower part to simultaneously drive an upper screen and a lower screen. However, in this case, since each data driving LSI is required at the top and the bottom, the data driving LSI twice as large as the ADS driving method shown in FIG. 3 is required. In the case of the AWD driving method, the driving method requires two-block driving even when driving a VGA-level panel. In order to achieve higher resolution, the number of driving LSIs must be increased and the panel structure must be changed.

Accordingly, an object of the present invention is to provide a driving method and a driving apparatus of a plasma display panel which realizes high brightness and high resolution while simplifying driving.

Another object of the present invention is to provide a driving method and a driving apparatus of a plasma display panel which enables lowering of driving power.

1 is a block diagram showing a typical AC three-electrode surface discharge plasma display panel.

Figure 2 is a drive waveform diagram applied to the ADS (Addressing and Display Separated) driving method of the AC plasma display panel according to the prior art.

3 is a driving address flowchart applied to the ADS driving method of the AC plasma display panel according to the prior art;

Figure 4 is a drive waveform diagram applied to the address while display (AWD) driving method of the AC plasma display panel according to the prior art.

5 is a driving address flowchart applied to the AWD driving method of the AC plasma display panel according to the prior art.

6A is an address waveform diagram applied to an AC plasma display panel driving method according to the prior art;

FIG. 6B is a change model diagram of an internal cell electric field and wall charge of an address method applied to an AC plasma display panel driving method according to the related art. FIG.

6C is a waveform diagram of an address method applied to an AC plasma display panel driving method according to the present invention;

FIG. 6D is a change model diagram of an internal electric field and a wall charge of an address method applied to an AC plasma display panel driving method according to the present invention; FIG.

6E is a basic waveform diagram of an address discharge between a Y electrode and an address electrode applied to an AC plasma display panel driving method according to the present invention.

6F is a schematic diagram showing the change in the internal electric field and the wall charge of the address discharge between the Y electrode and the address electrode applied to the AC plasma display panel driving method according to the present invention;

6G is a basic waveform diagram of an address discharge between an X electrode and an address electrode applied to an AC plasma display panel driving method according to the present invention;

7 is a basic waveform diagram applied to the AC plasma display panel driving method according to the present invention.

8 is a 512 line address flowchart of one phase circuit configuration applied to an AC plasma display panel driving method according to the present invention;

Fig. 9 is a diagram of eight subfield address waveforms during one gradation applied to the alternating current plasma display panel driving method according to the present invention;

FIG. 10 is a waveform diagram of eight sub-field addresses of zero degree and ninety degree phase changes applied to an AC plasma display panel driving method according to the present invention; FIG.

FIG. 11 is a view illustrating eight subfield address waveforms of 45 degrees and 135 degrees of phase change applied to an AC plasma display panel driving method according to the present invention; FIG.

12 is a 2048 line address flowchart of a four phase circuit configuration applied to an alternating current plasma display panel driving method according to the present invention;

Fig. 13 is a block diagram showing an AC plasma display panel driving apparatus according to the present invention.

14 is a panel connection diagram applied to the AC plasma display panel drive circuit according to the present invention.

15 is a Y electrode driving circuit diagram applied to an AC plasma display panel driving circuit according to the present invention;

The driving method of the plasma display panel according to the present invention for achieving the above object is

One field is divided into a plurality of subfields, and an gradation display is performed for each subfield by allocating an address period for setting cells to be lit among cells of a panel and a sustain discharge period for maintaining the lit state of the set cells. In the driving method of the AC plasma display panel,

An initial discharge period for applying an initial discharge signal for generating initial wall charges required for maintaining a lit state to all cells of the panel at the beginning of each of the subfields;

An address period for applying a scan signal and an address signal at a falling portion of the sustain discharge signal in an address period to form an address discharge for erasing wall charges of cells in which the initial wall charges are not turned on among cells in which the initial wall charges are generated;

A sustain discharge period for applying a desired number of sustain discharge signals to the lit cell to determine the brightness of the subfield; And

And an erasing period in which the sustain discharge signal is not applied to the next subfield regardless of the sustain discharge of the subfield so as not to be influenced by the wall charge.

Preferably, the number of addressable addresses may be increased by applying the scan signal at the rising and falling portions of the sustain discharge signal to discharge and address the X electrode at the rising portion and to discharge and address the Y electrode at the falling portion. . In addition, by changing the phase of the scan signal by the address signal, the time interval between the application of the address signal can be used as the time interval for applying the address signal.

Plasma display panel driving apparatus according to the present invention

A plasma display panel comprising a panel having a front substrate and a rear substrate, an X electrode driving circuit portion for driving the X electrode of the back substrate, a Y electrode driving circuit portion for driving the Y electrode of the back substrate, and a scan circuit portion.

The Y electrode driving circuit unit is composed of a scan driving circuit connected to the Y electrode, a high voltage switch and an energy recovery circuit unit, and a DC-DC converter provided therebetween.

Accordingly, the present invention can simplify driving of a high resolution panel by increasing the number of discharges, decreasing the address signal width, and increasing the number of addressable cells by increasing the number of possible addresses.

Hereinafter, a method and a driving apparatus for driving a plasma display panel according to the present invention will be described in detail with reference to the accompanying drawings. The same code | symbol is attached | subjected to the part of the same structure and the same action as the conventional part.

The present invention uses the driving method of generating 256 gradations with eight subfields in a plasma display panel having a three-electrode surface discharge structure, as in the conventional ADS driving method or AWD driving method, and has three characteristics. First, the present invention reduces the width of the address pulse using the sustain discharge voltage, as shown in Figure 6c. In more detail, in the case of the waveform of the conventional driving method, as shown in FIG. 6A, the address discharge is performed by the address signal and the scan signal. Therefore, the scan signal of the Y electrode rises again after discharging at the lower portion. In this case, since sufficient erasure or generation time is required for the internal wall charges after the address discharge, the address signal and the scan signal must maintain the voltage for a predetermined time, as shown in FIG. 6B. Therefore, it is difficult to narrow the width of the address signal and the scan signal. However, the scan signal of the driving method of the present invention enters the falling portion of the sustain discharge signal, as shown in Fig. 6C. At the portion where the sustain discharge signal of the Y electrode falls, the address discharge is caused by the wall charge and the voltage of the applied address myth. At this time, the wall charge and the space charge in which the voltage of the sustain discharge signal of the X electrode remain are erased even if the voltage applied time is not maintained enough to erase the wall charge after the discharge occurs. Therefore, since the width of the address signal does not need to be wide enough to erase the wall charges, the pulse width can be reduced to 1 μs or less. Since one scan signal enters the falling portion of one sustain discharge signal, the width of the sustain discharge signal can be shortened. Therefore, the number of sustain discharge signals applied per unit time increases and the number of discharges increases, thereby increasing luminance.

Second, the present invention uses the X electrode and the address electrode for address discharge to increase the addressable time. In the conventional driving method, as shown in FIGS. 6A and 6C, the address discharge is performed between the falling portion of the scan signal of the Y electrode and the address electrode. However, as shown in FIG. 6E, when the scan signal is applied to the rising portion of the sustain discharge of the Y electrode, as shown in FIG. 6F, the wall charge of the X electrode and the address myth and discharge applied to the address electrode are performed. . Since such discharge is also an address discharge that erases the erase of the internal wall charges, the use of the rising portion of the sustain discharge myth as a scan waveform increases the addressable time by two times as compared with using only the falling portion.

Third, the present invention uses the time interval of the address myth as a time that can be addressed through the phase change. That is, as shown in FIG. 6G, when the phase difference between the sustain discharge signal applied to the upper cell and the lower cell and the scan signal by the scan signal can be used as an address signal, a time interval for addressing the upper cell. For example, if the period of the sustain discharge pulse is 8 μs and the scan pulse width is 1 μs, 6 μs except for the rising part and the falling part is the time when the address signal is not applied. In order to use this time as an address time, a sustain discharge signal and a scan signal having a phase difference equal to the scan signal width are applied. In this case, an address signal of another line is applied to a cell for sustain discharge or initial discharge. In this case, the presence or absence of an address signal does not affect the discharge due to nonlinearity of plasma discharge. In this case, the addressable time is increased four times by using time efficiently without physically dividing one address electrode. Therefore, two maintenance discharges and scanning circuits with phase difference are used without changing the existing panel structure, addressed in the rising part and the falling part, and 2048 times of maintenance discharges per one cycle (16.7ms per frame). If configured as SXGA (1024X1024) resolution can be implemented. The number of SXGA addresses is required 8192 (1024X8) times because the number of lines and the eight subfields must be addressed separately. In the driving method of the present invention, the number of addresses is one in sustain discharge, two in rise and fall addresses, and two in number. The 8192 (2048X2X2) address can be used twice for time use by the phase difference circuit. When three blocks are used in the same environment, up to QXGA (2048X1536) can be implemented. When driving with up to four blocks, a panel having a resolution of up to 2048 lines can be driven.

As a result of these three proposals, the wall discharge is not reduced because the gap between the sustain discharge signals of the driving waveform is lost, and thus the sustain discharge voltage can be lowered. Therefore, it is possible to use a device with a low breakdown voltage, and since the discharge signal plays a role of bias voltage, a separate bias voltage is not required and the driving circuit cost can be lowered. Finally, because the driving voltage is lower than the existing driving method, low power driving is possible when the sustain discharge frequency is the same as other driving methods.

The driving waveform of the present invention is as shown in FIG. That is, the driving waveform of one line is composed of eight subfields, and each subfield is composed of four parts of an initial discharge signal, a scan signal of a falling or rising part, a sustain discharge signal corresponding to a subfield, and an erase period. have. The initial discharge signal is a signal for generating initial wall charges, and the scan signal of the falling or rising portion discharges the address with the scan signals of the rising and falling portions of the sustain discharge signal. Thereafter, the brightness of the subfield is determined according to the number of sustain discharge signals. Finally, in the erasing period, the sustain discharge signal is not applied for a predetermined time in order not to influence the next subfield regardless of the sustain discharge of the subfield. Such a driving waveform is moved by one gray level for each gray line (65 mu s = 1 H) and applied in the address order as shown in FIG. The basic driving waveform uses a narrow address and an X electrode address, which are features of the present invention. In order to drive the 2048 line, the phase shift of the scan signal, which is a feature of the present invention, is used. For example, assuming that the period of the sustain discharge signal is 8 μs and the width of the address signal is 1 μs, as shown in FIGS. 10 and 11 with four phase change circuits, 0 degrees, 45 degrees, 90 degrees, and 135 degrees. The changed scan signal is applied to address in the address order as shown in FIG.

As shown in FIG. 13, the driving device for applying the driving method of the present invention includes a panel 200, a driving circuit unit 300, a high voltage power supply unit 400, and a control unit 500. At this time, the connection between the circuit and the electrode of the panel is made as shown in FIG. That is, in the drive system of the present invention, the X electrodes of the panel are commonly connected to 512 pieces of four driving circuits, and the Y electrodes of the panel are connected to each channel of the scan driving circuit part of the four different driving circuits. It is. The address electrode of the panel is connected to each channel of the data driver circuit portion of the address board. Different driving circuits connected with the X electrodes make driving waveforms with four different phase differences, and different driving circuits with Y electrodes connecting the driving waveforms with four phase differences and initial discharge waveforms and scan waveforms at the respective Y electrodes. Can be authorized. If the X electrode driving circuit is composed of a high voltage switch and an energy recovery circuit, the Y electrode driving circuit includes a high voltage switch and an energy recovery circuit unit 210, a DC-DC converter 220 and a scan driving circuit as shown in FIG. 230. The address board consists of a data-driven LSI. The control board consists of a controller that sends control signals to other boards and an output buffer LSI. The power supply distributes the voltage needed to drive and the voltage required to control the boards.

The implementation examples of the driving waveform and the driving circuit are not limited to the claims by way of example only, and various alternatives, modifications, and changes will be apparent to those skilled in the art.

As described above, the driving apparatus and driving method of the plasma display panel according to the present invention dramatically reduce the signal width of the address signal by using the sustain discharge voltage among plasma discharge characteristics to drive the high resolution PDP with high brightness. In order to increase the range, the X electrode is used for address discharge and the scan signal phase is applied differently so that the time between addresses can be efficiently used to drive up to four blocks without increasing the number of data driving LSIs. Up to 2048 plasma display panels can be driven. In addition, the high-cost implementation without increasing the number of driving LSI, a simple driving circuit requiring no external bias voltage, and a low sustain discharge driving voltage reduce the circuit part production cost. In addition, since address discharge is performed between sustain discharges, when the luminance is high and the high resolution panel is driven, the luminance is not lowered when the low resolution panel is driven. Also, when the same sustain discharge signal is applied, low power driving by low sustain discharge voltage is possible.

On the other hand, the present invention is not limited to the contents described in the drawings and detailed description, it is obvious to those skilled in the art that various modifications can be made without departing from the spirit of the invention. .

Claims (4)

One field is divided into a plurality of subfields, and an gradation display is performed for each subfield by allocating an address period for setting cells to be lit among cells of a panel and a sustain discharge period for maintaining the lit state of the set cells. In the driving method of the plasma display panel, An initial discharge period for applying an initial discharge signal for generating initial wall charges required for maintaining a lit state to all cells of the panel at the beginning of each of the subfields; An address period for applying a scan signal and an address signal at a falling portion of the sustain discharge signal in an address period to form an address discharge for erasing wall charges of cells in which the initial wall charges are not turned on among cells in which the initial wall charges are generated; A sustain discharge period for applying a desired number of sustain discharge signals to the lit cell to determine the brightness of the subfield; And And an erasing period in which the sustain discharge signal is not applied to the next subfield regardless of the sustain discharge of the subfield so as not to be influenced by the wall charge. The method of claim 1, wherein the scan signal is applied to the rising and falling portions of the sustain discharge signal to discharge and address the X electrode at the rising portion, and to discharge and address the Y electrode at the falling portion to increase the addressable number. And a plasma display panel driving method. The plasma display panel as claimed in claim 1 or 2, wherein the phase of the scan signal is changed by an address signal, and the time interval between the address signals is applied as a time interval for applying the address signal. Driving method. In an AC plasma display panel comprising a panel having a front substrate and a rear substrate, an X electrode driving circuit portion for driving the X electrode of the back substrate, a Y electrode driving circuit portion for driving the Y electrode of the back substrate, and a scan circuit portion. , And a scan driving circuit connected to the Y electrode, a high voltage switch and an energy recovery circuit, and a DC-DC converter disposed therebetween.