KR19990081408A - Digital TV Receive Decoder Device - Google Patents

Abstract

The present invention relates to a video decoder device of a digital TV receiver for compressing and transmitting a video signal, and decoding and displaying the transmitted compressed video signal in a decoder of the receiver.

In the digital TV receiver decoder of the present invention, when downconverting is performed in order to receive a high definition (HD) -class image from a standard definition television (SDTV), the luminance (Y) and color (C) signals of The format can be stored in memory as the final display format, processed, reformatted, and outputted so that the format can have a large amount of information so that almost no downsampling occurs for color signals, and no chroma upsampling is required in the final output stage. A digital TV receiver decoder device is provided.

Description

Digital TV Receive Decoder Device

The present invention relates to a video decoder device of a digital TV receiver for compressing and transmitting a video signal, and decoding and displaying the transmitted compressed video signal at a decoder of a receiver. The present invention relates to a digital TV receiving decoder apparatus for converting a processing format of a video signal to improve the quality of the video signal during down-converting.

As an embodiment, the present invention provides a digital TV decoder that receives an MPEG video signal and decodes the received video signal, wherein the decoder device is configured to receive an HD video using an SDTV receiver. It is shortened and stored in memory, data encoded and stored, and when outputted, the display is performed by decoding, aspect ratio and format conversion for I and P pictures, wherein the format conversion is performed in the final display format. The present invention relates to a digital TV reception decoder device capable of eliminating an upsampling step of an end by storing the same in a memory and outputting the same.

The digital TV receiver decodes the video signal compressed and transmitted in MPEG2 by the decoder and displays it on the screen.

In general, digital TV receivers are classified into HDTV class and SDTV class according to the number of pixels (pel = picture elements) with respect to clarity / reproduction performance (quality), and for HDTV, for example, up to 1920pels / 1080lines Performance and SDTV, for example, has 640pels / 480lines.

Hereinafter, the pixel units shown in FIGS. 1 to 9 are presented as an example for explanation of the present invention and are not limited thereto.

1 shows an example of a decoder in a digital TV receiver, one pixel is represented by 8 bits, and one macro block has a data structure of 16 * 16 pixels and includes DCT coefficients and motion vector information. It handles a bit stream equivalent to.

In Figure 1, Variable Length Decoder (VLD) 1 variable length decodes the input bit stream data, IDCT 2 decodes the variable length decoded data by Inverse Discrete Cosine Transform, The adder 3 stores the reconstructed image using the motion compensated information of the motion estimation compensator 4 in the decoded data in the frame memory 5 in a 4: 2: 0 image signal format, and the stored data is 4 It is upsampled to the video signal format of 2: 2 and output to the display means.

Since the HDTV receiver receives and decodes HD class data, there is no obstacle in receiving and decoding SD data.

Since the SDTV receiver receives and decodes the SD level data, there is no obstacle in receiving and decoding the SD level data, but from the viewpoint of compatibility, the SDTV receiver should be able to receive and process (decode / display) the HD level data.

To this end, the decoder of the SD TV receiver performs 'data processing' for the SD reception of HD data.

This data processing process is secured by downsampling / or down-converting, ie filtering / decimation.

2 shows a 4: 4: 4 video signal format, b shows a 4: 2: 2 video signal format, and FIG. 3 shows a 4: 2: 0 video signal format.

In Figs. 2 and 3, the cross is the luminance signal, and the circle represents the color signals Cb and Cr.

4 shows an example of a downsampling technique of a decoder device for receiving, decoding and displaying HD data in an SD TV receiver.

4 is a method of decoding 8 * 8 block data by reducing it to 4 * 4.

The 8 * 8 sized data block 41 is inversely cosine transformed and downsampled on the 8 pixels in the IDCT / downsampler 42 horizontally and vertically to reduce the size of the 8 * 8 sized block to 4 * 4 size. Reduce

In FIG. 4, 16 samples of DCT coefficients were selected from the upper end of the data block 41, and 4x4 inverse discrete cosine transform was used to obtain downsampled image data.

The discarded coefficients, except for the selected coefficients, are shown as white spots (blanks).

The number of coefficients selected here and the method of selecting the coefficients are various as well.

The image data downsampled to 4 * 4 is stored in the frame memory 44 via the adder 43 (or may be a field memory).

The image data of the frame memory 44 is upsampled horizontally and vertically up to 8 * 8 by the upsampler 45 for processing motion vectors adapted to the down sampled image data. The upsampled image data is motion compensated by motion vectors in the motion compensation predictor 46, and the compensated information is 8 * 8 in size, so the downsampler 47 is again horizontally 4 * 4 in size. After downsampling in the vertical direction is performed, this 4 * 4 downsampled motion compensated block is applied to the adder 43, so that the final 8 * 8 we want is downsampled to 4 * 4. The image block is obtained and stored in the frame memory.

At the time of output, the output value of the frame memory 44 is converted into 4: 2: 0 format by the format converter 48, and this is converted into 4: 2: 2 format by the upsampler 49 and output.

Figure 5 shows another example of a downsampling technique of a decoder device for receiving, decoding and displaying HD data in an SD TV receiver.

5 is a technique of reducing 8 * 8 size data to 8 * 4.

The size of 8 * 8 is reduced to 8 * 4 by performing inverse discrete cosine transform and downsampling on the 8 * 8 data block 51 horizontally in IDCT / downsampler 52.

The discarded coefficients, except for the selected coefficients, are shown as white spots (blanks).

The number of coefficients selected here and the method of selecting the coefficients are various as well.

The image data downsampled to 8 * 4 is stored in the frame memory 54 via the adder 53 (or may be a field memory).

The image data of the frame memory 54 is upsampled to 8 * 8 by the upsampler 55, and upsampled by the upsampler 55 for motion vectors processing to adapt to the down sampled image data. The data is motion compensated by the motion vectors in the motion compensation predictor 56. Since the compensated information is 8 * 8 size, downsampling is performed again in the downsampler 57 to 8 * 4 size. The 8 * 4 downsampling motion processing information is added to the adder 53, so that finally, the desired 8 * 8 downsampled to 8 * 4 -image block is stored in the frame memory.

At the time of output, the output value of the frame memory 54 is converted into 4: 2: 0 format by the format converter 58, and this is converted into 4: 2: 2 format by the upsampler 59 and output.

FIG. 6 is another embodiment of a digital TV receiver decoder, and the contents of Patent No. 98-5292, filed by the present applicant, downsample and decode I, P, and B pictures to 8 * 4, and then B pictures are 720pels / 480lines Frame size conversion and data encoding are performed and stored in memory, I, P picture is bit-encoded and stored as an anchor frame, B picture is decoded data and I, P picture is 720pels / 480lines after data decoding The embodiment converts a frame to a size and outputs the same with the bit decoded B picture.

The IDCT / down sampling unit 61 inverses discrete DC cosine conversion of the input DCT coefficient and performs filtering / down sampling in the horizontal direction to reduce the size of 8 * 8 to 8 * 4.

Here, downsampling is performed on all I, P, and B pictures, and this 8 * 4 data is input to the adder 62.

The output of the adder 62 is processed differently according to the I, P picture and the B picture.

The B picture is converted into a 4: 2: 0 format while passing through the display size converting unit 64.

The B-picture information that has undergone format conversion is stored in the B-frame memory 66b of the memory 66 after bit reduction is performed via the data encoding section 65b.

The operation of bit reduction by the data encoding unit 65b is shown in Fig. 7, which also applies to the data encoding unit 65a for the I and P pictures, and the data decoding corresponds to the reverse process of encoding.

As shown in Fig. 7, the amount of bits is reduced by using the correlation of adjacent pixels in consideration of the capacity limitation of the memory.

That is, the bit amount is reduced to 14 bits based on 8 * 4 in consideration of the correlation of adjacent pixels in the horizontal (or vertical) direction.

An example of a method of reducing the number of bits is DPCM.

P1 (original value), p2-p1 (adjacent pixel difference value) and p3 (original value) for horizontal (or vertical) pixels p1, p2, p3, p4 701 of the decoded image pels 700 p4-p3 (adjacent pixel difference value) 702 encodes the downsampling data, wherein p1 is an 8-bit value, p2-p1 is a 6-bit value, p3 is an 8-bit value, and p4-p3 The 6-bit value is encoded by using a non-uniform quantization technique (703).

The encoded result 704 is stored in the memory 705, which may be an anchor frame memory or a B frame memory in FIG.

The bit-reduced data as described above is stored in the B-frame memory 66b and decoded by the data decoding unit 71 through the reverse process of decoding for image restoration (reproduction).

In addition, by selecting the switching unit 63, the I and P pictures are also bit-reduced through the data encoding unit 65a, which is stored in the anchor frame memory 66a, and decoded by the data decoding unit 67 to restore the image. do.

The decoded 8 * 4 data is upsampled in the horizontal direction by a horizontal upsampler 68 that receives motion vector information for motion compensation and output as 8 * 8 data.

This upsampled 8 * 8 data is input to the motion compensation predictor 69 and motion compensated by the motion vector information, and the motion compensated information is input to the horizontal downsampler 70 in 8 * 8 size.

The horizontal downsampler 70 horizontally downsamples the input 8 * 8 motion compensation information to 8 * 4 and supplies it to the adder 62, thereby downsampling to 8 * 4 by the IDCT / downsampling unit 61. And outputs motion compensated I, P, B picture signals corresponding to the I, P, B picture data (size).

By repeating the above process, data processing of I, P, and B frames is performed, and 8 * 4 data output from the anchor frame memory 66a and decoded by the data decoder 72 by the frame size converter 73. After converting to 4: 2: 0 format (consistent with the B frame format), the upsampler 74 converts to 4: 2: 2 format and outputs the final picture signal together with the B picture information. (Video Out).

The conventional digital TV decoder device as described above converts and stores a video signal into a 4: 2: 0 format in consideration of a memory size, and converts it into a 4: 2: 2 format for output (format conversion). have.

Therefore, an upsampling circuit for converting the data converted into 4: 2: 0 format into 4: 2: 2 format suitable for the final display format is required at the end for data processing in the decoder device.

As the result is converted to 4: 2: 0 format and processed internally, the 4: 2: 0 format can only contain relatively few color signals, which is 4: 2: 0 with relatively few color signals. Even if the format processing data is converted back into the 4: 2: 2 format, the image quality is inevitably reduced because only the small amount of the color signal is converted again.

In the present invention, I, P picture and B picture are separated, downsampling, data encoding and decoding are performed, and in case of B picture, the conversion to display size is performed during storage.

By converting the format of the downsampled B-picture data into a format of 4: 2: 2, which is the final display format, and storing it in a memory, it is possible to have a format that already matches the final display format during the initial downsampling step. Provide a digital receiving decoder device capable of having a large amount of color information with little downsampling for the first time, and eliminating the use of circuits for upsampling the 4: 2: 0 format of the terminal to a 4: 2: 2 format. do.

1 is a block diagram of a digital TV receiver decoder

2, 3 and 3 show a conventional video signal storage format in a digital TV receiver decoder.

Figure 4 is a block diagram of a conventional downconverter first embodiment

Fig. 5 is a block diagram of a second embodiment of a conventional downconverter.

Figure 6 is a block diagram of a conventional downconverter third embodiment

7 shows a data encoding / decoding method

8 is a block diagram of a first embodiment of a digital TV receiver decoder device of the present invention;

Fig. 9 is a block diagram of a second embodiment of the digital TV receiver decoder device of the present invention.

10 is a table comparing the present invention and the prior art

FIG. 8 is a first embodiment of the digital TV receiver decoder of the present invention described above, and has a size of 720pels / 360lines as an example of displaying in a screen format with an aspect ratio of 16: 9 on a screen having an aspect ratio of 4: 3.

This is called letter-box.

Hereinafter, the configuration and operation of the digital TV reception decoder device of the present invention will be described according to the first embodiment.

The present invention outputs 8 * 4 size data by performing inverse discrete cosine transform (IDCT), filtering, and horizontal downsampling using DCT coefficients for 8 * 8 size input data (I, P, B pictures) as input. An IDCT / downsampling means 81, an adder 82 which adds and outputs the 8 * 4 data and motion compensation information, and converts the size of the B picture selected by the adder 82 into a final screen display format. Data encoding means 85a for performing data encoding on the I, P picture selected by the adding means 82, and the B picture output from the format converting means 84, respectively. Storage means 86 including a) 85b, an anchor frame memory 86a for storing the data encoded I, P picture information, and a B frame memory 86b for storing B picture information, and the anchor frame. Decode the Memory 86a Output Inputs data decoding means 87, horizontal upsampling means 88 for upsampling the data decoded information in a horizontal direction, and converts the data decoded information into an 8 * 8 size, and outputs the horizontal upsampling means 88. Motion compensation prediction means 89 for performing motion compensation and prediction from the motion bettor information, and down-sampling the output of the motion compensation prediction means 89 in a horizontal direction to convert it into 8 * 4 size to adder 82. Horizontal downsampling means 90 for supplying, data decoding means 91 for outputting B frame information by data decoding the output of the B frame memory 86b, and data decoding for the output of the anchor frame memory 86a. The number of format conversions for performing size conversion of the data decoding means 92 and the output of the data decoding means 92 to the final screen display format in the same format as the format conversion means 84. It characterized in that it comprises a stage (93).

Hereinafter, the operation of the present invention will be described with reference to FIG.

The IDCT / downsampling means 81 performs inverse discrete cosine conversion of the input 1920pels / 1080lines size DCT coefficient, and also performs downsampling in the horizontal direction to reduce the 8 * 8 size to 8 * 4 to 960pels / 1088lines of data. Output

Here, downsampling is performed on all of the I, P, and B pictures, and this 8 * 4 data is input to the adding means 82.

In the present invention, the down sampling method (upsampling is also the same) is performed through various known methods.

The result of performing 8 * 4 horizontal downsampling on the 8 * 8 I, P, and B pictures as described above is applied to the adding means 82.

As for the output of the adding means 82, I, P picture and B picture are selected by the switching means 83.

The B picture is converted into 720pels / 360lines in size through the format converting means 84.

That is, the B-picture of size 960pels / 1088lines is converted into a 4: 2: 2 format of 720pels / 360lines.

This format corresponds to a size for displaying a 16: 9 image in a 4: 3 screen format and is called a letter-box method.

In this way, since the color signal component may occupy a memory area corresponding to the remaining area of a 16: 9 letter box, the color signal component may have a large amount of color signal component so that almost no downsampling occurs for the color signal. This ensures an improvement of the picture quality for the color signal in the image signal displayed later.

The B-picture information having the format conversion as described above is stored in the B-frame memory 86b of the storage means 86 after bit reduction is performed via the data encoding means 85b.

Meanwhile, the I and P frames are also stored in the anchor frame memory 86a via the encoding means 85a.

The effect of bit reduction by the data encoding means is shown in FIG.

Data output from the anchor frame memory 86a is decoded by the decoding means 87, and the decoded 8 * 4 data is horizontal upsampling means 88 which inputs motion vector information for motion compensation. Up-sampled in the horizontal direction at, output as 8 * 8 data.

This upsampled 8 * 8 data is input to the motion compensation predicting means 89 and motion compensated by the motion vector information, and the motion compensated information is input to the horizontal downsampling means 90 with 8 * 8 size.

The horizontal downsampling means 90 horizontally downsamples the input 8 * 8 motion compensation information to 8 * 4 and supplies it to the adding means 82, thereby downgrading it to 8 * 4 by the IDCT / downsampling means 81. Outputs motion-compensated I, P, and B picture signals that match the sampled I, P, and B picture data (sizes).

By repeating the above process, I, P, B frame data processing is performed, and I, P picture data output from the anchor frame memory 86a is decoded by the data decoding means 92, and the decoded 8 * The 4 data is subjected to a format conversion means (4: 2: 2 of 720pels / 360lines) to match the format of the B frame while passing through the format conversion means 93.

Thus, the value decoded by the decoding means 91 of the output of the B frame memory 86b and the value obtained by the format conversion of the I and P pictures are converted without the final display size conversion (traditional 1: 2 chroma upsampler). You can output directly to the screen format.

FIG. 9 is a second embodiment of the digital TV receiver decoder of the present invention, in which the same portions as those in the first embodiment of FIG. 8 are denoted by the same reference numerals, and description thereof will be omitted.

In the second embodiment of the present invention shown in Fig. 9, the format converting means 84A and 92A convert the screen format 4: 2: 2 into 720pels / 480lines, respectively, in this case. Compared to the case of 16: 9 wide TV, the amount of memory can be stored as it is.

Fig. 10 is a comparison table comparing the prior art and the first and second embodiments of the present invention.

As shown in the diagram, the second embodiment results in a small amount of memory increase compared to the first embodiment of the present invention, but this may all include more color signal (Cb, Cr) components as compared to the prior art. Therefore, it can be seen that a high quality image can be reproduced even with the memory of the same or approximate increment.

According to the present invention, when the HDTV image is received and processed by the SDTV receiver using MPEG2, since the color signal component can have a large amount of color information so that almost no downsampling occurs, high-definition reproduction is possible. The advantage is that no sampler is required.

In addition, since the color signal can be stored almost by only slightly increasing the memory, high quality reproduction is possible.

Claims (5)

An apparatus for receiving data in units of blocks and converting the data format into a format considering the display size, and processing and displaying the stored data. Means for performing downsampling at a predetermined rate on the input data in block units, and dividing the downsampled result into data of the first group and the data of the second group, and further downsampling the data of the first group. Means for performing a conversion to a final display screen format after the conversion, means for storing a second group of data together with the first group of data converted to the final display screen format, and the stored second group of data And means for further performing format conversion conversion to display the data of the first group and the second group in correspondence with the format-converted data of the first group at the time of reproduction. The digital TV receiver decoder of claim 1, wherein the first group of data is a B frame and the second group of data is an I, P frame. 3. The digital receive decoder device according to claim 2, wherein the ratio of the luminance signal (Y) to the color difference signal (Cr, Cb) is 4: 2: 2 when converting the B frame to the final display screen format. 4. The digital TV decoder apparatus of claim 3, wherein format conversion is performed at 720pels / 360lines when the B frame is converted into a final display screen format. 4. The digital TV decoder apparatus of claim 3, wherein format conversion is performed at 720pels / 480lines when the B frame is converted into a final display screen format.