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KR19980073847A - 반도체 웨이퍼 세정방법 및 산화막형성방법 - Google Patents

반도체 웨이퍼 세정방법 및 산화막형성방법 Download PDF

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KR19980073847A
KR19980073847A KR1019970009409A KR19970009409A KR19980073847A KR 19980073847 A KR19980073847 A KR 19980073847A KR 1019970009409 A KR1019970009409 A KR 1019970009409A KR 19970009409 A KR19970009409 A KR 19970009409A KR 19980073847 A KR19980073847 A KR 19980073847A
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oxide film
semiconductor wafer
containing gas
low temperature
relatively low
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황철주
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Priority to JP9218565A priority patent/JPH10270434A/ja
Priority to TW086111777A priority patent/TW402754B/zh
Priority to US08/916,424 priority patent/US6124218A/en
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Abstract

본 발명에 따르면, 반도체 제조 공정에 있어서 웨이퍼상에 형성된 원하지 않는 산화막 또는 불순물입자를 비교적 낮은 온도에서 충분히 제거할 수 있는 방법 및 우수한 특성의 산화막을 형성하는 방법이 제공된다. 불순물 입자 등의 제거는 비교적 낮은 온도의 진공분위기 내에서 반도체 웨이퍼에 수소함유 기체에 의해 형성된 플라즈마를 인가함으로써 수행되며, 산화막의 형성은 진공분위기 내에서 비교적 낮은 온도에서 산소함유 기체에 의해 형성된 플라즈마를 반도체 웨이퍼상에 인가함으로써 수행된다.

Description

반도체 웨이퍼 세정방법 및 산화막형성방법
본 발명은 반도체 제조방법에 관한 것으로, 구체적으로는 웨이퍼상에 성장되는 원하지 않는 산화막 또는 불순물 입자를 제거하는 방법 및 반도체 웨이퍼상에 양질의 산화막을 형성시키는 방법에 관한 것이다.
반도체 제조공정은 웨이퍼상에 원하는 회로영역을 형성하기 위하여 산화, 식각, 리소그래피, 증착등 여러 가지 공정을 거치게 된다. 이와 같은 여러공정을 거치기 위해 웨이퍼는 각 제조장치로 옮겨지게 된다. 이때, 반도체 웨이퍼가 대기중에 노출됨으로써 웨이퍼 표면의 실리콘(Si)과 대기중의 산소(O2)가 화학반응을 일으킴으로써 수십Å 두께의 실리콘산화막(SiO2)이 형성된다.
이와 같은 산화막을 자연산화막(native oxide)이라고 하는데, 자연산화막은 반도체 제조공정에서 원하지 않는 절연기능을 수행하기 때문에 다음 공정을 수행하기 전에 이러한 자연산화막을 제거할 것이 요구된다.
또한, 각 제조장치로 웨이퍼를 이동시키는 과정에서 불순물 입자가 웨이퍼 상에 부착되기도 한다.
현재까지는 반도체 제조공정 중에서 다음 공정을 위하여 웨이퍼가 대기중에 노출되었을 때 형성되는 불필요한 산화막과 오염 성분을 제거하는 방법으로는 wet cleaning방법과 HF Vapor을 이용하는 방법 및 고온진공 분위기 내에서 수소(H2)을 주입시켜 웨이퍼 표면에 형성된 불필요한 성분을 제거하는 방법을 이용하여 왔으나 원하는 수준까지 웨이퍼상의 불필요한 산화막 또는 불순물 입자를 제거하기는 어려운 상황이다.
또한, 도전체중간절연막 또는 MOSFET소자의 게이트절연막과 케패시터(capacitor)제조공정으로 이용하는 산화막은 그 절연기능을 만족스럽게 수행하기 위하여 비교적 얇은 두께에서도 충분한 절연기능을 수행하기 위한 양질의 절연막이 요구되고 있다.
종래의 반도체 제조공정에서 산화막을 형성시키는 방법으로는 대기 또는 질소 분위기내에서 필요로 하는 웨이퍼를 상압, 고온에서 산소(O2)를 확산로 내로 주입시켜 필요한 산화막을 형성시키는 방법을 사용하였으나, 이 방법으로 형성된 산화막은 특성이 그다지 우수하지 못하여 절연박막으로서의 일정한 한계를 지니고 있는 실정이다.
위와같은 문제점을 해결하기 위하여, 본 발명은 반도체 웨이퍼상에 형성된 원하지 않는 산화막 또는 불순물 입자를 비교적 저온에서 충분히 제거할 수 있는 방법을 제공하는 것을 목적으로 한다.
본 발명의 다른 목적은 비교적 저온 상태에서 우수한 특성의 산화막을 형성하는 방법을 제공하는 것이다.
본 발명의 제1특징에 따르면, 반도체 웨이퍼 상에 형성된 불필요한 산화막 또는 불순물 입자를 제거하는 방법에 있어서, 진공분위기 내에서 비교적 낮은 온도의 수소함유기체에 의해 형성된 플라즈마를 상기 반도체 웨이퍼에 인가함으로써 불필요한 산화막 또는 불순물 입자를 제거하는 방법이 제공된다.
본 발명의 제2특징에 따르면, 반도체 웨이퍼상에 산화막을 형성하는 방법에 있어서, 진공분위기 내에서 비교적 낮은 온도에서 산소함유기체에 의해 형성된 플라즈마를 상기 반도체 웨이퍼에 인가함으로써 저온상태에서 특성이 우수한 산화막을 형성하는 방법이 제공된다.
웨이퍼상에 형성된 불필요한 산화막과 오염된 성분을 제거하는 본 발명의 방법으로서, 본 발명은 반도체 제조공정에 적용된 웨이퍼를 진공로 내에 위치시키고 적당한 온도(100℃-800℃)에서 진공 분위기 내에서 수소(H2)나 수소성분을 함유한 가스나 인(PH3)과 알곤 등을 매개체로 사용하여 플라즈마를 이용하여 불필요한 산화막과 오염된 성분을 제거하는 방법이 이용된다.
또한, 본 발명의 산화막 형성방법으로는, 산소(O2)나 이산화질소(NO2) 등을 진공 분위기 내에서 비교적 낮은 온도(250℃-800℃)에서 웨이퍼 진공로 내에 위치시키고 플라즈마를 이용하여 반도체 제조공정상에서 필요로 하는 산화막을 형성시키는 방법이 이용된다.
이상에서 설명한 본 발명의 구성에 의하면, 반도체 웨이퍼상에 형성된 원하지 않는 산화막 또는 불순물 입자를 비교적 저온에서 충분히 제거할 수 있다는 효과 및 저온상태에서 우수한 특성의 산화막을 형성할 수 있다는 효과를 나타낸다.

Claims (9)

  1. 반도체 웨이퍼상에 형성된 불필요한 산화막 또는 불순물 입자를 제거하는 방법에 있어서, 진공분위기 내에서 비교적 낮은 온도의 수소함유기체에 의해 형성된 플라즈마를 상기 반도체 웨이퍼에 인가함으로써 불필요한 산화막 또는 불순물 입자를 제거하는 방법.
  2. 제1항에 있어서, 상기 비교적 낮은 온도는 100℃ 내지 800℃의 범위에 있는 것인 방법.
  3. 제1항에 있어서, 상기 수소함유기체는 H2를 포함하는 것인 방법
  4. 제1항 또는 제3항에 있어서, 상기 수소함유기체는 PH3를 포함하는 것인 방법
  5. 제4항에 있어서, 상기 수소함유기체에 알곤을 포함하는 것인 방법
  6. 반도체 웨이퍼상에 산화막을 형성하는 방법에 있어서, 진공분위기 내에서 비교적 낮은 온도에서 산소함유기체에 의해 형성된 플라즈마를 상기 반도체 웨이퍼에 인가함으로써 저온상태에서 특성이 우수한 산화막을 형성하는 방법.
  7. 제6항에 있어서, 상기 비교적 낮은 온도는 250℃ 내지 800℃의 범위내에 있는 것인 방법.
  8. 제6항에 있어서, 상기 산소함유기체는 O2를 포함하는 것인 방법
  9. 제6항 또는 제8항에 있어서, 상기 산소함유기체는 NO2를 포함하는 것인 방법
KR1019970009409A 1997-03-19 1997-03-19 반도체웨이퍼세정방법및산화막형성방법 KR100281979B1 (ko)

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KR1019970009409A KR100281979B1 (ko) 1997-03-19 1997-03-19 반도체웨이퍼세정방법및산화막형성방법
EP97306087A EP0866495A3 (en) 1997-03-19 1997-08-11 A method for cleaning wafer surface and a method for forming thin oxide layers
JP9218565A JPH10270434A (ja) 1997-03-19 1997-08-13 半導体ウエーハの洗浄方法及び酸化膜の形成方法
TW086111777A TW402754B (en) 1997-03-19 1997-08-15 A method for cleaning wafer surface and a method for forming thin oxide layers
US08/916,424 US6124218A (en) 1997-03-19 1997-08-22 Method for cleaning wafer surface and a method for forming thin oxide layers

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FR2815773B1 (fr) * 2000-10-23 2003-04-18 X Ion Procede de realisation d'un oxyde de grille forme sur substrat semi-conducteur
WO2003076678A2 (en) * 2002-03-08 2003-09-18 Sundew Technologies, Llc Ald method and apparatus
KR100482372B1 (ko) * 2002-12-03 2005-04-14 삼성전자주식회사 반도체 소자의 게이트 산화막 형성방법
DE10332295B4 (de) * 2003-07-16 2005-09-01 Infineon Technologies Ag Verfahren zur Entfernung von Metallspuren aus festem Silizium
US9553016B2 (en) 2010-07-09 2017-01-24 Infineon Technologies Ag Contacts for semiconductor devices and methods of forming thereof
US8487440B2 (en) 2010-07-09 2013-07-16 Infineon Technologies Ag Backside processing of semiconductor devices
US20150093889A1 (en) * 2013-10-02 2015-04-02 Intermolecular Methods for removing a native oxide layer from germanium susbtrates in the fabrication of integrated circuits
KR20200021834A (ko) * 2018-08-21 2020-03-02 주성엔지니어링(주) 박막 형성 장치 및 이를 이용한 박막 형성 방법

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EP0866495A2 (en) 1998-09-23
EP0866495A3 (en) 1998-11-25
US6124218A (en) 2000-09-26
KR100281979B1 (ko) 2001-03-02
JPH10270434A (ja) 1998-10-09
TW402754B (en) 2000-08-21

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