KR102733637B1 - Display device - Google Patents

Abstract

A display device includes a substrate including a display area on which an image is displayed and a non-display area provided on at least one side of the display area, a plurality of pixels provided in the display area, an organic insulating film provided on the substrate, a pixel defining film provided on the organic insulating film, and an encapsulating film covering the display area and a portion of the non-display area and including an inorganic material, wherein the organic insulating film and the pixel defining film have a valley formed by removing a portion thereof along a periphery of the display area.

Description

DISPLAY DEVICE

Embodiments of the present invention relate to a display device.

An organic light-emitting display device includes a plurality of pixels formed of an organic light-emitting element, which is a self-luminous element. The organic light-emitting element includes two electrodes and an organic light-emitting layer positioned therebetween, and electrons injected from one electrode and holes injected from the other electrode combine in the organic light-emitting layer to form excitons, and the excitons emit energy to emit light. The organic light-emitting element is sealed by a sealing film.

The purpose of the present invention is to provide a display device in which the occurrence of a residual film is minimized during patterning of a pixel defining film and the intrusion of oxygen or moisture into pixels from the outside is effectively prevented.

A display device according to one embodiment of the present invention includes a substrate including a display area on which an image is displayed and a non-display area provided on at least one side of the display area, a plurality of pixels provided in the display area, an organic insulating film provided on the substrate, a pixel defining film provided on the organic insulating film, and an encapsulation film covering the display area and a portion of the non-display area and including an inorganic material. The organic insulating film and the pixel defining film have a valley formed by removing a portion thereof along a periphery of the display area.

In one embodiment of the present invention, the organic insulating film has an opening of a first width and the pixel defining film has an opening of a second width, and the opening of the organic insulating film and the opening of the pixel defining film can form the valley. The first width and the second width can be different from each other.

In one embodiment of the present invention, the sealing film can cover side surfaces of the organic insulating film and the pixel defining film.

In one embodiment of the present invention, the valley may have a closed shape surrounding the display area.

In one embodiment of the present invention, the substrate may be provided in a rectangular shape including first to fourth sides, and the valley may include first to fourth valleys corresponding to the first to fourth sides. At least one of the first to fourth valleys may be provided in multiple numbers.

In one embodiment of the present invention, each of the pixels may include a first electrode provided on the organic insulating film, a light-emitting layer provided on the first electrode, and a second electrode provided on the light-emitting layer and the pixel defining film.

In one embodiment of the present invention, the display device may further include a power wiring provided in the non-display area and supplying power to the second electrode.

In one embodiment of the present invention, the power wiring may be provided corresponding to at least one of the first to fourth sides of the non-display area. In one embodiment of the present invention, the power wiring may be provided corresponding to the second to fourth sides, and the first width of the first valley and the first width of one of the second to fourth valleys may be different from each other. The first width of the first valley may be larger than the first width of one of the second to fourth valleys.

In one embodiment of the present invention, in the area corresponding to the first valley, the pixel defining film may cover a side surface of the organic insulating film. At this time, in the area corresponding to the first valley, the second width may be smaller than or equal to the first width.

In one embodiment of the present invention, the power wiring may be provided between the organic insulating film and the pixel defining film. The organic insulating film may include a first organic insulating film having an opening of a third width, and a second organic insulating film having an opening of a fourth width greater than the third width.

In one embodiment of the present invention, the pixel defining film may include an organic material.

In one embodiment of the present invention, the sealing film may include a first inorganic insulating film, an organic insulating film, and a second inorganic insulating film that are sequentially laminated.

In one embodiment of the present invention, the substrate may further include a conductive pattern provided on the substrate, and the organic insulating film and the pixel defining film may have an edge clad pass covering an edge of the conductive pattern.

In one embodiment of the present invention, the organic insulating film may further include a conductive pattern provided on the organic insulating film, and the pixel defining film may have an edge clad pass covering an edge of the conductive pattern.

In one embodiment of the present invention, the edge clad pass can be connected to the valley.

In one embodiment of the present invention, the edge clad pass may have a shape that is folded or bent at least once.

In one embodiment of the present invention, a passivation layer may be further provided between the substrate and the organic insulating film. The passivation layer may be made of an inorganic material.

In a display device according to one embodiment of the present invention, the occurrence of a residual film during patterning of a pixel defining film is minimized, and the intrusion of oxygen or moisture into the pixel from the outside is effectively prevented.

FIG. 1 is a perspective view showing a display device according to one embodiment of the present invention.
Figure 2 is a plan view illustrating the display device of Figure 1.
FIG. 3 is an equivalent circuit diagram illustrating a case where a pixel according to one embodiment of the present invention is a light-emitting element.
Fig. 4 is a cross-sectional view taken along line I-I' of Fig. 2, showing a portion of the display area pixels and a non-display area.
FIG. 5 is a plan view illustrating some components related to a valley in a non-display area in a display device according to one embodiment of the present invention.
FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 5 in a display device according to one embodiment of the present invention.
FIG. 7 is a cross-sectional view taken along line II-II' of FIG. 5 of a display device according to another embodiment of the present invention.
FIG. 8 is a cross-sectional view taken along line III-III' of FIG. 5 in a display device according to one embodiment of the present invention.
FIGS. 9A to 9D are cross-sectional views taken along line III-III' of FIG. 5 of a display device according to another embodiment of the present invention.
FIGS. 10A to 10C are plan views illustrating formation of valleys in various ways in a display device according to one embodiment of the present invention.
FIG. 11 is a plan view illustrating some components related to the valley and clad of a non-display area in a display device according to another embodiment of the present invention.
FIGS. 12a and 12b are cross-sectional views taken along line IV-IV' of FIG. 11 of a display device according to another embodiment of the present invention.

The present invention can be modified in various ways and can take various forms, and specific embodiments are illustrated in the drawings and described in detail in the text. However, this is not intended to limit the present invention to specific disclosed forms, but should be understood to include all modifications, equivalents, or substitutes included in the spirit and technical scope of the present invention.

In describing each drawing, similar reference numerals are used for similar components. In the attached drawings, the dimensions of the structures are drawn larger than actual for the clarity of the present invention. The terms first, second, etc. may be used to describe various components, but the components should not be limited by the terms. The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component. The singular expression includes the plural expression unless the context clearly indicates otherwise.

In this application, it should be understood that the terms "include" or "have" are intended to specify the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, but do not preclude the possibility of the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. In addition, when a part such as a layer, film, region, or plate is said to be "on" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. In addition, in this specification, when a part such as a layer, film, region, or plate is said to be formed on another part, the direction in which it is formed is not limited to the upper direction, and includes the case where it is formed in the side or lower direction. Conversely, when a part such as a layer, film, region, or plate is said to be "under" another part, this includes not only the case where it is "directly below" the other part, but also the case where there is another part in between.

Hereinafter, preferred embodiments of the present invention will be described in more detail with reference to the attached drawings.

FIG. 1 is a perspective view showing a display device according to one embodiment of the present invention, and FIG. 2 is a plan view showing the display device of FIG. 1.

Referring to FIGS. 1 and 2, a display device according to one embodiment of the present invention includes a substrate (SUB), pixels (PXL) provided on the substrate (SUB), and a wiring portion (LP) connected to the pixels (PXL).

The above substrate (SUB) includes a display area (DA) and a non-display area (NDA) provided on at least one side of the display area (DA).

The substrate (SUB) may have an approximately square shape, particularly a rectangular shape. In one embodiment of the present invention, the substrate (SUB) may include a pair of short sides that are parallel to each other in a first direction (DR1) and a pair of long sides that are parallel to each other in a second direction (DR2). In the present embodiment, for convenience of explanation, the sides of the substrate (SUB) are referred to as the first side (S1) to the fourth side (S4) from one short side to four sides that are sequentially connected.

However, the shape of the substrate (SUB) is not limited thereto and may have various shapes. For example, the substrate (SUB) may be provided in various shapes such as a closed polygon including straight sides, a circle including curved sides, an ellipse, etc., a semicircle including straight and curved sides, a semiellipse, etc. In one embodiment of the present invention, when the substrate (SUB) has straight sides, at least some of the corners of each shape may be formed as curves. For example, when the substrate (SUB) has a rectangular shape, a portion where adjacent straight sides meet may be replaced with a curve having a predetermined curvature. That is, the vertex portion of the rectangular shape may be formed as a curved side whose two adjacent ends are connected to two adjacent straight sides and have a predetermined curvature. The curvature may be set differently depending on the position. For example, the curvature may be changed depending on the position where the curve starts and the length of the curve.

The display area (DA) is an area where a plurality of pixels (PXL) are provided and an image is displayed. The display area (DA) may be provided in a shape corresponding to the shape of the substrate (SUB). For example, the display area (DA) may be provided in various shapes, such as a closed polygon including straight sides, a circle including curved sides, an ellipse, etc., a semicircle including straight and curved sides, a semiellipse, etc., similar to the shape of the substrate (SUB). In one embodiment of the present invention, when the display area (DA) has straight sides, at least some of the corners of each shape may be curved.

The pixels (PXL) are provided on the display area (DA) of the substrate (SUB). Each pixel (PXL) is the minimum unit for displaying an image and may be provided in multiple units. The pixels (PXL) may emit white light and/or color light. Each pixel (PXL) may emit one of red, green, and blue, but is not limited thereto, and may emit colors such as cyan, magenta, and yellow.

The above pixels (PXL) may be light-emitting elements including an organic light-emitting layer, but are not limited thereto, and may be implemented in various forms such as liquid crystal elements, electrophoretic elements, and electrowetting elements within the scope that the concept of the invention is maintained.

FIG. 3 is an equivalent circuit diagram illustrating a case where a pixel (PXL) according to one embodiment of the present invention is a light-emitting element.

Referring to FIG. 3, each pixel (see “PXL” in FIG. 2) includes a thin film transistor connected to a wiring section, a light emitting element (EL) connected to the thin film transistor, and a capacitor (Cst).

The above thin film transistor may include a driving thin film transistor (TR2) for controlling the light emitting element (EL), and a switching thin film transistor (TR1) for switching the driving thin film transistor (TR2). In one embodiment of the present invention, one pixel (PXL) includes two thin film transistors (TR1, TR2), but is not limited thereto, and one pixel (PXL) may include one thin film transistor and a capacitor, or three or more thin film transistors and two or more capacitors. For example, one pixel (PXL) may include seven thin film transistors, a light emitting element, and a storage capacitor.

The above switching thin film transistor (TR1) includes a gate electrode, a source electrode, and a drain electrode. In the switching thin film transistor (TR1), the gate electrode is connected to the gate wiring (GL), and the source electrode is connected to the data wiring (DL). The drain electrode is connected to the gate electrode of the driving thin film transistor (TR2). The switching thin film transistor (TR1) transmits a data signal applied to the data wiring (DL) to the driving thin film transistor (TR2) according to a scan signal applied to the gate wiring.

The above driving thin film transistor (TR2) includes a gate electrode, a source electrode, and a drain electrode. In the driving thin film transistor (TR2), the gate electrode is connected to the switching thin film transistor (TR1), the source electrode is connected to the first power wiring (ELVDD), and the drain electrode is connected to the light emitting element (EL).

The above light-emitting element (EL) includes a light-emitting layer, and a first electrode and a second electrode which face each other with the light-emitting layer therebetween. The first electrode is connected to the drain electrode of the driving thin film transistor (TR2). The second electrode is connected to a second power supply line (ELVSS) to which a common voltage is applied. The light-emitting layer emits light according to an output signal of the driving thin film transistor (TR2), thereby displaying an image by emitting or not emitting light. Here, the light emitted from the light-emitting layer may vary depending on a material of the light-emitting layer, and may be color light or white light.

The above capacitor (Cst) is connected between the gate electrode and the source electrode of the driving thin film transistor (TR2), and charges and maintains a data signal input to the gate electrode of the driving thin film transistor (TR2).

Again, referring to FIGS. 1 to 3, in one embodiment of the present invention, the pixels (PXL) may be provided in multiples and arranged in a row-column form along rows extending in the first direction (DR1) and columns extending in the second direction (DR2). However, the arrangement form of the pixels (PXL) is not particularly limited and may be arranged in various forms. For example, the pixels (PXL) may be arranged such that the direction is the row direction or such that the direction oblique to one of the directions is the row direction.

The above non-display area (NDA) is an area where the pixels (PXL) are not provided and the image is not displayed.

In the above non-display area (NDA), a wiring unit (LP) connected to the pixels (PXL) and a driving unit connected to the wiring unit (LP) and for driving the pixels (PXL) may be provided.

The above wiring unit (LP) can be connected to the pixels (PXL). The wiring unit (LP) provides a signal to each pixel (PXL) and can include the gate wiring (GL), the data wiring (DL), the first power wiring (ELVDD), the second power wiring (ELVSS), etc., and can further include other wirings as needed.

The above wiring portion (LP) can be provided across the display area (DA) and the non-display area (NDA).

The above wiring unit (LP) is connected to a driving unit (not shown). The driving unit provides a signal to each pixel (PXL) through the wiring unit (LP), thereby controlling the driving of each pixel (PXL).

The above driving unit may include a scan driving unit (not shown) that provides a scan signal to each pixel (PXL) along the gate wiring (GL), a data driving unit (not shown) that provides a data signal to each pixel (PXL) along the data wiring (DL), a timing control unit (not shown) that controls the scan driving unit and the data driving unit, etc.

In one embodiment of the present invention, the scan driving unit may be directly mounted on the substrate (SUB). When the scan driving unit is directly mounted on the substrate (SUB), it may be formed together with the process of forming the pixels (PXL). However, the position or method of providing the scan driving unit is not limited thereto, and it may be formed on a separate chip and provided in the form of a chip-on-glass on the substrate (SUB), or it may be mounted on a printed circuit board (SUB) and connected to the substrate (SUB) through a connecting member.

In one embodiment of the present invention, the data driving unit may be directly mounted on the substrate (SUB), but is not limited thereto, and may be formed on a separate chip and connected to the substrate (SUB). In one embodiment of the present invention, when the data driving unit is formed on a separate chip and connected to the substrate (SUB), it may be provided in the form of a chip on glass or chip on plastic. Alternatively, it may be mounted on a printed circuit board (SUB) and connected to the substrate (SUB) through a connecting member. In one embodiment of the present invention, the data driving unit may be manufactured in the form of a chip-on-film (COF) and connected to the substrate (SUB).

In one embodiment of the present invention, the non-display area (NDA) may further include an additional area (ADA) protruding from a part thereof. The additional area (ADA) may protrude from the sides forming the non-display area (NDA). In one embodiment of the present invention, the additional area (ADA) is disclosed as protruding from a side corresponding to one of the short sides of the substrate (SUB). However, the additional area (ADA) may protrude from one of the long sides, or may be provided in a form protruding from two or more of the four sides. In one embodiment of the present invention, a data driving unit may be provided or connected to the additional area (ADA), but is not limited thereto, and various components may be arranged.

In one embodiment of the present invention, the display device of the present invention may have flexibility in at least a portion, and may be folded at the flexible portion. That is, the display device may include a bending area (BA) that is flexible and folded in one direction, and a flat area (FA) that is provided on at least one side of the bending area (BA) and is not folded and is flat. The flat area (FA) may or may not have flexibility.

In one embodiment of the present invention, as an example, it is illustrated that the bending area (BA) is provided in the additional area (ADA). According to one embodiment of the present invention, a first flat area (FA1) and a second flat area (FA2) may be provided, which are spaced apart from each other with the bending area (BA) therebetween, and the first flat area (FA1) may include the display area (DA). In one embodiment of the present invention, the bending area (BA) may be spaced apart from the display area (DA).

In the above bending area (BA), when the line along which the display device is folded is called a fold line, the fold line is provided within the bending area (BA). Here, the term “folded” means that the shape is not fixed but can be transformed into another shape from the original shape, and includes being folded, curved, or rolled along one or more specific lines, that is, the fold line. Therefore, in one embodiment of the present invention, a state in which one side of the two flat areas (FA1, FA2) are folded so as to be parallel to each other and face each other is illustrated, but it is not limited thereto, and the sides of the two flat areas (FA1, FA2) may be folded to form a predetermined angle (for example, an acute angle, a right angle, or an obtuse angle) with the bending area (BA) interposed therebetween.

In one embodiment of the present invention, the additional area (ADA) can then be bent along the fold line, in which case the width of the bezel can be reduced by bending the additional area (ADA).

FIG. 4 is a cross-sectional view taken along line I-I' of FIG. 2, showing a portion of the display area pixels and a non-display area. FIG. 4 conceptually illustrates a display device according to one embodiment of the present invention, and some components are exaggerated or reduced for convenience of explanation.

A display device according to one embodiment of the present invention has a shape in which a portion of the display device is bent as illustrated in FIG. 1, but in FIG. 4, the display device is illustrated in an unbent state for convenience of explanation. For reference, the display device is illustrated in an unbent state in cross-sectional views and plan views, etc. of the embodiments described below, for convenience of illustration.

Hereinafter, a display device according to one embodiment of the present invention will be described in detail with reference to FIGS. 1 to 4.

First, the display area (DA) is explained, and then the non-display area (NDA) is explained.

In one embodiment of the present invention, a plurality of pixels (PXL) are provided in the display area (DA). Each pixel (PXL) includes a transistor connected to a corresponding wiring among the wiring portions (LP), a light-emitting element connected to the transistor, and a capacitor (Cst). The transistor may include a driving transistor for controlling the light-emitting element, and a switching transistor for switching the driving transistor.

In Fig. 3, two transistors and one capacitor are illustrated for one pixel (PXL) for convenience of explanation, but this is not limited thereto, and one pixel (PXL) may be provided with two or more transistors and at least one capacitor, or one pixel (PXL) may be provided with three or more transistors and two or more capacitors.

Pixels (PXL) according to one embodiment of the present invention are provided on a substrate (SUB).

The above substrate (SUB) may be made of an insulating material such as glass, resin, etc. In addition, the substrate (SUB) may be made of a material having flexibility so that it can be bent or folded, and may have a single-layer structure or a multi-layer structure.

For example, the substrate (SUB) may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, triacetate cellulose, and cellulose acetate propionate. However, the material constituting the substrate (SUB) may vary and may be made of fiber reinforced plastic (FRP), etc.

A buffer layer (BF) is formed on the above substrate (SUB). The buffer layer (BF) prevents diffusion of impurities into switching and driving transistors. The buffer layer (BF) may be provided as a single layer, but may also be provided as a multilayer of at least two layers.

The above buffer layer (BF) may be an inorganic insulating film made of an inorganic material. For example, the buffer layer (BF) may be formed of silicon nitride, silicon oxide, silicon oxynitride, etc. When the buffer layer (BF) is provided as a multilayer, each layer may be formed of the same material or different materials. The buffer layer (BF) may be omitted depending on the material of the substrate (SUB) and process conditions.

An active pattern (ACT) is provided on the buffer layer (BF). The active pattern (ACT) is formed of a semiconductor material. The active pattern (ACT) may include a source region, a drain region, and a channel region provided between the source region and the drain region, respectively. The active pattern (ACT) may be a semiconductor pattern made of polysilicon, amorphous silicon, an oxide semiconductor, or the like. The channel region is a semiconductor pattern that is not doped with an impurity and may be an intrinsic semiconductor. The source region and the drain region may be semiconductor patterns doped with an impurity. As the impurity, an n-type impurity, a p-type impurity, or other impurities such as metals may be used.

A gate insulating film (GI) is provided on the above active pattern (ACT). The gate insulating film (GI) may be an inorganic insulating film made of an inorganic material or may be an organic insulating film made of an organic material. As the inorganic material, an inorganic insulating material such as polysiloxane, silicon nitride, silicon oxide, or silicon oxynitride may be used. The organic material may be an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, or a benzocyclobutene compound.

A gate electrode (GE) and a capacitor lower electrode (LE) are provided on the gate insulating film (GI). The gate electrode (GE) is formed to cover an area corresponding to a channel area of the active pattern (ACT).

The above gate electrode (GE) and the capacitor lower electrode (LE) may be made of metal. For example, the gate electrode (GE) may be made of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), or an alloy of the above metals. In addition, the gate electrode (GE) may be formed as a single film, but is not limited thereto, and may be formed as a multi-film in which two or more materials of the metals and the alloys are laminated.

In one embodiment of the present invention, although not shown, other wirings including gate wirings may be provided in the same layer as the gate electrode (GE) and the capacitor lower electrode (LE) and made of the same material. Here, other wirings such as the gate wirings may be directly or indirectly connected to a part of a transistor in each pixel (PXL), for example, the gate electrode (GE).

An interlayer insulating film (IL) is provided on the gate electrode (GE) and the capacitor lower electrode (LE). The interlayer insulating film (IL) may be an inorganic insulating film made of an inorganic material. Polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, or the like may be used as the inorganic material.

A capacitor upper electrode (UE) is provided on the interlayer insulating film (IL). The capacitor upper electrode (UE) may be made of a metal. For example, the capacitor upper electrode (UE) may be made of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of the metals. In addition, the capacitor upper electrode (UE) may be formed as a single film, but is not limited thereto, and may be formed as a multi-film in which two or more materials of the metals and the alloys are laminated.

The capacitor lower electrode (LE) and the capacitor upper electrode (UE) form a capacitor (Cst) with the interlayer insulating film (IL) therebetween. In one embodiment of the present invention, the capacitor (Cst) is disclosed as being composed of the capacitor lower electrode (LE) and the capacitor upper electrode (UE), but is not limited thereto, and the capacitor (Cst) may be implemented in various ways.

A first insulating film (INS1) is provided on the upper electrode (UE) of the capacitor. The first insulating film (INS1) may be an inorganic insulating film made of an inorganic material. Polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, or the like may be used as the inorganic material.

A source electrode (SE) and a drain electrode (DE) are provided on the first insulating film (INS1). The source electrode (SE) and the drain electrode (DE) contact the source region and the drain region of the active pattern (ACT), respectively, through contact holes formed in the first insulating film (INS1), the interlayer insulating film (IL), and the gate insulating film (GI).

The source electrode (SE) and the drain electrode (DE) may be formed of metal. For example, the source electrode (SE) and the drain electrode (DE) may be formed of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of the metals. In addition, the source electrode (SE) and the drain electrode (DE) may be formed as a single film, but is not limited thereto, and may be formed as a multi-film in which two or more materials of the metals and the alloys are laminated.

In one embodiment of the present invention, although not shown, data wires or first power wires may be provided in the same layer as the source electrode (SE) and the drain electrode (DE) and made of the same material. Here, the data wires or first power wires may be directly or indirectly connected to a part of a transistor in each pixel (PXL), for example, the source electrode (SE) and/or the drain electrode (DE).

A passivation layer (PSV) may be provided on the source electrode (SE) and the drain electrode (DE). The passivation layer (PSV) may be an inorganic insulating film made of an inorganic material. Polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, or the like may be used as the inorganic material. The passivation layer (PSV) may be omitted depending on the embodiment.

A second insulating film (INS2) may be provided on the passivation layer (PSV). When the passivation layer (PSV) is omitted, the second insulating film (INS2) may be provided on the first insulating film (INS1).

The above second insulating film (INS2) is an organic insulating film made of an organic material. As the organic material, an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, a benzocyclobutene compound, etc. can be used.

A connection pattern (CNP) may be provided on the second insulating film (INS2). The connection pattern (CNP) is connected to the drain electrode (DE) of the transistor through a contact hole penetrating the second insulating film (INS2) and the passivation layer (PSV). The connection pattern (CNP) may be made of at least one of metals such as gold (Au), silver (Ag), aluminum (Al), molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu), or an alloy of the metals. In addition, the connection pattern (CNP) may be formed as a single film, but is not limited thereto, and may be formed as a multi-film in which two or more materials of the metals and the alloys are laminated.

In one embodiment of the present invention, although not shown, other wires, such as dummy power wires, may be provided in the same layer as the connection pattern (CNP) and made of the same material.

A third insulating film (INS3) may be provided on the above connection pattern (CNP). The third insulating film (INS3) is an organic insulating film made of an organic material. As the organic material, an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, or a benzocyclobutene compound may be used.

A first electrode (EL1) may be provided on the third insulating film (INS3). The first electrode (EL1) is connected to the connection pattern (CNP) through a contact hole penetrating the third insulating film (INS3) and to the drain electrode (DE) through a contact hole penetrating the second insulating film (INS2) and the passivation layer (PSV), thereby being connected to the transistor. Here, the first electrode (EL1) may be used as either an anode or a cathode according to an embodiment.

In one embodiment of the present invention, the organic insulating film formed of the second insulating film (INS2) and the third insulating film (INS3) is illustrated as being provided on the passivation layer (PSV), but the organic insulating film may be arranged differently. For example, according to one embodiment of the present invention, only one organic insulating film may be provided between the passivation layer (PSV) and the first electrode (EL1). That is, according to one embodiment of the present invention, only one organic insulating film may be provided on the passivation layer (PSV) and the first electrode (EL1) may be provided on the organic insulating film. In this case, the connection pattern (CNP) may be omitted and the first electrode (EL1) may be directly connected to the drain electrode (DE) through a contact hole formed in the organic insulating film. In the following, even if the organic insulating film is formed of two layers of the second insulating film (INS2) and the third insulating film (IN3), it should be noted that the present invention includes a case in which it is formed as a single organic insulating film that is not separated, as well as a case in which it is separated into the second insulating film (INS2) or the third insulating film (INS3).

The above first electrode (EL1) may be formed of a metal film such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, an alloy thereof, and/or ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), ITZO (indium tin zinc oxide), etc.

In one embodiment of the present invention, the first electrode (EL1) may be made of one type of metal, but is not limited thereto, and may be made of two or more types of metal, for example, an alloy of Ag and Mg.

The above first electrode (EL1) may be formed of a transparent conductive film when it is desired to provide an image in a downward direction of the substrate (SUB), and may be formed of a metal reflective film and/or a transparent conductive film when it is desired to provide an image in an upward direction of the substrate (SUB).

On the substrate (SUB) on which the first electrode (EL1) and the like are formed, a pixel definition film (PDL) is provided to define a pixel (PXL) area corresponding to each pixel (PXL). The pixel definition film (PDL) is an organic insulating film made of an organic material. As the organic material, an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, and a benzocyclobutene compound can be used.

The pixel defining film (PDL) exposes the upper surface of the first electrode (EL1) and protrudes from the substrate (SUB) along the perimeter of the pixel (PXL).

An organic light-emitting layer (OL) may be provided in a pixel (PXL) area surrounded by the pixel defining layer (PDL).

The above organic light-emitting layer (OL) may include a low-molecular weight or high-molecular weight material. The low-molecular weight material may include copper phthalocyanine (CuPc), N,N-di(naphthalene-1-yl)-N,N'-diphenyl-benzidine (NPB), tris-8-hydroxyquinoline aluminum (Alq3), etc. These materials may be formed by a vacuum deposition method. The high-molecular weight material may include PEDOT, PPV (Poly-Phenylenevinylene), and polyfluorene.

The above organic light-emitting layer (OL) may be provided as a single layer, but may be provided as a multilayer including various functional layers. When the organic light-emitting layer (OL) is provided as a multilayer, a hole injection layer, a hole transport layer, an emission layer, an electron transport layer, an electron injection layer, etc. may have a structure in which they are laminated as a single or composite structure. This organic light-emitting layer (OL) may be formed by evaporation, screen printing, an inkjet printing method, a laser induced thermal imaging (LITI) method, etc.

Of course, the organic light-emitting layer (OL) is not necessarily limited to this, and may have various structures. In addition, at least a part of the organic light-emitting layer (OL) may be integrally formed across a plurality of first electrodes (EL1), or may be individually provided to correspond to each of the plurality of first electrodes (EL1).

A second electrode (EL2) is provided on the organic light-emitting layer (OL). The second electrode (EL2) may be provided for each pixel (PXL), but may be provided to cover most of the display area (DA) and may be shared by a plurality of pixels (PXL).

The second electrode (EL2) may be used as either an anode or a cathode depending on the embodiment. When the first electrode (EL1) is an anode, the second electrode (EL2) may be used as a cathode. When the first electrode (EL1) is a cathode, the second electrode (EL2) may be used as an anode.

The second electrode (EL2) may be formed of a metal film such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, or Cr, and/or a transparent conductive film such as ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), or ITZO (indium tin zinc oxide). In one embodiment of the present invention, the second electrode (EL2) may be formed of a multi-film comprising a double film or more including a metal film, and may be formed of a triple film of ITO/Ag/ITO, for example.

The second electrode (EL2) may be formed of a metal reflective film and/or a transparent conductive film when it is desired to provide an image in a downward direction of the substrate (SUB), and may be formed of a transparent conductive film when it is desired to provide an image in an upward direction of the substrate (SUB).

The sealing film (SL) is provided on the second electrode (EL2). The sealing film (SL) may be formed of a single layer, but may be formed of multiple layers. In one embodiment of the present invention, the sealing film (SL) may be formed of a first sealing film (SL1) to a third sealing film (SL3). The first sealing film (SL1) to the third sealing film (SL3) may be formed of an organic material and/or an inorganic material. The third sealing film (SL3) located at the outermost end may be formed of an inorganic material.

In one embodiment of the present invention, the first sealing film (SL1) may be made of an inorganic material, the second sealing film (SL2) may be made of an organic material or an inorganic material, and the third sealing film (SL3) may be made of an inorganic material. In the case of the inorganic material, compared to the organic material, the inorganic material is less susceptible to moisture or oxygen penetration, but has low elasticity or flexibility, making it vulnerable to cracks. By forming the first sealing film (SL1) and the third sealing film (SL3) of inorganic materials, and forming the second sealing film (SL2) of organic materials, the propagation of cracks can be prevented. Here, when the second sealing film (SL2) is made of an organic material, it can be completely covered by the third sealing film (SL3) so that an end is not exposed to the outside.

In one embodiment of the present invention, the organic material may be an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, a benzocyclobutene compound, or the like. The inorganic material may be polysiloxane, silicon nitride, silicon oxide, silicon oxynitride, or the like. When the second sealing film (SL2) is made of an inorganic material instead of an organic material, various silicon-based insulating materials such as hexamethyldisiloxane (HMDSO), octamethylcyclotetrasiloxane (OMCTSO), tetramethyldisiloxane (TMDSO), tetraethyleorthosilicate (TEOS), or the like may be used. In one embodiment of the present invention, the organic light-emitting layer (OL) forming the light-emitting element may be easily damaged by moisture or oxygen from the outside. The above encapsulation film (SL) protects the organic light-emitting layer (OL) by covering it. The above encapsulation film (SL) covers the display area (DA) and can extend to the outside of the display area (DA).

However, in the case of insulating films made of organic materials, although they have advantages in terms of flexibility and elasticity, etc., moisture or oxygen is easily penetrated compared to insulating films made of inorganic materials. In one embodiment of the present invention, in order to prevent moisture or oxygen from penetrating through the insulating films made of organic materials, ends of the insulating films made of organic materials may be covered by insulating films made of inorganic materials so as not to be exposed to the outside. For example, the second insulating film (INS2), the third insulating film (INS3), and/or the pixel defining film (PDL) made of the organic material extend only to a part of the non-display area (NDA), and do not cover the entire non-display area (NDA). In particular, the second insulating film (INS2), the third insulating film (INS3), and/or the pixel defining film (PDL) made of the organic material has a valley (VL) from which a part is removed along the perimeter of the display area (DA). The second insulating film (INS2), the third insulating film (INS3), and/or the pixel defining film (PDL) and the valley (VL) will be described later.

In an embodiment of the present invention, the upper surface of the pixel defining film (PDL) and the second insulating film (INS2), the third insulating film (INS3), and/or the side surface of the pixel defining film (PDL) exposed by the portion provided with the valley (VL) are sealed by an insulating film including an inorganic material, for example, the sealing film (SL), thereby preventing exposure to the outside. Whether or not the sealing film (SL) is multi-layered or the material thereof is not limited thereto and may be variously changed. For example, the sealing film (SL) may include a plurality of organic material layers and a plurality of inorganic material layers that are alternately laminated.

Next, the non-display area (NDA) will be explained. In the following explanation of the non-display area (NDA), in order to avoid duplication of explanation, explanations of what has already been explained will be omitted or briefly explained.

In one embodiment of the present invention, a wiring portion (LP) is provided in a non-display area (NDA), and the substrate (SUB) has a bending area (BA) into which it is folded.

The above wiring unit (LP) connects the driving unit and the pixels (PXL). Specifically, the wiring unit (LP) may include gate wirings, data wirings, power wirings, etc. In one embodiment of the present invention, the wirings forming the wiring unit (LP) may be data wirings. However, it goes without saying that the wirings forming the wiring unit (LP) may be formed differently.

A wiring unit (LP) according to one embodiment of the present invention includes a plurality of wirings. Each wiring can connect the pixels (PXL) and the driver, and for this purpose, can extend from the pixels (PXL) approximately in the second direction (DR2). The wirings can extend to an end of the additional area (ADA) in the second direction (DR2), and contact electrodes (CTEs) can be provided at the end. The pixels (PXL) can be connected to the driver, which is implemented as a chip-on-film or the like, through the contact electrodes (CTEs) connected to the wirings.

The above wiring section (LP) includes first wirings (L1) to third wirings (L3). The first wirings (L1) and the second wirings (L2) may be connected one-to-one, and the second wirings (L2) and the third wirings (L3) may be connected one-to-one. In Fig. 4, only a part of the first wirings (L1) to the third wirings (L3) is schematically illustrated for convenience of explanation.

A buffer layer (BF) is provided on the non-display area (NDA) of the substrate (SUB). The buffer layer (BF) may have an opening (OPN) in the bending area (BA).

A gate insulating film (GI) is provided on the above buffer layer (BF).

The first wirings (L1) and the third wirings (L3) may be provided on the gate insulating film (GI). The first wirings (L1) may be provided in the first flat area (FA1) and the third wirings (L3) may be provided in the second flat area (FA2). The first wirings (L1) and the third wirings (L3) may be formed in the same process using the same material as the gate electrode (GE).

An interlayer insulating film (IL) is provided on the first wires (L1) and the third wires (L3).

A first insulating film (INS1) is provided on the above interlayer insulating film (IL).

Here, the opening (OPN) is provided in the insulating films provided in the bending area (BA). The bending area (BA) is an area where the substrate (SUB) bends. That is, the buffer layer (BF), the gate insulating film (GI), the interlayer insulating film (IL), and the first insulating film (INS1) may have a portion corresponding to the bending area (BA) removed to form the opening (OPN). According to an embodiment, some of the buffer layer (BF), the gate insulating film (GI), the interlayer insulating film (IL), and the first insulating film (INS1) may not have a portion corresponding to the bending area (BA) removed. For example, the buffer layer (BF) may not have a portion corresponding to the bending area (BA) removed, and the remaining insulating films, that is, the gate insulating film (GI), the interlayer insulating film (IL), and the first insulating film (INS1), may have a portion corresponding to the bending area (BA) removed to form the opening (OPN).

That the above opening (OPN) corresponds to the bending area (BA) can be understood as meaning that the opening (OPN) overlaps the bending area (BA). The area of the opening (OPN) can be wider than the area of the bending area (BA). In one embodiment of the present invention, the width of the opening (OPN) and the width of the bending area (BA) are illustrated as being the same, but this is for convenience of explanation, and the width of the opening (OPN) can be wider than the width of the bending area (BA).

For reference, in FIG. 4, the inner surfaces of the buffer layer (BF), the gate insulating film (GI), the interlayer insulating film (IL), and the first insulating film (INS1) are all aligned and arranged on a straight line, but the present invention is not limited thereto. For example, the opening (OPN) of the first insulating film (INS1) may be provided with a wider area than the opening (OPN) of the buffer layer (BF). In one embodiment of the present invention, the opening (OPN) of the buffer layer (BF) may be defined as the narrowest area among the opening (OPN) of the gate insulating film (GI), the opening (OPN) of the interlayer insulating film (IL), and the opening (OPN) of the first insulating film (INS1).

A bending insulating film (INS_B) is provided in the above opening (OPN). The bending insulating film (INS_B) fills at least a portion of the opening (OPN), and in FIG. 4 of the present invention, it is illustrated as filling the entire opening (OPN). In one embodiment of the present invention, the bending insulating film (INS_B) may fill the opening (OPN) and at the same time cover an area adjacent to the opening (OPN), for example, an upper portion of the first insulating film (INS1) corresponding to the first and/or second flat areas (FA1, FA2).

The above bending insulating film (INS_B) may be an organic insulating film made of an organic material. As the organic material, an organic insulating material such as a polyacrylic compound, a polyimide compound, a fluorine-based carbon compound such as Teflon, a benzocyclobutene compound, etc. may be used.

Second wirings (L2) are provided on the first insulating film (INS1) and the bending insulating film (INS_B). In addition, lower contact electrodes (CTEa) are provided on the first insulating film (INS1). The second wirings (L2) and the lower contact electrode (CTEa) may be formed in the same process using the same material as the source electrode (SE) and the drain electrode (DE). The second wirings (L2) extend from the first flat area (FA1) through the bending area (BA) to the second flat area (FA2) and are positioned on the bending insulating film (INS_B). The second wirings (L2) may be positioned on the first insulating film (INS1) in a portion where the bending insulating film (INS_B) is not provided.

As described above, although the display device is illustrated in FIG. 4 as being unbent, the display device according to one embodiment of the present invention can be bent in the bending area (BA). The display device according to one embodiment of the present invention can be manufactured in a flat state and then bent.

In one embodiment of the present invention, the bending area (BA) is illustrated to coincide with the portion from which the inorganic insulating film is removed, but this is for convenience of explanation, and the bending area (BA) and the portion from which the inorganic insulating film is removed may not coincide. For example, the bending area (BA) generally corresponds to the portion from which the inorganic insulating film is removed, but may be wider or narrower than the portion from which the inorganic insulating film is removed, as necessary. In addition, in one embodiment of the present invention, the bending area (BA) is illustrated to be located only in the non-display area (NDA), but it is not limited thereto. For example, the bending area (BA) may be provided across the non-display area (NDA) and the display area (DA), or may be provided within the display area (DA).

A passivation layer (PSV) may be provided on the substrate (SUB) on which the second wirings (L2) are formed. The passivation layer (PSV) may be an inorganic insulating film, and in this case, the passivation layer (PSV) is not provided in an area corresponding to the bending area (BA), such as the above-described inorganic insulating films (buffer layer (BF), gate insulating film (GI), interlayer insulating film (IL), and/or first insulating film (INS1)). In addition, the passivation layer (PSV) exposes a part of the upper surface of the lower contact electrode (CTEa).

A second insulating film (INS2) may be provided on the passivation layer (PSV). A third insulating film (INS3) may be provided on the second insulating film (INS2). A portion of the second insulating film (INS2) and the third insulating film (INS3) is removed along the periphery of the display area (DA) to form a valley (VL). Accordingly, the second insulating film (INS2) and the third insulating film (INS3) do not continuously extend from the display area (DA) to the non-display area (NDA).

As described above, the side surfaces of the second insulating film (INS2) and the third insulating film (INS3) provided on the display area (DA) side are covered by the sealing film (SL). However, the upper surface of the third insulating film (INS3) provided on the non-display area (NDA) side and the side surfaces of the third insulating film (INS3) and the second insulating film (INS2) need not be entirely covered by the sealing film (SL), and at least a portion of them may be exposed to the outside.

After the formation of the second insulating film (INS2), the upper contact electrode (CTEb) can be formed. The upper contact electrode (CTEb) can be formed using the same material as the connection pattern (CNP) of the display area (DA) in the same process. The lower contact electrode (CTEa) and the upper contact electrode (CTEb) constitute the contact electrode (CTE), and the wires can be connected to a driving unit implemented as a chip-on-film or a flexible printed circuit board, etc., through the contact electrode (CTE).

Next, the connection relationship between the first wires (L1) and the second wires (L2) will be described. The second wires (L2) and the third wires (L3) can be connected in substantially the same manner as the first wires (L1) and the second wires (L2).

Although not illustrated, for example, if the first to third wires (L1, L2, L3) are data wires for transmitting data signals to pixels, the first wires (L1) may further include a contact portion for connecting to the data wires within the display area (DA) in an adjacent portion of the display area (DA).

FIG. 5 is a plan view illustrating some components related to a valley of a non-display area (NDA) in a display device according to one embodiment of the present invention.

Referring to FIG. 5, a substrate (SUB) according to one embodiment of the present invention is provided in a rectangular shape. The sides of the substrate (SUB) include four sides sequentially connected from one short side, that is, a first side (S1) to a fourth side (S4).

The above substrate (SUB) includes a display area (DA) and a non-display area (NDA) provided on at least one side of the display area (DA). In one embodiment of the present invention, the display area (DA) is provided in a rectangular shape, and the non-display area (NDA) is provided in a square ring shape surrounding the display area (DA).

A wiring section is provided in the non-display area (NDA). Data wiring may be provided in the non-display area (NDA) corresponding to the first side (S1), as illustrated in FIG. 2, and a second power wiring (ELVSS) may be provided along an edge of the display area (DA) in the non-display area (NDA) corresponding to the second to fourth sides (S2, S3, S4). The second power wiring (ELVSS) may be provided to have a predetermined width in the non-display area (NDA) corresponding to the second to fourth sides (S2, S3, S4). However, the arrangement of the second power wiring (ELVSS) is not limited thereto and may be modified in various forms. For example, the second power wire (ELVSS) may be provided to have a predetermined width on the second side (S2) and the fourth side (S4), and may not be provided on the third side (S3) or may be provided to have a width smaller than the widths on the second side (S2) and the fourth side (S4). Alternatively, the second power wire (ELVSS) may be formed with a predetermined width on only one of the second to fourth sides (S2, S3, S4), or may not be provided on the remaining sides, and may be formed to have a width smaller than the predetermined width. Alternatively, the second power wire (ELVSS) may have a portion having a predetermined width and a portion having a width smaller than the predetermined width within one of the provided sides. The second power wire (ELVSS) may be connected to a driving unit through some of the wires provided in the non-display area (NDA) corresponding to the first side (S1).

In one embodiment of the present invention, it goes without saying that in addition to the above-described data lines and second power lines (ELVSS), additional lines necessary for driving pixels may be provided in the non-display area (NDA).

The second electrode (EL2) covers the display area (DA) and may extend outwardly from the display area (DA) to cover a portion of the non-display area (NDA). In one embodiment of the present invention, the second electrode (EL2) may extend from the display area (DA) to a region between the display area (DA) and the area where the valley (VL) is formed. Accordingly, the second electrode (EL2) overlaps at least a portion of the second power wire (ELVSS) in the non-display area (NDA). A plurality of contact holes may be provided between the second electrode (EL2) and the second power wire (ELVSS), and the second electrode (EL2) and the second power wire (ELVSS) may be in contact through the contact holes. As a result, the second electrode (EL2) is electrically connected to the second power wire (ELVSS) in the non-display area (NDA).

In the non-display area (NDA), a valley (VL) is provided formed by removing a portion of an organic insulating film along the periphery of the display area (DA). The valley (VL) may surround the display area (DA). In one embodiment of the present invention, the valley (VL) may have a closed shape that completely surrounds the display area (DA). However, the valley (VL) does not necessarily have to have a closed shape, and may have an open portion in one area as needed.

The above valley (VL) includes first to fourth valleys (VL1, VL2, VL3, VL4) corresponding to the first side (S1) to the fourth side (S4) of the substrate (SUB), respectively. The first valley (VL1) extends long along the extension direction of the first side (S1) of the substrate (SUB) in the non-display area (NDA). The second valley (VL2) extends long along the extension direction of the second side (S2) of the substrate (SUB) in the non-display area (NDA). The third valley (VL3) extends long along the extension direction of the third side (S3) of the substrate (SUB) in the non-display area (NDA). The fourth valley (VL4) extends long along the extension direction of the fourth side (S4) of the substrate (SUB) in the non-display area (NDA).

In FIG. 5, the first to fourth valleys (VL1, VL2, VL3, VL4) are drawn as straight lines, but their actual shapes are openings having a predetermined width. The first to fourth valleys (VL1, VL2, VL3, VL4) do not necessarily need to extend along a straight direction when viewed in a plane. In one embodiment of the present invention, the shapes of the first to fourth valleys (VL1, VL2, VL3, VL4) may be changed depending on the arrangement of wires in the portions where the first to fourth valleys (VL1, VL2, VL3, VL4) are provided. For example, at least some of the first to fourth valleys (VL1, VL2, VL3, VL4) may have a shape that is bent or curved one or more times when viewed in a plane.

The above valley (VL) may overlap with the second power wiring (ELVSS) in some areas. As shown in Fig. 5, the first valley (VL1) does not overlap with the second power wiring (ELVSS), but each of the second to fourth valleys (VL4) overlaps with the second power wiring (ELVSS).

In one embodiment of the present invention, the valley (VL) does not overlap with the second electrode (EL2), but is not limited thereto. For example, in another embodiment of the present invention, the second electrode (EL2) may extend to the valley (VL) portion and cover the upper surface of the valley (VL) portion together with the second power supply wire (ELVSS).

Below, the shapes of the first to fourth valleys (VL1, VL2, VL3, VL4) are described with reference to the drawings.

FIG. 6 is a cross-sectional view taken along line II-II' of FIG. 5 in a display device according to an embodiment of the present invention. In FIG. 6, components provided between the substrate (SUB) and the second insulating film (INS2) are omitted for convenience of explanation. Components provided between the substrate (SUB) and the second insulating film (INS2) but not illustrated may include insulating films such as a buffer layer, a gate insulating film, an interlayer insulating film, a first insulating film, a passivation layer, and a sealing film, and wirings (gate wirings, data wirings, and other wiring sections) provided on each insulating film. Hereinafter, the upper surface of the substrate (SUB) may mean not only the upper surface of the substrate (SUB) itself, but also the upper surface of each component provided on the substrate (SUB), for example, the upper surface of the first insulating film (INS1) or the upper surface of the passivation layer (PSV).

Referring to FIGS. 5 and 6, second and third insulating films (INS2, INS3) and a pixel defining film (PDL) are sequentially laminated on a substrate (SUB). The second and third insulating films (INS2, INS3) and the pixel defining film (PDL) are organic insulating films made of an organic material. In the present embodiment, the organic insulating film is illustrated as being formed of two layers of the second insulating film (INS2) and the third insulating film (INS3), but the present invention includes a case where it is formed as a single organic insulating film that is not separated as well as a form where it is separated by the second insulating film (INS2) or the third insulating film (INS3).

The second and third insulating films (INS2, INS3) have openings from which a portion is removed in the non-display area (NDA). The pixel defining film (PDL) also has an opening from which a portion is removed in the area where the openings of the second and third insulating films (INS2, INS3) are formed. The openings of the second and third insulating films (INS2, INS3) and the opening of the pixel defining film (PDL) form a first valley (VL1).

A part of the upper surface of the substrate (SUB) is exposed to the outside by the first valley (VL1). The first valley (VL1) is defined as an opening formed in sequentially laminated insulating films, and the opening formed in each insulating film may have a side wall that is vertical or inclined with respect to the surface of the substrate (SUB) depending on the manufacturing process. Accordingly, the first valley (VL1) may have a wider width as it goes upward. Hereinafter, for convenience of explanation, the width is defined as the shortest distance between the width of the opening formed by a specific insulating film and a component provided directly below the insulating film at a part where the insulating film is in contact.

In one embodiment of the present invention, the first valley (VL1) may be provided with different widths depending on the second and third insulating films (INS2, INS3) and the pixel defining film (PDL). In the first valley (VL1), an opening formed by the second and third insulating films (INS2, INS3) is provided with a first width (W1), and an opening formed by the pixel defining film (PDL) is provided with a second width (W2). In the embodiment of the present invention, the second insulating film (INS2) and the third insulating film (INS3) are illustrated as two different layers, but the second insulating film (INS2) and the third insulating film (INS3) may be formed as a single layer as needed. In the present embodiment, the openings formed in the second insulating film (INS2) and the third insulating film (INS3) may have sidewalls that are connected without a step.

In one embodiment of the present invention, the second width (W2) is larger than the first width (W1). That is, the opening of the pixel defining film (PDL) has a wider width than the opening of the third insulating film (INS3), and thus, a part of the upper surface of the third insulating film (INS3) is exposed. The first width (W1) has a value sufficiently large so that no residual film of the pixel defining film (PDL) remains during the pixel defining film (PDL) patterning process.

The above first valley (VL1) can be manufactured by forming a second insulating film (INS2) on the substrate (SUB), then patterning it, forming a third insulating film (INS3) on the second insulating film (INS2), then patterning it, and forming the pixel defining film (PDL) on the third insulating film (INS3), then patterning it. The second insulating film (INS2) and the third insulating film (INS3) can be manufactured by sequentially forming them and then simultaneously patterning the second insulating film (INS2) and the third insulating film (INS3). Alternatively, the second insulating film (INS2) and the third insulating film (INS3) can be manufactured by forming them as a single insulating film and then patterning the single insulating film.

However, if the first width (W1) of the opening of the second and third insulating films (INS2, INS3) is narrow during the process of patterning the pixel defining film (PDL) after forming the pixel defining film (PDL), a residual film of the pixel defining film (PDL) may remain in the opening portion of the second and third insulating films (INS2, INS3). The residual film may then become a passage through which oxygen or moisture from the outside may move, and in that case, it may cause a defect in the pixel within the display area. In the present invention, the first width (W1) is sufficiently wide so that the residual film does not remain.

The pixel defining film (PDL) can be patterned to have an opening of the second width (W2) that is wider than the first width (W1), thereby reducing the possibility of a residual film of the pixel defining film (PDL) remaining.

FIG. 7 is a cross-sectional view taken along line II-II' of FIG. 5 of a display device according to another embodiment of the present invention.

Referring to FIGS. 5 and 7, in one embodiment of the present invention, second and third insulating films (INS2, INS3) and a pixel defining film (PDL) are sequentially laminated on a substrate (SUB). The first valley (VL1) may be provided with different widths for the second and third insulating films (INS2, INS3) and the pixel defining film (PDL). In the present embodiment, the pixel defining film (PDL) is laminated on the second and third insulating films (INS2, INS3), and is formed in a form that covers a side surface facing the opening of the second and third insulating films (INS2, INS3). Accordingly, in the first valley (VL1), when the opening formed by the second and third insulating films (INS2, INS3) has a fourth width (W4) and the opening formed by the pixel defining film (PDL) has a third width (W3), the third width (W3) is smaller than the fourth width (W4). In addition, the upper surface of the third insulating film (INS3) is not exposed to the outside, unlike the embodiment illustrated in FIG. 6.

In one embodiment of the present invention, the width of the opening formed by the pixel defining film (PDL), that is, the third width (W3), may be equal to or smaller than the first width (W1) formed by the second and third insulating films (INS2, INS3; that is, organic insulating films) in the embodiment disclosed in FIG. 6. The third width (W3) of the opening formed by the pixel defining film (PDL) is formed wider than the first width (W1) formed by the second and third insulating films (INS2, INS3) in the embodiment disclosed in FIG. 6, thereby preventing a residual film that may occur when patterning the pixel defining film (PDL). In particular, in the embodiment disclosed in FIG. 6, when the pixel defining film (PDL) is patterned, the upper surfaces of the second and third insulating films (INS2, INS3) are exposed to the outside, while a part of the pixel defining film (PDL) may remain on the side of the opening of the second and third insulating films (INS2, INS3). However, in the embodiment disclosed in Fig. 7, a portion of the pixel defining film (PDL) within the opening is removed while maintaining the pixel defining film (PDL) on the upper and side surfaces of the second and third insulating films (INS2, INS3) as is. Accordingly, the occurrence of residual film of the pixel defining film (PDL) within the opening is prevented as much as possible.

FIG. 8 is a cross-sectional view taken along line III-III' of FIG. 5 in a display device according to one embodiment of the present invention.

Referring to FIG. 5 and FIG. 8, second and third insulating films (INS2, INS3), which are organic insulating films, are sequentially laminated on a substrate (SUB). The second and third insulating films (INS2, INS3) have an opening in which a portion is removed in a non-display area (NDA).

A second power wiring (ELVSS) is provided on the second and third insulating films (INS3). The second power wiring (ELVSS) covers a portion of the upper surface of the second and third insulating films (INS2, INS3) and the opening portion.

The second power wiring (ELVSS) may be formed using the same material as the first electrode (EL1) using the same process. The second power wiring (ELVSS) may be formed of, for example, a metal film such as Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, an alloy thereof, and/or an inorganic material such as ITO (indium tin oxide), IZO (indium zinc oxide), ZnO (zinc oxide), or ITZO (indium tin zinc oxide). In one embodiment of the present invention, the second power wiring (ELVSS) may be formed of one type of metal, but is not limited thereto, and may be formed of two or more types of metal, for example, an alloy of Ag and Mg.

A pixel defining film (PDL) is laminated on the second power supply wiring (ELVSS). The pixel defining film (PDL) has an opening in which a portion is removed in an area where the openings of the second and third insulating films (INS2, INS3) are formed. The openings of the second and third insulating films (INS2, INS3) and the opening of the pixel defining film (PDL) form a second valley (VL2).

The second and third insulating films (INS2, INS3) are covered on a part of the upper surface and the side on the opening side by the second power wiring (ELVSS). The second power wiring (ELVSS) may be made of an inorganic material as described above and also functions to prevent oxygen or moisture, etc. from penetrating into the second and third insulating films (INS2, INS3).

A second electrode (EL2) is laminated on the pixel defining layer (PDL). The second electrode (EL2) is provided in a form that extends from a display area (DA) to a non-display area (NDA), and an end thereof overlaps the second power wiring (ELVSS). The pixel defining layer (PDL) has a contact hole formed in an overlapping area between the second electrode (EL2) and the second power wiring (ELVSS). The contact hole is a portion of the pixel defining layer (PDL) from which a portion is removed, and exposes an upper surface of the second power wiring (ELVSS). The second electrode (EL2) is connected to the second power wiring (ELVSS) through the contact hole.

In one embodiment of the present invention, the second electrode (EL2) covers a part of the pixel defining layer (PDL) in the non-display area (NDA) and is not provided in the second valley (VL2). However, in another embodiment of the present invention, it may be formed differently. For example, the second electrode (EL2) may extend from the pixel area to the second valley (VL2) and may also cover an upper surface of the second power supply line (ELVSS) located within the second valley (VL2).

In one embodiment of the present invention, the first valley (VL1) may be provided with different widths depending on the second and third insulating films (INS2, INS3) and the pixel defining film (PDL). In the second valley (VL2), an opening formed by the second and third insulating films (INS2, INS3) is provided with a fifth width (W5), and an opening formed by the pixel defining film (PDL) is provided with a sixth width (W6), and the sixth width (W6) is larger than the fifth width (W5). The fifth width (W5) has a sufficiently large value so that no residual film of the pixel defining film (PDL) remains during a patterning process of the pixel defining film (PDL).

In one embodiment of the present invention, the fifth width (W5) of the opening formed by the second and third insulating films (INS2, INS3) may be smaller than the first width (W1) formed by the second and third insulating films (INS2, INS3) in the embodiment disclosed in FIG. 6. In addition, the fifth width (W5) of the opening formed by the second and third insulating films (INS2, INS3) may be smaller than the third width (W3) of the opening formed by the pixel defining film (PDL) in the embodiment disclosed in FIG. 7.

In the present embodiment, the aperture width of the second and third insulating films (INS2, INS3), i.e., the fifth width (W5), has a value sufficiently large so that no residual film remains when the pixel defining film (PDL) is patterned during the pixel defining film (PDL) patterning process, and thus no residual film occurs. In addition, even if a residual film remains when the pixel defining film (PDL) is patterned, the penetration effect of oxygen or moisture, etc. is reduced due to the blocking effect of the second power supply wiring (ELVSS) even if some of the residual film remains when the pixel defining film (PDL) is patterned.

FIGS. 9A to 9D are cross-sectional views taken along line III-III' of FIG. 5 of a display device according to another embodiment of the present invention.

Referring to FIG. 5 and FIG. 9a, a passivation layer (see “PSV” in FIG. 4) is provided on a substrate (SUB). Second and third insulating films (INS2, INS3) are sequentially laminated on the passivation layer (PSV).

The second and third insulating films (INS2, INS3) above have an opening from which a portion is removed in the non-display area (NDA). The opening of the third insulating film (INS3) is formed corresponding to a position where the opening of the second insulating film (INS2) is formed, and overlaps each other when viewed in a plan view. The opening formed by the second and third insulating films (INS2, INS3) has a stepped shape on its side surface. Accordingly, the width of the opening of the second insulating film (INS2) and the width of the opening of the third insulating film (INS3) are different from each other. When the width of the opening of the second insulating film (INS2) is referred to as the seventh width (W7) and the width of the portion where the step is formed in the opening of the second and third insulating films (INS2, INS3) is referred to as the eighth width (W8), the eighth width (W8) is larger than the seventh width (W7). Due to the difference in width of the opening, a portion of the upper surface of the second insulating film (INS2) adjacent to the opening may be exposed.

A second power wiring (ELVSS) is provided on the second and third insulating films (INS2, INS3). The second power wiring (ELVSS) covers a portion of the upper surface of the second insulating film (INS2), the upper surface of the third insulating film (INS3), and the side surface on the opening side. The second power wiring (ELVSS) may be made of an inorganic material as described above, and also functions to prevent oxygen or moisture, etc. from penetrating into the second and third insulating films (INS2, INS3).

A pixel defining film (PDL) is laminated on the second power supply wiring (ELVSS). The pixel defining film (PDL) has an opening in which a portion is removed in a region where the openings of the second and third insulating films (INS2, INS3) are formed. When the width of the opening by the pixel defining film (PDL) is referred to as a ninth width (W9), the ninth width (W9) has a value greater than the seventh width (W7) or the eighth width (W8).

The openings of the second and third insulating films (INS2, INS3) and the openings of the pixel defining film (PDL) form a second valley (VL2).

A second electrode (EL2) is laminated on the pixel defining layer (PDL). The second electrode (EL2) is provided in a form that extends from a display area (DA) to a non-display area (NDA), and an end thereof overlaps the second power wiring (ELVSS). The pixel defining layer (PDL) has a contact hole formed in an overlapping area between the second electrode (EL2) and the second power wiring (ELVSS). The contact hole is a portion of the pixel defining layer (PDL) from which a portion is removed, and exposes an upper surface of the second power wiring (ELVSS). The second electrode (EL2) is connected to the second power wiring (ELVSS) through the contact hole.

In one embodiment of the present invention, the openings having a stepped shape in the second and third insulating films (INS2, INS3) can be implemented in different shapes.

Referring to FIG. 5 and FIG. 9B, the second and third insulating films (INS2, INS3) have an opening in which a portion is removed in the non-display area (NDA), but a stepped shape on the side surface can be provided to the second insulating film (INS2). When the width of the opening of the second insulating film (INS2) is referred to as the seventh width (W7) and the width of the portion in which the step is formed in the opening of the second insulating film (INS2) is referred to as the eighth width (W8'), the eighth width (W8') is larger than the seventh width (W7). Here, in the present embodiment, since the portion in which the step is formed is provided in the second insulating film (INS2), the eighth width (W8') in the present embodiment can have a smaller value than the eighth width (W8) in the embodiment of FIG. 9A.

Referring to FIG. 5 and FIG. 9c, the second and third insulating films (INS2, INS3) have an opening in which a portion is removed in the non-display area (NDA), but a stepped shape on the side surface can be provided to the second insulating film (INS2). When the width of the opening of the second insulating film (INS2) is referred to as the seventh width (W7) and the width of the portion where the step is formed in the opening of the third insulating film (INS2, INS3) is referred to as the eighth width (W8"), the eighth width (W8") is larger than the seventh width (W7).

Here, in this embodiment, since the part where the step is formed is provided in the third insulating film (INS3), the eighth width (W8") in this embodiment can have a larger value than the eighth width (W8) in the embodiment of FIG. 9a.

Referring to FIG. 5 and FIG. 9d, the second and third insulating films (INS2, INS3) have an opening with a portion thereof removed in the non-display area (NDA), and a stepped shape of the side surface is provided to the second insulating film (INS2), and the third insulating film (INS3) can cover the entire side surface of the stepped shape of the second insulating film.

In the present embodiment, although the second insulating film (INS2) and the third insulating film (INS3) are illustrated as having similar thicknesses in FIG. 9c, the thickness of the second insulating film (INS2) may be greater than the thickness of the third insulating film (INS3). After the second insulating film (INS2) is formed with a relatively thick thickness, the third insulating film (INS3) is formed with a relatively smaller thickness than the second insulating film (INS2), so that the third insulating film (INS3) can easily cover the upper surface and side surfaces of the second insulating film (INS2).

When the width of the opening of the second insulating film (INS2) is referred to as the seventh width (W7) and the width of the opening formed by the third insulating film (INS3) and the substrate (SUB) surface is referred to as the eighth width (W8'''), the eighth width (W8''') in the present embodiment is smaller than the seventh width (W7).

As in the embodiments described above, the second valley (VL2) may be provided with different widths depending on the second and third insulating films (INS2, INS3) and the pixel defining film (PDL). In the second valley (VL2), the opening formed by the second and third insulating films (INS2, INS3) has a step therein. By having a step at a side surface within the second valley (VL2), an average slope of the side surface and the floor surface is substantially gentle. Accordingly, the possibility that a residual film of the pixel defining film (PDL) remains when the pixel defining film (PDL) is patterned is reduced.

The step in the opening formed by the second and third insulating films (INS2, INS3) described above can be formed using a photolithography process. The step between the second and third insulating films (INS2, INS3) can be formed by performing photolithography using a mask on each of the second and third insulating films (INS2, INS3), and the step in the second insulating film (INS2) or the step in the third insulating film (INS3) can be formed using two masks or with one mask using a halftone mask or a slit mask.

The seventh width (W7) above has a value sufficiently large so that no residual film of the pixel defining film (PDL) remains during the patterning process of the pixel defining film (PDL). However, the seventh width (W7) may be smaller than the first width (W1), the fourth width (W4), and the fifth width (W5) described above. This is because the second insulating film (INS2) and the third insulating film (INS3) have openings of different widths, thereby facilitating the patterning of the pixel defining film (PDL), and also because even if a residual film remains during the patterning of the pixel defining film (PDL), the penetration effect of oxygen or moisture, etc. is reduced due to the blocking effect of the second power wiring (ELVSS). In the embodiments described above, the shapes of the valleys (VL) can be combined in various ways depending on whether the second power supply wire (ELVSS) (or other wires provided in the same layer as the second power supply wire (ELVSS)) is provided or not. For example, the embodiments of FIGS. 6 and 7 relate to the first valley (VL1), but if there is an area where the second power supply wire (ELVSS) is not provided depending on the arrangement of the second power supply wire (ELVSS), it can be applied to the second to fourth valleys (VL4). In addition, the embodiments of FIGS. 8 and 9 relate to the second valley (VL2) corresponding to the second side (S2), but it can of course be applied to the third and fourth valleys (VL4), and can also be applied to the first valley (VL1) side depending on the situation.

In the embodiments described above, the valley corresponding to each side of the substrate is illustrated as being one, but this is not limited thereto. The valley surrounding the display area along the edge of the display area may be provided in one or more forms, and may be provided in different forms depending on the area.

FIGS. 10A to 10C are plan views illustrating formation of valleys in various ways in a display device according to one embodiment of the present invention.

Referring to FIG. 10a, first to fourth valleys (VL1, VL2, VL3, VL4) corresponding to first to fourth sides (S1, S2, S3, S4) of the substrate are provided. In the present embodiment, the first valley (VL1), the second valley (VL2), and the fourth valley (VL4) are each provided as a single unit, but the third valley (VL3) is provided as two valleys (VL3a, VL3b).

Referring to FIG. 10b, first to fourth valleys (VL1, VL2, VL3, VL4) corresponding to first to fourth sides (S1, S2, S3, S4) of the substrate are provided, and in the present embodiment, each of the first to fourth valleys (VL1, VL2, VL3, VL4) is provided as a pair of valleys (VL1a, VL1b, VL2a, VL2b, VL3a, VL3b, VL4a, VL4b).

Referring to FIG. 10c, first to fourth valleys (VL1, VL2, VL3, VL4) corresponding to first to fourth sides (S1, S2, S3, S4) of the substrate are provided. In the present embodiment, the first valley (VL1) is provided as one valley (VL1), the second valley (VL2) is provided as two valleys (VL2a, VL2b), the third valley (VL3) is provided as three valleys (VL3a, VL3b, VL3c), and the fourth valley (VL4) is provided as two valleys (VL4a, VL4b).

In the above-described embodiments, the display device according to one embodiment of the present invention provides various forms of valleys in which a portion of the organic insulating film is removed along the periphery of the display area. In addition, by setting the width of the valleys in various ways when forming the pixel definition film, the occurrence of residual films is minimized. As a result, the display device according to one embodiment of the present invention effectively prevents oxygen or moisture, etc. from penetrating into the pixels of the display area from the outside.

A display device according to one embodiment of the present invention can be employed in various electronic devices. For example, the display device can be applied to various wearable devices such as televisions, laptops, mobile phones, smart phones, smart pads, PMPs, PDAs, navigation devices, and smart watches.

FIG. 11 is a plan view illustrating some components related to the valley and edge clad pass of a non-display area in a display device according to another embodiment of the present invention, and FIGS. 12a and 12b are cross-sectional views taken along line IV-IV' of FIG. 11 in a display device according to another embodiment of the present invention.

In FIGS. 12A and 12B, components provided between the substrate (SUB) and the second insulating film (INS2) are omitted for convenience of explanation. Components provided between the substrate (SUB) and the second insulating film (INS2) but not illustrated may include insulating films such as a buffer layer, a gate insulating film, an interlayer insulating film, a first insulating film, a passivation layer, and a sealing film, and wirings (gate wirings, data wirings, and other wiring sections) provided on each insulating film. Hereinafter, the upper surface of the substrate (SUB) may mean not only the upper surface of the substrate (SUB) itself, but also the upper surface of each component provided on the substrate (SUB), for example, the upper surface of the first insulating film (INS1) or the upper surface of the passivation layer (PSV).

Referring to FIGS. 11, 12a, and 12b, a substrate (SUB) according to one embodiment of the present invention is provided in a rectangular shape. The sides of the substrate (SUB) include four sides sequentially connected from one short side, that is, a first side (S1) to a fourth side (S4).

The above substrate (SUB) includes a display area (DA) and a non-display area (NDA) provided on at least one side of the display area (DA). In one embodiment of the present invention, the display area (DA) is provided in a rectangular shape, and the non-display area (NDA) is provided in a square ring shape surrounding the display area (DA).

A wiring section is provided in the non-display area (NDA). Data wiring may be provided in the non-display area (NDA) corresponding to the first side (S1), as illustrated in FIG. 2, and a second power wiring (ELVSS) may be provided along an edge of the display area (DA) in the non-display area (NDA) corresponding to the second to fourth sides (S2, S3, S4). The second power wiring (ELVSS) may be provided to have a predetermined width in the non-display area (NDA) corresponding to the second to fourth sides (S2, S3, S4). The second power wiring (ELVSS) may be connected to a driving unit through some of the wirings provided in the non-display area (NDA) corresponding to the first side (S1).

In the above non-display area (NDA), a valley (VL) is provided formed by removing a portion of an organic insulating film along the perimeter of the display area (DA). The valley (VL) can surround the display area (DA).

The above valley (VL) includes first to fourth valleys (VL1, VL2, VL3, VL4) corresponding to the first side (S1) to the fourth side (S4) of the substrate (SUB), respectively. The first to fourth valleys (VL1, VL2, VL3, VL4) extend along the extension direction of the first to fourth sides (S1, S2, S3, S4) of the substrate (SUB) in the non-display area (NDA). In one embodiment of the present invention, as illustrated in FIG. 11, the planar shape of the first valley (VL1) may have a partially open shape.

In FIG. 11, the first to fourth valleys (VL1, VL2, VL3, VL4) are drawn as straight lines, but as shown in FIGS. 12a and 12b, the actual shapes of the first to fourth valleys (VL1, VL2, VL3, VL4) are openings having a predetermined width. The first to fourth valleys (VL1, VL2, VL3, VL4) do not necessarily need to extend along a straight line when viewed on a plane. In one embodiment of the present invention, the shapes of the first to fourth valleys (VL1, VL2, VL3, VL4) may be changed depending on the arrangement of the wires in the portions where the first to fourth valleys (VL1, VL2, VL3, VL4) are provided. For example, at least some of the first to fourth valleys (VL1, VL2, VL3, VL4) may have a shape that is folded or bent at least once when viewed in a plane.

An edge clad path (ECP) is provided in the above non-display area (NDA). One end of the edge clad path (ECP) is connected to the first valley (VL1), and at least a part of the edge clad path (ECP) is parallel to the first valley (VL1). In addition, the edge clad path (ECP) may have a shape that is bent or curved at least once.

Below, the valley (VL) and the edge clad pass (ECP) are described with reference to the drawings.

Referring to FIGS. 12A and 12B, second and third insulating films (INS2, INS3) and a pixel defining film (PDL) are sequentially laminated on a substrate (SUB). The second and third insulating films (INS2, INS3) and the pixel defining film (PDL) are organic insulating films made of an organic material. In the present embodiment, the organic insulating film is illustrated as being formed of two layers of the second insulating film (INS2) and the third insulating film (INS3), but the present invention includes a case where it is formed as a single organic insulating film that is not separated as well as a form where it is separated by the second insulating film (INS2) or the third insulating film (INS3).

The second insulating film (INS2), the third insulating film (INS3), and the pixel defining film (PDL) have openings from which parts are removed. The openings of the second insulating film (INS2), the third insulating film (INS3), and the pixel defining film (PDL) form valleys (VL).

Meanwhile, a conductive pattern (MP) is provided on the substrate (SUB) or the second insulating film (INS2). The conductive pattern (MP) may be a first power supply line for supplying a first power (ELVDD) to each pixel. The conductive pattern (MP) is generally formed of a conductive metal, and a large amount of residue may exist in an area adjacent to an edge of the conductive pattern (MP) during a patterning process. The residue of the conductive pattern (MP) may cause a short circuit with another conductive layer.

As illustrated in FIG. 12a, when the conductive pattern (MP) is placed on the second insulating film (INS2), the edge adjacent to the valley (VL) of the conductive pattern (MP) is covered by the third insulating film (INS3) and the pixel defining film (PDL).

The area of the third insulating film (INS3) and the pixel defining film (PDL) covering the conductive pattern (MP) may be the edge clad pass (ECP). The edge clad pass (ECP) includes a first edge clad pass (ECP1) which is an area in which the third insulating film (INS3) covers the conductive pattern (MP), and a second edge clad pass (ECP2) which is an area in which the pixel defining film (PDL) covers the conductive pattern (MP). That is, the third insulating film (INS3) and the pixel defining film (PDL) may have the first edge clad pass (ECP1) and the second edge clad pass (ECP2).

As illustrated in FIG. 12b, when the conductive pattern (MP) is placed on the substrate (SUB), the edge adjacent to the valley (VL) of the conductive pattern (MP) is covered by the second insulating film (INS2), the third insulating film (INS3), and the pixel defining film (PDL).

The region of the second insulating film (INS2), the third insulating film (INS3) and the pixel defining film (PDL) covering the conductive pattern (MP) may be the edge clad pass (ECP). The edge clad pass (ECP) includes a first edge clad pass (ECP1) in which the third insulating film (INS3) covers the conductive pattern (MP), a second edge clad pass (ECP2) in which the pixel defining film (PDL) covers the conductive pattern (MP), and a third edge clad pass (ECP3) in which the second insulating film (INS2) covers the conductive pattern (MP). That is, the second insulating film (INS2), the third insulating film (INS3), and the pixel defining film (PDL) may have the first edge clad pass (ECP1), the second edge clad pass (ECP2), and the third edge clad pass (ECP3).

Even if residues of the conductive pattern (MP) exist in an area adjacent to an edge of the conductive pattern (MP), the residues can be covered by the second insulating film (INS2), the third insulating film (INS3), and the pixel defining film (PDL). Accordingly, the residues of the conductive pattern (MP) can be prevented from being short-circuited with other conductive layers.

Meanwhile, the edge clad pass (ECP) is a region where the organic insulating film covers the conductive pattern (MP), and the organic insulating film can be a passage for oxygen or moisture, etc. Accordingly, as illustrated in FIG. 11, when the edge clad pass (ECP) is bent, the passage for oxygen or moisture, etc. to move can become longer. Accordingly, the penetration of oxygen or moisture into the pixel can be delayed.

Although the present invention has been described above with reference to preferred embodiments thereof, it will be understood by those skilled in the art or having ordinary knowledge in the art that various modifications and changes may be made to the present invention without departing from the spirit and technical scope of the present invention as set forth in the claims below.

Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the scope of the patent claims.

BA: Bending area DA: Display area
GI: Gate Insulator IL: Interlayer Insulator
INS1, INS2, INS3: First to third insulating films
NDA: Non-display area
OPN1, OPN2: First and opening PSV: Passivation layer
SUB: Substrate VL: Valley

Claims (26)

A substrate comprising a display area on which an image is displayed and a non-display area provided on at least one side of the display area;
A plurality of pixels provided in the above display area;
An organic insulating film provided on the above substrate;
a pixel defining film provided on the organic insulating film; and
A sealing film covering the above display area and a part of the above non-display area and containing an inorganic material,
The organic insulating film and the pixel defining film have a valley, which is an opening penetrating the organic insulating film and the pixel defining film along the periphery of the display area,
The above-mentioned sealing film covers the display area and the valley, and terminates at the boundary between the organic insulating film of the non-display area and the valley,
The organic insulating film has an opening of a first width, and the pixel defining film has an opening of a second width.
The opening of the organic insulating film and the opening of the pixel defining film form the valley,
A display device wherein the opening of the first width is smaller than the opening of the second width. delete delete In the first paragraph,
A display device in which the above-mentioned sealing film covers the side surfaces of the above-mentioned organic insulating film and the above-mentioned pixel defining film. In the first paragraph,
The above valley is a display device having a closed shape surrounding the above display area. In the first paragraph,
The above substrate is provided in a square shape including first to fourth sides,
The above valley is a display device including first to fourth valleys corresponding to the first to fourth sides. In Article 6,
A display device provided in which at least one of the first to fourth valleys is provided in multiples. In the first paragraph,
Each of the above pixels
A first electrode provided on the organic insulating film;
a light-emitting layer provided on the first electrode; and
A display device including a second electrode provided on the light-emitting layer and the pixel defining film. In the first paragraph,
a second electrode provided on the pixel defining film; and
A display device further comprising a power wiring provided in the non-display area and supplying power to the second electrode. In Article 9,
The above substrate is provided in a square shape including first to fourth sides, and the valley includes first to fourth valleys corresponding to the first to fourth sides.
A display device in which the power wiring is provided corresponding to at least one of the first to fourth sides among the non-display areas. A substrate comprising a display area on which an image is displayed and a non-display area provided on at least one side of the display area;
A plurality of pixels provided in the above display area;
An organic insulating film provided on the above substrate;
A pixel defining film provided on the above organic insulating film;
A sealing film covering the display area and a part of the non-display area and containing an inorganic material;
a second electrode provided on the pixel defining film; and
Provided in the above non-display area and including power wiring for supplying power to the second electrode,
The organic insulating film and the pixel defining film have a valley, which is an opening penetrating the organic insulating film and the pixel defining film along the periphery of the display area,
The above-mentioned sealing film covers the display area and the valley, and terminates at the boundary between the organic insulating film of the non-display area and the valley,
The organic insulating film has an opening of a first width and the pixel defining film has an opening of a second width, and the opening of the organic insulating film and the opening of the pixel defining film form the valley.
The above substrate is provided in a square shape including first to fourth sides, and the valley includes first to fourth valleys corresponding to the first to fourth sides.
The above power wiring is provided corresponding to at least one of the first to fourth sides of the non-display area,
The above power wiring is provided corresponding to the second to fourth sides,
A display device wherein the first width of the first valley and the first width of one of the second to fourth valleys are different from each other. In Article 11,
A display device wherein the first width of the first valley is greater than the first width of one of the second to fourth valleys. In Article 11,
A display device in which, in an area corresponding to the first valley, the pixel defining film covers a side surface of the organic insulating film. In Article 13,
A display device in which, in an area corresponding to the first valley, the second width is smaller than the first width. In Article 11,
A display device in which the above power wiring is provided between the organic insulating film and the pixel defining film. In Article 15,
A display device including a first organic insulating film having an opening of a third width and a second organic insulating film having an opening of a fourth width greater than the third width. In the first paragraph,
A display device wherein the pixel defining film comprises an organic material. In the first paragraph,
A display device including a first inorganic insulating film, an organic insulating film, and a second inorganic insulating film, which are sequentially laminated. A substrate comprising a display area on which an image is displayed and a non-display area provided on at least one side of the display area;
A plurality of pixels provided in the above display area;
An organic insulating film provided on the above substrate;
A pixel defining film provided on the above organic insulating film;
A sealing film covering the display area and a part of the non-display area and containing an inorganic material;
a second electrode provided on the pixel defining film; and
Provided in the above non-display area and including power wiring for supplying power to the second electrode,
The organic insulating film and the pixel defining film have a valley, which is an opening penetrating the organic insulating film and the pixel defining film along the periphery of the display area,
The above-mentioned sealing film covers the display area and the valley, and terminates at the boundary between the organic insulating film of the non-display area and the valley,
The organic insulating film has an opening of a first width and the pixel defining film has an opening of a second width, and the opening of the organic insulating film and the opening of the pixel defining film form the valley.
Further comprising a challenge pattern provided on the above substrate,
The power wiring is provided between the organic insulating film and the pixel defining film, and at least a portion of the power wiring is provided in the valley,
A display device in which the organic insulating film and the pixel defining film have an edge clad pass that covers the edge of the conductive pattern. In Article 19,
The above edge clad pass is a display device connected to the above valley. In Article 20,
A display device wherein the above edge clad pass has a shape that is folded or bent at least once. A substrate comprising a display area on which an image is displayed and a non-display area provided on at least one side of the display area;
A plurality of pixels provided in the above display area;
An organic insulating film provided on the above substrate;
A pixel defining film provided on the above organic insulating film;
A sealing film covering the display area and a part of the non-display area and containing an inorganic material;
a second electrode provided on the pixel defining film; and
Provided in the above non-display area and including power wiring for supplying power to the second electrode,
The organic insulating film and the pixel defining film have a valley, which is an opening penetrating the organic insulating film and the pixel defining film along the periphery of the display area,
The above-mentioned sealing film covers the display area and the valley, and terminates at the boundary between the organic insulating film of the non-display area and the valley,
The organic insulating film has an opening of a first width and the pixel defining film has an opening of a second width, and the opening of the organic insulating film and the opening of the pixel defining film form the valley.
Further comprising a conductive pattern provided on the organic insulating film,
The power wiring is provided between the organic insulating film and the pixel defining film, and at least a portion of the power wiring is provided in the valley,
A display device in which the pixel defining film has an edge clad pass that covers the edge of the challenge pattern. In Article 22,
The above edge clad pass is a display device connected to the above valley. In Article 23,
A display device wherein the above edge clad pass has a shape that is folded or bent at least once. In the first paragraph,
A display device further comprising a passivation layer provided between the substrate and the organic insulating film. In Article 25,
A display device in which the above passivation layer is made of an inorganic material.

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